From: Pratyush Yadav <pratyush@kernel.org>
To: Michael Walle <michael@walle.cc>
Cc: liao jaime <jaimeliao.tw@gmail.com>,
Tudor Ambarus <tudor.ambarus@linaro.org>,
Pratyush Yadav <pratyush@kernel.org>,
linux-mtd@lists.infradead.org, miquel.raynal@bootlin.com,
leoyu@mxic.com.tw, jaimeliao@mxic.com.tw
Subject: Re: [PATCH v4 1/6] mtd: spi-nor: Add manufacturer read id function
Date: Tue, 17 Oct 2023 12:12:51 +0200 [thread overview]
Message-ID: <mafs0r0ltmuak.fsf@kernel.org> (raw)
In-Reply-To: <8b19eae720f0e0a8285993f3627eeff7@walle.cc> (Michael Walle's message of "Fri, 13 Oct 2023 11:04:04 +0200")
On Fri, Oct 13 2023, Michael Walle wrote:
> Hi,
>
> Am 2023-10-13 10:23, schrieb liao jaime:
[...]
>>> I'm wrong - the data strobe signal is optional.
>> As I know, data strobe signal is needed when 8D-8D-8D mode.
>> Infineon data strobe signal called "DS".
>> Macronix and Micron data strobe signal called "DQS"
>
> Maybe Pratyush can help here. But as far as I know, the data strobe
> is optional. E.g. on a layerscape ls1028 you can use an internal dummy
> strobe if it's not connected. The timing is then determined by pad
> delays.
Correct. The data strobe is optional and the controller does not have to
use it. Though for higher frequencies, it is usually needed to sample
the data lines at the right time -- given the time window to do so is
smaller and more precision is required.
For example, see my patch here [0] which enabled DQS sampling for PHY
reads since those are higher frequency. Since that patch has not yet
made it to mainline, currently the Cadence Quadspi driver does not use
DQS and still works fine with 8D-8D-8D mode. It does so based on its
hard-coded delays in device tree [1] (see cdns,read-delay).
[0] https://lore.kernel.org/linux-mtd/20210311191216.7363-5-p.yadav@ti.com/
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/spi/cdns,qspi-nor-peripheral-props.yaml
--
Regards,
Pratyush Yadav
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next prev parent reply other threads:[~2023-10-17 10:13 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-08 6:42 [PATCH v4 0/6] Add octal DTR support for Macronix flash Jaime Liao
2023-09-08 6:42 ` [PATCH v4 1/6] mtd: spi-nor: Add manufacturer read id function Jaime Liao
2023-09-20 12:28 ` Tudor Ambarus
2023-10-05 11:02 ` Pratyush Yadav
2023-10-05 11:43 ` Michael Walle
[not found] ` <54e5662f-baf4-4660-9fc4-7959d2405120@linaro.org>
[not found] ` <29bb3d952b9f49961da5e01cf86f9c4f@walle.cc>
2023-10-05 14:11 ` Tudor Ambarus
2023-10-06 8:22 ` Michael Walle
2023-10-12 8:59 ` liao jaime
2023-10-12 9:09 ` Michael Walle
2023-10-12 9:50 ` liao jaime
2023-10-13 8:06 ` Michael Walle
2023-10-13 8:23 ` liao jaime
2023-10-13 9:04 ` Michael Walle
2023-10-13 9:14 ` liao jaime
2023-10-13 9:32 ` Michael Walle
2023-10-17 10:12 ` Pratyush Yadav [this message]
2023-09-08 6:43 ` [PATCH v4 2/6] mtd: spi-nor: add Octal DTR support for Macronix flash Jaime Liao
2023-09-20 12:37 ` Tudor Ambarus
2023-10-05 10:18 ` Pratyush Yadav
2023-09-08 6:43 ` [PATCH v4 3/6] mtd: spi-nor: add support for Macronix Octal flash Jaime Liao
2023-09-20 12:41 ` Tudor Ambarus
2023-10-12 9:10 ` liao jaime
2023-09-08 6:43 ` [PATCH v4 4/6] spi: spi-mem: Allow specifying the byte order in DTR mode Jaime Liao
2023-09-20 12:47 ` Tudor Ambarus
2023-09-08 6:43 ` [PATCH v4 5/6] mtd: spi-nor: core: " Jaime Liao
2023-09-20 12:51 ` Tudor Ambarus
2023-09-08 6:43 ` [PATCH v4 6/6] mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT Jaime Liao
2023-09-20 12:52 ` Tudor Ambarus
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