Re: [PATCH] mtd: spi-nor: Enable locking for n25q00a

From: Pratyush Yadav <pratyush@kernel.org>
To: Pratyush Yadav <pratyush@kernel.org>
Cc: Sean Anderson <sean.anderson@linux.dev>,
	 Tudor Ambarus <tudor.ambarus@linaro.org>,
	 Michael Walle <mwalle@kernel.org>,
	linux-mtd@lists.infradead.org,
	 Richard Weinberger <richard@nod.at>,
	linux-kernel@vger.kernel.org,
	 Miquel Raynal <miquel.raynal@bootlin.com>,
	Vignesh Raghavendra <vigneshr@ti.com>
Subject: Re: [PATCH] mtd: spi-nor: Enable locking for n25q00a
Date: Wed, 08 Oct 2025 14:40:48 +0200	[thread overview]
Message-ID: <mafs0wm55mur3.fsf@kernel.org> (raw)
In-Reply-To: <mafs05xcpo9sz.fsf@kernel.org> (Pratyush Yadav's message of "Wed, 08 Oct 2025 14:30:20 +0200")

On Wed, Oct 08 2025, Pratyush Yadav wrote:

> On Tue, Oct 07 2025, Sean Anderson wrote:
>
[...]
>>>> Tested with a mt25qu01gbbb, which shares the same flash ID.
>>> 
>>> Ughh, is this another case of flash ID reuse? Do mt25qu and n25q00a
>>> flashes behave exactly the same and only have two names? If not, then
>>> how do you know if n25q00a will also work with these changes?
>>
>> I examined the datasheet for the n25q00a and determined that it has the
>> same status register layout.
>
> Can you share the links to the datasheets?
>
> Also, test logs would be nice to have.
>
>>
>> In fact, every n25q and mt25q flash has the same status register layout,
>> which (as noted above) is necessary to support capacities greater than 8
>> MiB (and all flashes in this series have such capacity).
>
> Do they behave the same? If not, do you know how they differ? If they

To clarify, I mean behave the same in things other than the status
register.

> behave differently, we might need to have some code that detects which
> one is running. Not necessarily as part of this patch though.
[...]

-- 
Regards,
Pratyush Yadav

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