Please add Microchip RISC-V branches to linux-next

Please add Microchip RISC-V branches to linux-next

[Conor.Dooley]

Hi Stephen,
To take some work off Palmer's shoulders, I am going to send him
PRs for "my" (Microchip RISC-V) device trees going forwards.

Could you please add the following branches to linux-next?
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ dt-for-next
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ dt-fixes

I had a quick look on lore, but couldn't easily see an example
of someone requesting a tree that goes via Arnd etc, so in case
it is relevant that the PRs will be to Palmer rather than Linus,
my branches are aimed at
https://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git/ for-next
&
https://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git/ fixes
respectively.

Please let me know if you need any more info,
Thanks,
Conor.

Re: Please add Microchip RISC-V branches to linux-next

[Stephen Rothwell]

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Hi Conor,

On Mon, 6 Jun 2022 22:06:19 +0000 <Conor.Dooley@microchip.com> wrote:
>
> To take some work off Palmer's shoulders, I am going to send him
> PRs for "my" (Microchip RISC-V) device trees going forwards.
> 
> Could you please add the following branches to linux-next?
> https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ dt-for-next
> https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ dt-fixes
> 
> I had a quick look on lore, but couldn't easily see an example
> of someone requesting a tree that goes via Arnd etc, so in case
> it is relevant that the PRs will be to Palmer rather than Linus,
> my branches are aimed at
> https://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git/ for-next
> &
> https://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git/ fixes
> respectively.
> 
> Please let me know if you need any more info,

Thats perfect, thanks.

Added from today.  I have called them risc-v-mc and risc-v-mc-fixes in
linux-next.

Thanks for adding your subsystem tree as a participant of linux-next.  As
you may know, this is not a judgement of your code.  The purpose of
linux-next is for integration testing and to lower the impact of
conflicts between subsystems in the next merge window. 

You will need to ensure that the patches/commits in your tree/series have
been:
     * submitted under GPL v2 (or later) and include the Contributor's
        Signed-off-by,
     * posted to the relevant mailing list,
     * reviewed by you (or another maintainer of your subsystem tree),
     * successfully unit tested, and 
     * destined for the current or next Linux merge window.

Basically, this should be just what you would send to Linus (or ask him
to fetch).  It is allowed to be rebased if you deem it necessary.

-- 
Cheers,
Stephen Rothwell 
sfr@canb.auug.org.au

-- 
Cheers,
Stephen Rothwell

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Re: Please add Microchip RISC-V branches to linux-next

[Conor.Dooley]

On 06/06/2022 23:51, Stephen Rothwell wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> Hi Conor,
>
> On Mon, 6 Jun 2022 22:06:19 +0000 <Conor.Dooley@microchip.com> wrote:
>>
>> To take some work off Palmer's shoulders, I am going to send him
>> PRs for "my" (Microchip RISC-V) device trees going forwards.
>>
>> Could you please add the following branches to linux-next?
>> https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ dt-for-next
>> https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ dt-fixes
>>
>> I had a quick look on lore, but couldn't easily see an example
>> of someone requesting a tree that goes via Arnd etc, so in case
>> it is relevant that the PRs will be to Palmer rather than Linus,
>> my branches are aimed at
>> https://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git/ for-next
>> &
>> https://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git/ fixes
>> respectively.
>>
>> Please let me know if you need any more info,
>
> Thats perfect, thanks.
>
> Added from today.  I have called them risc-v-mc and risc-v-mc-fixes in
> linux-next.

That's great, thanks!
Conor.