From: Stephen Rothwell <sfr@canb.auug.org.au>
To: Miguel Ojeda <ojeda@kernel.org>
Cc: Tamir Duberstein <tamird@gmail.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Linux Next Mailing List <linux-next@vger.kernel.org>
Subject: linux-next: build failure after merge of the rust tree
Date: Tue, 24 Jun 2025 17:31:14 +1000 [thread overview]
Message-ID: <20250624173114.3be38990@canb.auug.org.au> (raw)
[-- Attachment #1: Type: text/plain, Size: 11885 bytes --]
Hi all,
After merging the rust tree, today's linux-next build (x86_64
allmodconfig) failed like this:
error[E0277]: the trait bound `u32: From<DmaTrfCmdSize>` is not satisfied
--> drivers/gpu/nova-core/regs/macros.rs:310:26
|
310 | let value = (u32::from(value) << SHIFT) & MASK;
| ^^^ the trait `From<DmaTrfCmdSize>` is not implemented for `u32`
|
::: drivers/gpu/nova-core/regs.rs:240:1
|
240 | / register!(NV_PFALCON_FALCON_DMATRFCMD @ +0x00000118 {
241 | | 0:0 full as bool;
242 | | 1:1 idle as bool;
243 | | 3:2 sec as u8;
... |
248 | | 16:16 set_dmtag as u8;
249 | | });
| |__- in this macro invocation
|
= help: the following other types implement trait `From<T>`:
`u32` implements `From<Char>`
`u32` implements `From<CpuId>`
`u32` implements `From<Ipv4Addr>`
`u32` implements `From<NV_FUSE_OPT_FPF_GSP_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_NVDEC_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_SEC2_UCODE1_VERSION>`
`u32` implements `From<NV_PBUS_SW_SCRATCH_0E>`
`u32` implements `From<NV_PDISP_VGA_WORKSPACE_BASE>`
and 41 others
= note: this error originates in the macro `register` (in Nightly builds, run with -Z macro-backtrace for more info)
error[E0277]: the trait bound `u32: From<FalconCoreRev>` is not satisfied
--> drivers/gpu/nova-core/regs/macros.rs:310:26
|
310 | let value = (u32::from(value) << SHIFT) & MASK;
| ^^^ the trait `From<FalconCoreRev>` is not implemented for `u32`
|
::: drivers/gpu/nova-core/regs.rs:259:1
|
259 | / register!(NV_PFALCON_FALCON_HWCFG1 @ +0x0000012c {
260 | | 3:0 core_rev as u8 ?=> FalconCoreRev, "Core revision";
261 | | 5:4 security_model as u8 ?=> FalconSecurityModel, "Security model";
262 | | 7:6 core_rev_subversion as u8 ?=> FalconCoreRevSubversion, "Core revision subversion";
263 | | });
| |__- in this macro invocation
|
= help: the following other types implement trait `From<T>`:
`u32` implements `From<Char>`
`u32` implements `From<CpuId>`
`u32` implements `From<Ipv4Addr>`
`u32` implements `From<NV_FUSE_OPT_FPF_GSP_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_NVDEC_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_SEC2_UCODE1_VERSION>`
`u32` implements `From<NV_PBUS_SW_SCRATCH_0E>`
`u32` implements `From<NV_PDISP_VGA_WORKSPACE_BASE>`
and 41 others
= note: this error originates in the macro `register` (in Nightly builds, run with -Z macro-backtrace for more info)
error[E0277]: the trait bound `u32: From<FalconSecurityModel>` is not satisfied
--> drivers/gpu/nova-core/regs/macros.rs:310:26
|
310 | let value = (u32::from(value) << SHIFT) & MASK;
| ^^^ the trait `From<FalconSecurityModel>` is not implemented for `u32`
|
::: drivers/gpu/nova-core/regs.rs:259:1
|
259 | / register!(NV_PFALCON_FALCON_HWCFG1 @ +0x0000012c {
260 | | 3:0 core_rev as u8 ?=> FalconCoreRev, "Core revision";
261 | | 5:4 security_model as u8 ?=> FalconSecurityModel, "Security model";
262 | | 7:6 core_rev_subversion as u8 ?=> FalconCoreRevSubversion, "Core revision subversion";
263 | | });
| |__- in this macro invocation
|
= help: the following other types implement trait `From<T>`:
`u32` implements `From<Char>`
`u32` implements `From<CpuId>`
`u32` implements `From<Ipv4Addr>`
`u32` implements `From<NV_FUSE_OPT_FPF_GSP_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_NVDEC_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_SEC2_UCODE1_VERSION>`
`u32` implements `From<NV_PBUS_SW_SCRATCH_0E>`
`u32` implements `From<NV_PDISP_VGA_WORKSPACE_BASE>`
and 41 others
= note: this error originates in the macro `register` (in Nightly builds, run with -Z macro-backtrace for more info)
error[E0277]: the trait bound `u32: From<FalconCoreRevSubversion>` is not satisfied
--> drivers/gpu/nova-core/regs/macros.rs:310:26
|
310 | let value = (u32::from(value) << SHIFT) & MASK;
| ^^^ the trait `From<FalconCoreRevSubversion>` is not implemented for `u32`
|
::: drivers/gpu/nova-core/regs.rs:259:1
|
259 | / register!(NV_PFALCON_FALCON_HWCFG1 @ +0x0000012c {
260 | | 3:0 core_rev as u8 ?=> FalconCoreRev, "Core revision";
261 | | 5:4 security_model as u8 ?=> FalconSecurityModel, "Security model";
262 | | 7:6 core_rev_subversion as u8 ?=> FalconCoreRevSubversion, "Core revision subversion";
263 | | });
| |__- in this macro invocation
|
= help: the following other types implement trait `From<T>`:
`u32` implements `From<Char>`
`u32` implements `From<CpuId>`
`u32` implements `From<Ipv4Addr>`
`u32` implements `From<NV_FUSE_OPT_FPF_GSP_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_NVDEC_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_SEC2_UCODE1_VERSION>`
`u32` implements `From<NV_PBUS_SW_SCRATCH_0E>`
`u32` implements `From<NV_PDISP_VGA_WORKSPACE_BASE>`
and 41 others
= note: this error originates in the macro `register` (in Nightly builds, run with -Z macro-backtrace for more info)
error[E0277]: the trait bound `u32: From<FalconFbifTarget>` is not satisfied
--> drivers/gpu/nova-core/regs/macros.rs:310:26
|
310 | let value = (u32::from(value) << SHIFT) & MASK;
| ^^^ the trait `From<FalconFbifTarget>` is not implemented for `u32`
|
::: drivers/gpu/nova-core/regs.rs:276:1
|
276 | / register!(NV_PFALCON_FBIF_TRANSCFG @ +0x00000600 {
277 | | 1:0 target as u8 ?=> FalconFbifTarget;
278 | | 2:2 mem_type as bool => FalconFbifMemType;
279 | | });
| |__- in this macro invocation
|
= help: the following other types implement trait `From<T>`:
`u32` implements `From<Char>`
`u32` implements `From<CpuId>`
`u32` implements `From<Ipv4Addr>`
`u32` implements `From<NV_FUSE_OPT_FPF_GSP_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_NVDEC_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_SEC2_UCODE1_VERSION>`
`u32` implements `From<NV_PBUS_SW_SCRATCH_0E>`
`u32` implements `From<NV_PDISP_VGA_WORKSPACE_BASE>`
and 41 others
= note: this error originates in the macro `register` (in Nightly builds, run with -Z macro-backtrace for more info)
error[E0277]: the trait bound `u32: From<FalconFbifMemType>` is not satisfied
--> drivers/gpu/nova-core/regs/macros.rs:310:26
|
310 | let value = (u32::from(value) << SHIFT) & MASK;
| ^^^ the trait `From<FalconFbifMemType>` is not implemented for `u32`
|
::: drivers/gpu/nova-core/regs.rs:276:1
|
276 | / register!(NV_PFALCON_FBIF_TRANSCFG @ +0x00000600 {
277 | | 1:0 target as u8 ?=> FalconFbifTarget;
278 | | 2:2 mem_type as bool => FalconFbifMemType;
279 | | });
| |__- in this macro invocation
|
= help: the following other types implement trait `From<T>`:
`u32` implements `From<Char>`
`u32` implements `From<CpuId>`
`u32` implements `From<Ipv4Addr>`
`u32` implements `From<NV_FUSE_OPT_FPF_GSP_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_NVDEC_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_SEC2_UCODE1_VERSION>`
`u32` implements `From<NV_PBUS_SW_SCRATCH_0E>`
`u32` implements `From<NV_PDISP_VGA_WORKSPACE_BASE>`
and 41 others
= note: this error originates in the macro `register` (in Nightly builds, run with -Z macro-backtrace for more info)
error[E0277]: the trait bound `u32: From<FalconModSelAlgo>` is not satisfied
--> drivers/gpu/nova-core/regs/macros.rs:310:26
|
310 | let value = (u32::from(value) << SHIFT) & MASK;
| ^^^ the trait `From<FalconModSelAlgo>` is not implemented for `u32`
|
::: drivers/gpu/nova-core/regs.rs:285:1
|
285 | / register!(NV_PFALCON2_FALCON_MOD_SEL @ +0x00001180 {
286 | | 7:0 algo as u8 ?=> FalconModSelAlgo;
287 | | });
| |__- in this macro invocation
|
= help: the following other types implement trait `From<T>`:
`u32` implements `From<Char>`
`u32` implements `From<CpuId>`
`u32` implements `From<Ipv4Addr>`
`u32` implements `From<NV_FUSE_OPT_FPF_GSP_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_NVDEC_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_SEC2_UCODE1_VERSION>`
`u32` implements `From<NV_PBUS_SW_SCRATCH_0E>`
`u32` implements `From<NV_PDISP_VGA_WORKSPACE_BASE>`
and 41 others
= note: this error originates in the macro `register` (in Nightly builds, run with -Z macro-backtrace for more info)
error[E0277]: the trait bound `u32: From<PeregrineCoreSelect>` is not satisfied
--> drivers/gpu/nova-core/regs/macros.rs:310:26
|
310 | let value = (u32::from(value) << SHIFT) & MASK;
| ^^^ the trait `From<PeregrineCoreSelect>` is not implemented for `u32`
|
::: drivers/gpu/nova-core/regs.rs:304:1
|
304 | / register!(NV_PRISCV_RISCV_BCR_CTRL @ +0x00001668 {
305 | | 0:0 valid as bool;
306 | | 4:4 core_select as bool => PeregrineCoreSelect;
307 | | 8:8 br_fetch as bool;
308 | | });
| |__- in this macro invocation
|
= help: the following other types implement trait `From<T>`:
`u32` implements `From<Char>`
`u32` implements `From<CpuId>`
`u32` implements `From<Ipv4Addr>`
`u32` implements `From<NV_FUSE_OPT_FPF_GSP_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_NVDEC_UCODE1_VERSION>`
`u32` implements `From<NV_FUSE_OPT_FPF_SEC2_UCODE1_VERSION>`
`u32` implements `From<NV_PBUS_SW_SCRATCH_0E>`
`u32` implements `From<NV_PDISP_VGA_WORKSPACE_BASE>`
and 41 others
= note: this error originates in the macro `register` (in Nightly builds, run with -Z macro-backtrace for more info)
error[E0599]: no method named `as_nanos` found for struct `Delta` in the current scope
--> drivers/gpu/nova-core/util.rs:45:33
|
45 | if start_time.elapsed().as_nanos() > timeout.as_nanos() as i64 {
| ^^^^^^^^ method not found in `Delta`
error: aborting due to 9 previous errors
Some errors have detailed explanations: E0277, E0599.
For more information about an error, try `rustc --explain E0277`.
Presumably caused by commit
b7c8d7a8d251 ("rust: enable `clippy::cast_lossless` lint")
interacting with some changes in the drm-nova tree
(https://gitlab.freedesktop.org/drm/nova.git#nova-next).
A suggested merge resolution would be appreciated.
I have used the rust tree from next-20250620 for today.
--
Cheers,
Stephen Rothwell
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next reply other threads:[~2025-06-24 7:31 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-24 7:31 Stephen Rothwell [this message]
2025-06-24 10:31 ` linux-next: build failure after merge of the rust tree Miguel Ojeda
2025-06-24 11:12 ` Danilo Krummrich
2025-06-24 12:29 ` Miguel Ojeda
2025-06-24 12:00 ` Danilo Krummrich
2025-06-24 12:14 ` Alexandre Courbot
2025-06-24 12:16 ` Tamir Duberstein
2025-06-24 12:24 ` Alexandre Courbot
2025-06-24 12:29 ` Tamir Duberstein
2025-06-24 12:25 ` Miguel Ojeda
-- strict thread matches above, loose matches on Subject: below --
2025-11-17 8:04 Stephen Rothwell
2025-11-17 11:19 ` Alexandre Courbot
2025-11-17 14:51 ` Alice Ryhl
2025-11-17 15:37 ` Tamir Duberstein
2025-11-17 16:11 ` Alice Ryhl
2025-05-27 9:42 Stephen Rothwell
2025-05-27 10:03 ` Miguel Ojeda
2025-05-12 9:40 Stephen Rothwell
2025-05-12 11:52 ` Miguel Ojeda
2025-03-24 10:57 Stephen Rothwell
2025-03-24 11:06 ` Stephen Rothwell
2025-03-24 11:59 ` Danilo Krummrich
2025-03-24 13:29 ` Greg KH
2025-03-24 13:43 ` Danilo Krummrich
2025-03-24 13:52 ` Greg KH
2025-03-24 15:18 ` Miguel Ojeda
2025-03-24 15:27 ` Danilo Krummrich
2025-03-24 15:40 ` Miguel Ojeda
2025-03-17 10:57 Stephen Rothwell
2025-03-17 22:35 ` Miguel Ojeda
2025-03-17 23:35 ` Stephen Rothwell
2025-03-18 11:37 ` Stephen Rothwell
2025-03-18 23:47 ` Miguel Ojeda
2025-03-19 9:06 ` Stephen Rothwell
2025-03-19 9:18 ` Miguel Ojeda
2025-01-10 5:28 Stephen Rothwell
2025-01-10 9:28 ` Alice Ryhl
2025-01-10 9:34 ` Greg Kroah-Hartman
2025-01-10 9:41 ` Alice Ryhl
2025-01-10 10:07 ` Alice Ryhl
2025-01-10 10:08 ` Miguel Ojeda
2025-01-10 10:16 ` Miguel Ojeda
2025-01-10 10:38 ` Miguel Ojeda
2024-12-16 5:25 Stephen Rothwell
2024-12-16 10:31 ` Miguel Ojeda
2024-12-16 10:59 ` Jocelyn Falempe
2024-12-16 16:24 ` Miguel Ojeda
2024-12-16 19:46 ` Jocelyn Falempe
2024-11-11 6:58 Stephen Rothwell
2024-11-11 8:16 ` Miguel Ojeda
2024-11-11 8:28 ` Miguel Ojeda
2024-11-11 14:15 ` Gary Guo
2024-11-11 23:08 ` Miguel Ojeda
2024-11-11 23:58 ` Miguel Ojeda
2024-11-12 1:29 ` Stephen Rothwell
2024-11-12 6:30 ` Stephen Rothwell
2024-11-12 8:50 ` Miguel Ojeda
2021-09-28 4:09 Stephen Rothwell
2021-09-28 4:18 ` Gary Guo
2021-09-28 5:52 ` Stephen Rothwell
2021-09-28 23:37 ` Stephen Rothwell
2021-09-29 17:13 ` Masahiro Yamada
2021-09-29 17:25 ` Miguel Ojeda
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