linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

Stephen Rothwell
2015-09-30T01:32:14Z

drivers/gpu/drm/i915/intel_lrc.c

between commit:

dfc53c5e73f8 ("drm/i915: Consider HW CSB write pointer before resetting the sw read pointer")

from the drm-intel-fixes tree and commit:

83843d84fcd3 ("drm/i915: Parametrize LRC registers")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary (no action
is required).

--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au

diff --cc drivers/gpu/drm/i915/intel_lrc.c
index 7412caedcf7f,256167b2e2ab..000000000000
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@@ -492,10 -519,8 +519,8 @@@ void intel_lrc_irq_handler(struct intel

while (read_pointer < write_pointer) {
read_pointer++;
- status = I915_READ(RING_CONTEXT_STATUS_BUF(ring) +
- (read_pointer % GEN8_CSB_ENTRIES) * 8);
- status_id = I915_READ(RING_CONTEXT_STATUS_BUF(ring) +
- (read_pointer % GEN8_CSB_ENTRIES) * 8 + 4);
- status = I915_READ(RING_CONTEXT_STATUS_BUF_LO(ring, read_pointer % 6));
- status_id = I915_READ(RING_CONTEXT_STATUS_BUF_HI(ring, read_pointer % 6));
++ status = I915_READ(RING_CONTEXT_STATUS_BUF_LO(ring, read_pointer % GEN8_CSB_ENTRIES));
++ status_id = I915_READ(RING_CONTEXT_STATUS_BUF_HI(ring, read_pointer % GEN8_CSB_ENTRIES));

if (status & GEN8_CTX_STATUS_IDLE_ACTIVE)
continue;
@@@ -1424,8 -1477,10 +1479,11 @@@ static int gen8_init_common_ring(struc
{
struct drm_device *dev = ring->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
+ u8 next_context_status_buffer_hw;

+ lrc_setup_hardware_status_page(ring,
+ ring->default_context->engine[ring->id].state);
+
I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask));
I915_WRITE(RING_HWSTAM(ring->mmio_base), 0xffffffff);