linux-next: manual merge of the drm tree with the drm-fixes tree

[Mark Brown <broonie@kernel.org>]

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Hi all,

Today's linux-next merge of the drm tree got a conflict in:

  drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h

between commit:

  6e4bc34568e38 ("drm/amd: Create a device link between APU display and XHCI devices")

from the drm-fixes tree and commits:

  07c93d7eeb0d9 ("drm/amd: Create a device link between APU display and XHCI devices")
  958430a1f068f ("drm/amd/pm: retire legacy smu ras driver framework")

from the drm tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

diff --combined drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
index e3a89e9a9df41,7ea7c4a5279be..0000000000000
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
@@@ -852,8 -852,6 +852,6 @@@ struct pptable_funcs 
  	 */
  	int (*set_default_dpm_table)(struct smu_context *smu);
  
- 	int (*set_power_state)(struct smu_context *smu);
- 
  	/**
  	 * @populate_umd_state_clk: Populate the UMD power state table with
  	 *                          defaults.
@@@ -906,16 -904,6 +904,6 @@@
  					      struct
  					      pp_clock_levels_with_latency
  					      *clocks);
- 	/**
- 	 * @get_clock_by_type_with_voltage: Get the speed and voltage of a clock
- 	 *                                  domain.
- 	 */
- 	int (*get_clock_by_type_with_voltage)(struct smu_context *smu,
- 					      enum amd_pp_clock_type type,
- 					      struct
- 					      pp_clock_levels_with_voltage
- 					      *clocks);
- 
  	/**
  	 * @get_power_profile_mode: Print all power profile modes to
  	 *                          buffer. Star current mode.
@@@ -1357,11 -1345,6 +1345,6 @@@
  	 */
  	int (*register_irq_handler)(struct smu_context *smu);
  
- 	/**
- 	 * @set_azalia_d3_pme: Wake the audio decode engine from d3 sleep.
- 	 */
- 	int (*set_azalia_d3_pme)(struct smu_context *smu);
- 
  	/**
  	 * @get_max_sustainable_clocks_by_dc: Get a copy of the max sustainable
  	 *                                    clock speeds table.
@@@ -1378,18 -1361,6 +1361,6 @@@
  	 */
  	int (*get_bamaco_support)(struct smu_context *smu);
  
- 	/**
- 	 * @baco_get_state: Get the current BACO state.
- 	 *
- 	 * Return: Current BACO state.
- 	 */
- 	enum smu_baco_state (*baco_get_state)(struct smu_context *smu);
- 
- 	/**
- 	 * @baco_set_state: Enter/exit BACO.
- 	 */
- 	int (*baco_set_state)(struct smu_context *smu, enum smu_baco_state state);
- 
  	/**
  	 * @baco_enter: Enter BACO.
  	 */
@@@ -1651,12 -1622,6 +1622,6 @@@
  	int (*ras_send_msg)(struct smu_context *smu,
  			    enum smu_message_type msg, uint32_t param, uint32_t *read_arg);
  
- 	/**
- 	 * @get_ras_smu_drv: Get RAS smu driver interface
- 	 * Return: ras_smu_drv *
- 	 */
- 	int (*get_ras_smu_drv)(struct smu_context *smu, const struct ras_smu_drv **ras_smu_drv);
- 
  	/**
  	 * @set_power_dep: Create or destroy a power dependency link
  	 * from an integrated xHCI controller to the GPU so that the GPU is
@@@ -1962,7 -1927,13 +1927,13 @@@ int smu_link_reset(struct smu_context *
  
  extern const struct amd_ip_funcs smu_ip_funcs;
  
- bool is_support_sw_smu(struct amdgpu_device *adev);
+ void amdgpu_smu_early_init(struct amdgpu_device *adev);
+ 
+ static inline bool is_support_sw_smu(struct amdgpu_device *adev)
+ {
+ 	return adev->is_sw_smu;
+ }
+ 
  bool is_support_cclk_dpm(struct amdgpu_device *adev);
  int smu_write_watermarks_table(struct smu_context *smu);
  
@@@ -2005,7 -1976,6 +1976,6 @@@ int smu_set_pm_policy(struct smu_contex
  		      int level);
  ssize_t smu_get_pm_policy_info(struct smu_context *smu,
  			       enum pp_pm_policy p_type, char *sysbuf);
- const struct ras_smu_drv *smu_get_ras_smu_driver(void *handle);
  
  int amdgpu_smu_ras_send_msg(struct amdgpu_device *adev, enum smu_message_type msg,
  			    uint32_t param, uint32_t *readarg);

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