From: Yasunori Goto <y-goto@jp.fujitsu.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: Qemu Developers <qemu-devel@nongnu.org>,
NVDIMM-ML <linux-nvdimm@lists.01.org>
Subject: Re: Questions about vNVDIMM on qemu/KVM
Date: Fri, 25 May 2018 14:02:30 +0900 [thread overview]
Message-ID: <20180525140226.04D7.E1E9C6FF@jp.fujitsu.com> (raw)
In-Reply-To: <CAPcyv4h3RHymfKXxebBf+4DJs7vyJyhOVOuhDUJtchBnGOFrDw@mail.gmail.com>
> >
> > But ,I would like understand one more thing.
> > In the following mail, it seems that e820 bus will be used for fake DAX.
> >
> > https://lists.01.org/pipermail/linux-nvdimm/2018-January/013926.html
> >
> > Could you tell me what is relationship between "fake DAX" in this mail
> > and Guest DAX?
> > Why e820 is necessary for this case?
> >
>
> It was proposed as a starting template for writing a new nvdimm bus
> driver. All we need is a way to communicate both the address range and
> the flush interface. This could be done with a new SPA Range GUID with
> the NFIT, or a custom virtio-pci device that registers a special
> nvdimm region with this property. My preference is whichever approach
> minimizes the code duplication, because the pmem driver should be
> re-used as much as possible.
Ok, I see.
Thank you very much for your explanation.
Bye,
---
Yasunori Goto
_______________________________________________
Linux-nvdimm mailing list
Linux-nvdimm@lists.01.org
https://lists.01.org/mailman/listinfo/linux-nvdimm
next prev parent reply other threads:[~2018-05-25 5:03 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-23 5:08 Questions about vNVDIMM on qemu/KVM Yasunori Goto
2018-05-23 18:39 ` Dan Williams
2018-05-24 7:19 ` Yasunori Goto
2018-05-24 14:08 ` Dan Williams
2018-05-25 5:02 ` Yasunori Goto [this message]
2018-06-01 11:54 ` Stefan Hajnoczi
2018-06-04 8:03 ` [Qemu-devel] " Pankaj Gupta
2018-06-06 1:44 ` Yasunori Goto
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