From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 82A1821E1DAEB for ; Wed, 2 Aug 2017 13:50:37 -0700 (PDT) Subject: Re: [PATCH v2 5/5] libnvdimm: add DMA support for pmem blk-mq References: <150169902310.59677.18062301799811367806.stgit@djiang5-desk3.ch.intel.com> <150169928551.59677.14690799553760064519.stgit@djiang5-desk3.ch.intel.com> From: Dave Jiang Message-ID: <245fbb9a-d841-2c70-481b-19a0483c3872@intel.com> Date: Wed, 2 Aug 2017 13:52:46 -0700 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: linux-nvdimm-bounces@lists.01.org Sender: "Linux-nvdimm" To: Sinan Kaya , "Koul, Vinod" , "Williams, Dan J" Cc: "dmaengine@vger.kernel.org" , "linux-nvdimm@lists.01.org" List-ID: On 08/02/2017 12:22 PM, Sinan Kaya wrote: > On 8/2/2017 2:41 PM, Dave Jiang wrote: >> if (queue_mode == PMEM_Q_MQ) { >> + chan = dma_find_channel(DMA_MEMCPY); >> + if (!chan) { >> + queue_mode = PMEM_Q_BIO; >> + dev_warn(dev, "Forced back to PMEM_Q_BIO, no DMA\n"); >> + } > > We can't expect all MEMCPY capable hardware to support this feature, right? > > Do we need a new API / new function, or new capability? Hmmm...you are right. I wonder if we need something like DMA_SG cap.... > >> + } > > _______________________________________________ Linux-nvdimm mailing list Linux-nvdimm@lists.01.org https://lists.01.org/mailman/listinfo/linux-nvdimm