From: dledford@redhat.com (Doug Ledford)
Subject: [PATCH v2 1/2] net/mlx5: Define interface bits for fencing UMR wqe
Date: Thu, 01 Jun 2017 18:51:03 -0400 [thread overview]
Message-ID: <1496357463.7171.74.camel@redhat.com> (raw)
In-Reply-To: <1495957991-19223-1-git-send-email-maxg@mellanox.com>
On Sun, 2017-05-28@10:53 +0300, Max Gurtovoy wrote:
> HW can implement UMR wqe re-transmission in various ways.
> Thus, add HCA cap to distinguish the needed fence for UMR to make
> sure that the wqe wouldn't fail on mkey checks.
>
> Signed-off-by: Max Gurtovoy <maxg at mellanox.com>
> Acked-by: Leon Romanovsky <leon at kernel.org>
Series, with Christoph's fixup, applied.
--
Doug Ledford <dledford at redhat.com>
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prev parent reply other threads:[~2017-06-01 22:51 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-28 7:53 [PATCH v2 1/2] net/mlx5: Define interface bits for fencing UMR wqe Max Gurtovoy
2017-05-28 7:53 ` [PATCH v2 2/2] IB/mlx5: set UMR wqe fence according to HCA cap Max Gurtovoy
2017-05-28 9:07 ` Christoph Hellwig
2017-05-28 9:53 ` Max Gurtovoy
2017-05-29 10:05 ` Leon Romanovsky
2017-05-29 12:21 ` Max Gurtovoy
2017-05-29 16:06 ` Leon Romanovsky
2017-05-30 10:51 ` Sagi Grimberg
2017-05-30 17:15 ` Leon Romanovsky
2017-05-30 10:48 ` Sagi Grimberg
2017-05-30 11:15 ` Max Gurtovoy
2017-05-30 11:22 ` Sagi Grimberg
2017-05-30 11:24 ` Max Gurtovoy
2017-05-30 14:28 ` Sagi Grimberg
2017-05-30 20:41 ` Max Gurtovoy
2017-05-28 9:14 ` [PATCH v2 1/2] net/mlx5: Define interface bits for fencing UMR wqe Christoph Hellwig
2017-06-01 22:51 ` Doug Ledford [this message]
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