[PATCH] nvme: put some AMD PCIE downstream NVME device to simple suspend/resume path

From: Prike Liang <Prike.Liang@amd.com>
To: linux-nvme@lists.infradead.org, kbusch@kernel.org, axboe@fb.com,
	hch@lst.de, sagi@grimberg.me
Cc: Alexander.Deucher@amd.com, Shyam-sundar.S-k@amd.com,
	Prike Liang <Prike.Liang@amd.com>
Subject: [PATCH] nvme: put some AMD PCIE downstream NVME device to simple suspend/resume path
Date: Tue, 30 Mar 2021 20:54:04 +0800	[thread overview]
Message-ID: <1617108844-30110-1-git-send-email-Prike.Liang@amd.com> (raw)

The NVME device pluged in some AMD PCIE root port will resume timeout from s2idle which
caused by NVME power CFG lost in the SMU FW restore.This issue can be workaround by using
PCIe power set with simple suspend/resume process path. In the onwards ASIC will try do
the NVME shutdown save and restore in the SMU FW instead of PCIe power set in the driver.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
---
 drivers/nvme/host/pci.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index 6bad4d4..33c48ee 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -42,6 +42,8 @@
 #define NVME_MAX_KB_SZ	4096
 #define NVME_MAX_SEGS	127
 
+#define AMD_PCIE_ID_CZN 0x1634
+#define AMD_PCIE_ID_RN AMD_PCIE_ID_CZN
 static int use_threaded_interrupts;
 module_param(use_threaded_interrupts, int, 0);
 
@@ -70,6 +72,12 @@ static unsigned int io_queue_depth = 1024;
 module_param_cb(io_queue_depth, &io_queue_depth_ops, &io_queue_depth, 0644);
 MODULE_PARM_DESC(io_queue_depth, "set io queue depth, should >= 2");
 
+static const struct pci_device_id pcie_rp_ids[] = {
+	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_PCIE_ID_RN) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_PCIE_ID_CZN) },
+	{ }
+};
+
 static int io_queue_count_set(const char *val, const struct kernel_param *kp)
 {
 	unsigned int n;
@@ -2786,6 +2794,9 @@ static int nvme_dev_map(struct nvme_dev *dev)
 
 static unsigned long check_vendor_combination_bug(struct pci_dev *pdev)
 {
+	struct pci_dev *root;
+	root = pcie_find_root_port(pdev);
+
 	if (pdev->vendor == 0x144d && pdev->device == 0xa802) {
 		/*
 		 * Several Samsung devices seem to drop off the PCIe bus
@@ -2822,6 +2833,12 @@ static unsigned long check_vendor_combination_bug(struct pci_dev *pdev)
 		if ((dmi_match(DMI_BOARD_VENDOR, "LENOVO")) &&
 		     dmi_match(DMI_BOARD_NAME, "LNVNB161216"))
 			return NVME_QUIRK_SIMPLE_SUSPEND;
+	} else if (root && pci_match_id(pcie_rp_ids, root)) {
+			/* Detect NVME device which pluged in the Renoir PCIE root port
+			 * then force use quick suspend/resume path for workaround the resume
+			 * timeout for s0ix.
+			 */
+			return NVME_QUIRK_SIMPLE_SUSPEND;
 	}
 
 	return 0;
-- 
2.7.4


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