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From: hch@lst.de (Christoph Hellwig)
Subject: Requirement to get BAR pci_bus_address in user space
Date: Thu, 14 Jun 2018 16:59:42 +0200	[thread overview]
Message-ID: <20180614145942.GA4885@lst.de> (raw)
In-Reply-To: <20180614085015.3f39b367@w520.home>

On Thu, Jun 14, 2018@08:50:15AM -0600, Alex Williamson wrote:
> I don't understand the CQ vs CMB, but I think I gather that there's some
> sort of buffer that's allocated from within the devices MMIO BAR and
> some programming of the device needs to reference that buffer.
> Wouldn't you therefore use the vfio type1 IOMMU MAP_DMA ioctl to map
> the BAR into the IOVA address space and you can then use the IOVA +
> offset into the BAR for the device to reference the buffer?  It seems
> this is the same way we'd setup a peer-to-peer mapping, but we're using
> it for the device to reference itself effectively.  Thanks,

That's exactly what I meant..

  reply	other threads:[~2018-06-14 14:59 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-14 10:07 Requirement to get BAR pci_bus_address in user space Srinath Mannam
2018-06-14 10:20 ` Christoph Hellwig
2018-06-14 10:29   ` Srinath Mannam
2018-06-14 10:33     ` okaya
2018-06-14 10:48       ` Srinath Mannam
2018-06-14 14:42         ` Keith Busch
2018-06-14 14:50         ` Alex Williamson
2018-06-14 14:59           ` Christoph Hellwig [this message]
2018-06-14 20:04           ` Walker, Benjamin
2018-06-15  6:11             ` Srinath Mannam

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