Re: [PATCH v1 0/4] Add command id quirk for fabrics

Max Gurtovoy
2021-11-18T11:19:49Z

On 11/12/2021 6:07 PM, Sagi Grimberg wrote:
>
>> 6. This series just extends this quirk for fabrics.
>
> I don't think the patchset got rejected, the ask afaict was to document
> known broken controllers - exactly like pci quirks.
>
> Here is the original question from Keith:
> "Are there really fabrics targets behaving this way, or is this series
> anticipating they might exist?"
>
> I don't think there is any desire to keep any controller that got the
> spec wrong in this particular case unusable.

The example I have is the new mlx5 offload for nvme-tcp has HW design
that, unfortunately, made an optimization that relies on a indexed CID.
All the testing was done with Linux kernel's prior to the gen counter
change using internal tools, so chips now exist with some performance and
memory foot print implications when the gen counter is operated.

NVIDIA is committed to NVMe standards compliance and will fix this
design in next silicon so no quirks will be needed to get the best
performance.

I guess we can put this discussion and patch-set aside until we come
with some performance impact measurements with the mlx5 offload HW.
All we know right now is that the new CID algorithm triggers bad
performance using our internal simulation.

Thanks.