[PATCH] nvme: set dma alignment to 3

[PATCH] nvme: set dma alignment to 3

[Keith Busch]

From: Keith Busch <kbusch@kernel.org>

The nvme specification only requires qword alignment for segment
descriptors, and the driver already guarantees that. The spec has always
allowed user data to be dword aligned, which is what the queue's
attribute is for, so relax the alignment requirement to that value.

While we could allow byte alignment for some controllers when using
SGLs, we still need to support PRP, and that only allows dword.

Fixes: 3b2a1ebceba3 ("nvme: set dma alignment to qword")
Signed-off-by: Keith Busch <kbusch@kernel.org>
---
 drivers/nvme/host/core.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
index bea054565eed..0a6fb515a339 100644
--- a/drivers/nvme/host/core.c
+++ b/drivers/nvme/host/core.c
@@ -1771,7 +1771,7 @@ static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
 		blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
 	}
 	blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1);
-	blk_queue_dma_alignment(q, 7);
+	blk_queue_dma_alignment(q, 3);
 	blk_queue_write_cache(q, vwc, vwc);
 }
 
-- 
2.30.2

Re: [PATCH] nvme: set dma alignment to 3

[Christoph Hellwig]

On Wed, May 04, 2022 at 11:43:25AM -0700, Keith Busch wrote:
> From: Keith Busch <kbusch@kernel.org>
> 
> The nvme specification only requires qword alignment for segment
> descriptors, and the driver already guarantees that. The spec has always
> allowed user data to be dword aligned, which is what the queue's
> attribute is for, so relax the alignment requirement to that value.
> 
> While we could allow byte alignment for some controllers when using
> SGLs, we still need to support PRP, and that only allows dword.

Can't we just turn it go up to eleven? ;-)

Re: [PATCH] nvme: set dma alignment to 3

[Keith Busch]

On Thu, May 05, 2022 at 03:45:34PM +0200, Christoph Hellwig wrote:
> On Wed, May 04, 2022 at 11:43:25AM -0700, Keith Busch wrote:
> > From: Keith Busch <kbusch@kernel.org>
> > 
> > The nvme specification only requires qword alignment for segment
> > descriptors, and the driver already guarantees that. The spec has always
> > allowed user data to be dword aligned, which is what the queue's
> > attribute is for, so relax the alignment requirement to that value.
> > 
> > While we could allow byte alignment for some controllers when using
> > SGLs, we still need to support PRP, and that only allows dword.
> 
> Can't we just turn it go up to eleven? ;-)

Excellent idea! Best I can do is a binary 11 :p

Re: [PATCH] nvme: set dma alignment to 3

[Jonathan Derrick]

Hey Keith
On 5/4/2022 12:43 PM, Keith Busch wrote:
> From: Keith Busch <kbusch@kernel.org>
> 
> The nvme specification only requires qword alignment for segment
> descriptors, and the driver already guarantees that. The spec has always
> allowed user data to be dword aligned, which is what the queue's
> attribute is for, so relax the alignment requirement to that value.
> 
> While we could allow byte alignment for some controllers when using
> SGLs, we still need to support PRP, and that only allows dword.
> 
> Fixes: 3b2a1ebceba3 ("nvme: set dma alignment to qword")
Just a small nitpick but the original commit uses 'qword' and yours uses '3'
Would it be more descriptive to use 'dword'?

> Signed-off-by: Keith Busch <kbusch@kernel.org>
> ---
>  drivers/nvme/host/core.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c
> index bea054565eed..0a6fb515a339 100644
> --- a/drivers/nvme/host/core.c
> +++ b/drivers/nvme/host/core.c
> @@ -1771,7 +1771,7 @@ static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
>  		blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
>  	}
>  	blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1);
> -	blk_queue_dma_alignment(q, 7);
> +	blk_queue_dma_alignment(q, 3);
>  	blk_queue_write_cache(q, vwc, vwc);
>  }
>  

Re: [PATCH] nvme: set dma alignment to 3

[Christoph Hellwig]

Thanks,

applied to nvme-5.19.