From: Damien Le Moal <dlemoal@kernel.org>
To: linux-nvme@lists.infradead.org, Keith Busch <kbusch@kernel.org>,
Christoph Hellwig <hch@lst.de>, Sagi Grimberg <sagi@grimberg.me>
Subject: [PATCH 1/2] nvme: Cleanup the definition of the controller config register fields
Date: Mon, 10 Feb 2025 09:29:34 +0900 [thread overview]
Message-ID: <20250210002935.1744249-2-dlemoal@kernel.org> (raw)
In-Reply-To: <20250210002935.1744249-1-dlemoal@kernel.org>
Reorganized the enum used to define the fields of the contrller
configuration (CC) register in include/linux/nvme.h to:
1) Group together all the values defined for each field.
2) Add the missing field masks definitions.
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
---
include/linux/nvme.h | 25 ++++++++++++++++++-------
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index fe3b60818fdc..a1cf63144b1b 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -202,24 +202,35 @@ enum {
enum {
NVME_CC_ENABLE = 1 << 0,
NVME_CC_EN_SHIFT = 0,
+
NVME_CC_CSS_SHIFT = 4,
- NVME_CC_MPS_SHIFT = 7,
- NVME_CC_AMS_SHIFT = 11,
- NVME_CC_SHN_SHIFT = 14,
- NVME_CC_IOSQES_SHIFT = 16,
- NVME_CC_IOCQES_SHIFT = 20,
+ NVME_CC_CSS_MASK = 7 << NVME_CC_CSS_SHIFT,
NVME_CC_CSS_NVM = 0 << NVME_CC_CSS_SHIFT,
NVME_CC_CSS_CSI = 6 << NVME_CC_CSS_SHIFT,
- NVME_CC_CSS_MASK = 7 << NVME_CC_CSS_SHIFT,
+
+ NVME_CC_MPS_SHIFT = 7,
+ NVME_CC_MPS_MASK = 0xf << NVME_CC_MPS_SHIFT,
+
+ NVME_CC_AMS_SHIFT = 11,
+ NVME_CC_AMS_MASK = 7 << NVME_CC_AMS_SHIFT,
NVME_CC_AMS_RR = 0 << NVME_CC_AMS_SHIFT,
NVME_CC_AMS_WRRU = 1 << NVME_CC_AMS_SHIFT,
NVME_CC_AMS_VS = 7 << NVME_CC_AMS_SHIFT,
+
+ NVME_CC_SHN_SHIFT = 14,
+ NVME_CC_SHN_MASK = 3 << NVME_CC_SHN_SHIFT,
NVME_CC_SHN_NONE = 0 << NVME_CC_SHN_SHIFT,
NVME_CC_SHN_NORMAL = 1 << NVME_CC_SHN_SHIFT,
NVME_CC_SHN_ABRUPT = 2 << NVME_CC_SHN_SHIFT,
- NVME_CC_SHN_MASK = 3 << NVME_CC_SHN_SHIFT,
+
+ NVME_CC_IOSQES_SHIFT = 16,
+ NVME_CC_IOSQES_MASK = 0xf << NVME_CC_IOSQES_SHIFT,
NVME_CC_IOSQES = NVME_NVM_IOSQES << NVME_CC_IOSQES_SHIFT,
+
+ NVME_CC_IOCQES_SHIFT = 20,
+ NVME_CC_IOCQES_MASK = 0xf << NVME_CC_IOCQES_SHIFT,
NVME_CC_IOCQES = NVME_NVM_IOCQES << NVME_CC_IOCQES_SHIFT,
+
NVME_CC_CRIME = 1 << 24,
};
--
2.48.1
next prev parent reply other threads:[~2025-02-10 0:30 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-10 0:29 [PATCH 0/2] Cleanup controller configuration register handling Damien Le Moal
2025-02-10 0:29 ` Damien Le Moal [this message]
2025-02-12 18:26 ` [PATCH 1/2] nvme: Cleanup the definition of the controller config register fields Chaitanya Kulkarni
2025-02-13 6:00 ` Christoph Hellwig
2025-02-13 6:07 ` Damien Le Moal
2025-02-13 6:23 ` Christoph Hellwig
2025-02-13 6:24 ` Damien Le Moal
2025-02-10 0:29 ` [PATCH 2/2] nvmet: Use enum definitions instead of hardcoded values Damien Le Moal
2025-02-12 18:26 ` Chaitanya Kulkarni
2025-02-13 6:01 ` Christoph Hellwig
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