From: Christoph Hellwig <hch@lst.de>
To: Max Gurtovoy <mgurtovoy@nvidia.com>
Cc: sagi@grimberg.me, linux-nvme@lists.infradead.org,
kbusch@kernel.org, hch@lst.de, kch@nvidia.com, axboe@kernel.dk,
linux-block@vger.kernel.org
Subject: Re: [PATCH 1/1] nvme-pci: set virt boundary according to capability
Date: Tue, 9 Dec 2025 07:40:15 +0100 [thread overview]
Message-ID: <20251209064015.GC27728@lst.de> (raw)
In-Reply-To: <20251208222620.13882-1-mgurtovoy@nvidia.com>
On Tue, Dec 09, 2025 at 12:26:20AM +0200, Max Gurtovoy wrote:
> Some controllers advertise DWORD alignment for SGLs, so configure the
> virtual boundary correctly for those devices.
>
> Signed-off-by: Max Gurtovoy <mgurtovoy@nvidia.com>
> ---
> drivers/nvme/host/pci.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
> index e5ca8301bb8b..eacc89cd25eb 100644
> --- a/drivers/nvme/host/pci.c
> +++ b/drivers/nvme/host/pci.c
> @@ -3326,7 +3326,9 @@ static unsigned long nvme_pci_get_virt_boundary(struct nvme_ctrl *ctrl,
> {
> if (!nvme_ctrl_sgl_supported(ctrl) || is_admin)
> return NVME_CTRL_PAGE_SIZE - 1;
> - return 0;
> + else if (ctrl->sgls & NVME_CTRL_SGLS_BYTE_ALIGNED)
> + return 0;
> + return 3;
I don't think this is correct. NVME_CTRL_SGLS_BYTE_ALIGNED requires
each SGL to be aligned, but is not a virt boundary. The dma_alignment
value in the queue_limits already takes care of that.
next prev parent reply other threads:[~2025-12-09 6:40 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-08 22:26 [PATCH 1/1] nvme-pci: set virt boundary according to capability Max Gurtovoy
2025-12-09 6:40 ` Christoph Hellwig [this message]
2025-12-09 11:31 ` Max Gurtovoy
2025-12-10 11:28 ` Keith Busch
2025-12-10 11:44 ` Max Gurtovoy
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