Re: [PATCH] nvme-pci: Force NVME_QUIRK_SIMPLE_SUSPEND on Qualcomm hosts

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 25.10.2024 6:57 PM, Keith Busch wrote:
> On Fri, Oct 25, 2024 at 06:40:23PM +0200, Konrad Dybcio wrote:
>> On 25.10.2024 6:12 PM, Keith Busch wrote:
>>> On Thu, Oct 24, 2024 at 07:33:07PM +0200, Konrad Dybcio wrote:
>>>> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>>>>
>>>> The Qualcomm SC8280XP SoC requires that all PCIe hosts are powered down
>>>> before the platform can reach S3-like sleep states. This is very much
>>>> similar in nature to the issue described in [1].
>>>
>>> The "SIMPLE" quirk is only supposed to affect kernel managed runtime
>>> suspend states, s2idle or s0ix. Shouldn't s3 already be using the simple
>>> suspend?
>>
>> So on these platforms, all system sleep states (incl. S3) are entered
>> through what Linux sees as s2idle, with a separate MCU doing a lot
>> behind the scenes. s2idle of course also covers the runtime cpuidle
>> cases.
>>
>> All but the deepest state (which Linux doesn't differentiate as of
>> today) are effectively somewhat like s0ix.
>> It's a bit hard to draw accurate lines between Intel terminology and
>> what we have here, as there's way more things onboard than just the CPU
>> cluster that may be operating independently..
> 
> Gotcha.
> 
> Is there any sleep state on this where using the nvme managed power is
> advantageous, or is the simple suspend preferred in every scenario for
> this platform?

On the special snowflake SC8280XP, simple suspend is the only choice
that makes sense here. Otherwise, you'd need to keep the entire SoC
powered, which (even if most of it would be driver-suspended) ruins
battery life.

On other platforms (where we'll be able to sustain the PCIe link,
eventually), I can see both options being useful for different use
cases. But again, that's only for when we can actually get that working
on mainline.

Konrad