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Fri, 15 Jan 2021 01:12:15 -0500 (EST) Date: Fri, 15 Jan 2021 07:12:14 +0100 From: Klaus Jensen To: Christoph Hellwig Subject: Re: [PATCH] nvme: allow use of cmb on v1.4 controllers Message-ID: References: <20210114132441.193782-1-its@irrelevant.dk> <20210114173313.GA31028@lst.de> MIME-Version: 1.0 In-Reply-To: <20210114173313.GA31028@lst.de> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210115_011222_832412_AC0CEB60 X-CRM114-Status: GOOD ( 23.16 ) X-BeenThere: linux-nvme@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Keith Busch , Jens Axboe , Sagi Grimberg , linux-nvme@lists.infradead.org, Klaus Jensen Content-Type: multipart/mixed; boundary="===============8000926051700885360==" Sender: "Linux-nvme" Errors-To: linux-nvme-bounces+linux-nvme=archiver.kernel.org@lists.infradead.org --===============8000926051700885360== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="wUsAb1c1D8a8ijgm" Content-Disposition: inline --wUsAb1c1D8a8ijgm Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Jan 14 18:33, Christoph Hellwig wrote: > On Thu, Jan 14, 2021 at 02:24:41PM +0100, Klaus Jensen wrote: > > From: Klaus Jensen > >=20 > > Since NVMe v1.4 the Controller Memory Buffer must be explicitly enabled > > by the host. >=20 > Thanks, this has been on my TODO list for a while. >=20 > > + vs =3D readl(dev->bar + NVME_REG_VS); > > + > > + if (vs >=3D NVME_VS(1, 4, 0)) { > > + if (!NVME_CAP_CMBS(dev->ctrl.cap)) > > + return; >=20 > We should not check the version here, but the presence of the new > register so that controllers claiming an older version complicance > that implement the new scheme are supported as well. >=20 Understood! > Given that the old scheme is highly dangerous in virtualized enviroments > we should also warn about it and eventually required an explicit opt-in > to use it. >=20 Not completely sure what warning you'd want, so I'll leave it to you to add an 'else dev_warn(...)'. :) > > + if (vs >=3D NVME_VS(1, 4, 0)) { > > + cmbmsc =3D pci_resource_start(pdev, bar); > > + cmbmsc |=3D (NVME_CMBMSC_CRE | NVME_CMBMSC_CMSE); > > + > > + /* > > + * Writing the low bits may cause the controller to check the > > + * validity of the 52 bit controller base address in the CMBMSC > > + * register, so write the high bits first. > > + */ > > + writel(cmbmsc >> 32, dev->bar + NVME_REG_CMBMSC + 4); > > + writel(cmbmsc, dev->bar + NVME_REG_CMBMSC); >=20 > I think we should just use writeq here, with the hilo wrapper for 32-bit > platforms here. The reason why NVMe has so avoided the 64-bit access > is for buggy Apple controllers, but they are unlikely to implement CMB. Right, I tried writeq, but on QEMU I observed two 4 byte writes in wrong order anyway. hi_lo_writeq looks good. --wUsAb1c1D8a8ijgm Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmABMjwACgkQTeGvMW1P DemQ0Af9GVL2DKaPmgSleZJH4p5LL2yNq+81QhPqPupD80DEBF4DEVywDM1NPTNU 3O0V0rYxzSrAgorlGh8UJnHKTGQUbCXcoWR6daBF+n4PSwrx4nUr4WqVEN1Cv8gL 9KXBM5bloVDuywliKW/Rj7JA5dtM5tcJCuXqw5/YFbPn9eq8L5FVmpDO+94XTubG CCcCbulVFdWj7us4wj4VPQpU5bdhJKi7r9UKtoRQaRPdUXtX3ZxhB4YsXEjG2jQb ykpD/3p4DrbAk1i69uerkBL0kwmeYKEUcVBw+nRvF/WwDGczA5VSWqBT1CErSmKL BJRYB0cgS9A5V78/wj5Zybmju07CMQ== =uxb+ -----END PGP SIGNATURE----- --wUsAb1c1D8a8ijgm-- --===============8000926051700885360== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Linux-nvme mailing list Linux-nvme@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-nvme --===============8000926051700885360==--