Re: Advice appreciated - attempting data recovery on Intel Optane H10 (CSTS=0x0?)

[Keith Busch <kbusch@kernel.org>]

On Fri, Dec 08, 2023 at 06:12:28PM -0800, Jeff Johnson wrote:
> Greetings,
> 
> Seeking wisdom, many thanks to anyone who stops to read and more if
> you have advice.
> 
> I'm attempting data recovery on a odd little SSD Intel built called
> the H10. It is an M.2 NVMe SSD with two controllers and two different
> flash devices. The M.2 is bifurcated from x4 into x2x2 with a
> different controller and flash device behind each x2.
> 
> I was able to access the low side x2 (lanes 0-1) that connected to the
> 32GB 3dXpoint flash device. It was a cache so not much valuable data.
> 
> I had to do some lab gymnastics to access the high side x2 but I was
> successful. Now I can see the other controller and the link speed and
> width are fine but it won't initialize. Basically I had to disable
> PCIe spread spectrum in the system BIOS and use kapton tape to mask
> out PCIe xmt&rcv lanes for lanes 0 & 1 so the high side x2 lanes 2-3
> were the only lanes the root complex saw and connected. Crazy I know
> but it worked.
> 
> Rocky 9.3, 5.14.0-362.8.1.el9_3.x86_64
> [   12.077360] nvme nvme0: pci function 0000:06:00.0
> [   72.080442] nvme nvme0: Device not ready; aborting initialisation, CSTS=0x0

The command line tools require admin queue availability at a minimum, so
this isn't going to work.

I think you need a special PCIe port with a bifurcated retimer. I'm
guessing the nand side requires the optane side up in order to complete
some internal initialization. Perhaps it's sharing the power provided by
the other lanes.