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Tue, 25 Jun 2024 06:05:16 +0000 Message-ID: Date: Tue, 25 Jun 2024 08:05:15 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCHv2] nvme-tcp: align I/O cpu with blk-mq mapping Content-Language: en-US To: Sagi Grimberg , Christoph Hellwig , Hannes Reinecke Cc: Keith Busch , linux-nvme@lists.infradead.org References: <20240619145553.89736-1-hare@kernel.org> <20240619145958.GA2254@lst.de> From: Hannes Reinecke In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spamd-Result: default: False [-4.29 / 50.00]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; XM_UA_NO_VERSION(0.01)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; MID_RHS_MATCH_FROM(0.00)[]; ARC_NA(0.00)[]; RCVD_TLS_ALL(0.00)[]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_FIVE(0.00)[5]; FROM_EQ_ENVFROM(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240624_230520_075649_E37F8AE9 X-CRM114-Status: GOOD ( 12.20 ) X-BeenThere: linux-nvme@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-nvme" Errors-To: linux-nvme-bounces+linux-nvme=archiver.kernel.org@lists.infradead.org On 6/24/24 12:02, Sagi Grimberg wrote: > > > On 19/06/2024 18:58, Sagi Grimberg wrote: >> >> >>>> I see how you address multiple controllers falling into the same >>>> mappings case in your patch. >>>> You could have selected a different mq_map entry for each controller >>>> (out of the entries that map to the qid). >>>> >>> Looked at it, but hadn't any idea how to figure out the load. >>> The load is actually per-cpu, but we only have per controller >>> structures. >>> So we would need to introduce a per-cpu counter, detailing out the >>> number of queues scheduled on that CPU. >>> But that won't help with the CPU oversubscription issue; we still >>> might have substantially higher number of overall queues than we have >>> CPUs... >> >> I think that it would still be better than what you have right now: >> >> IIUC Right now you will have for all controllers (based on your example): >> queue 1: using cpu 6 >> queue 2: using cpu 9 >> queue 3: using cpu 18 >> >> But selecting a different mq_map entry can give: >> ctrl1: >> queue 1: using cpu 6 >> queue 2: using cpu 9 >> queue 3: using cpu 18 >> >> ctrl2: >> queue 1: using cpu 7 >> queue 2: using cpu 10 >> queue 3: using cpu 19 >> >> ctrl3: >> queue 1: using cpu 8 >> queue 2: using cpu 11 >> queue 3: using cpu 20 >> >> ctrl4: >> queue 1: using cpu 54 >> queue 2: using cpu 57 >> queue 3: using cpu 66 >> >> and so on... > > Hey Hannes, > > Did you make progress with this one? Yeah, just trying to get some performance numbers. Cheers, Hannes -- Dr. Hannes Reinecke Kernel Storage Architect hare@suse.de +49 911 74053 688 SUSE Software Solutions GmbH, Frankenstr. 146, 90461 Nürnberg HRB 36809 (AG Nürnberg), GF: I. Totev, A. McDonald, W. Knoblich