* [PATCH 1/5] mach:omap: some correction in Clock 34XX
@ 2007-11-02 15:24 Girish
2007-11-05 7:31 ` Paul Walmsley
0 siblings, 1 reply; 7+ messages in thread
From: Girish @ 2007-11-02 15:24 UTC (permalink / raw)
To: linux-omap-open-source
This patch modifies the I2C clock nodes as per LDM, corrects usage of DPLL mask
and updates the flags of 96M clock nodes
Signed-off-by: Chandra Shekhar <x0044955@ti.com>
---
arch/arm/mach-omap2/clock34xx.c | 4 +---
arch/arm/mach-omap2/clock34xx.h | 27 ++++++++++++++++++---------
2 files changed, 19 insertions(+), 12 deletions(-)
Index: linux-omap-git/arch/arm/mach-omap2/clock34xx.c
===================================================================
--- linux-omap-git.orig/arch/arm/mach-omap2/clock34xx.c 2007-10-25 18:59:42.000000000 +0530
+++ linux-omap-git/arch/arm/mach-omap2/clock34xx.c 2007-10-25 19:03:03.000000000 +0530
@@ -37,8 +37,6 @@
#include "cm.h"
#include "cm_regbits_34xx.h"
-/* CM_CLKEN_PLL*.EN* bit values */
-#define DPLL_LOCKED 0x7
/**
* omap3_dpll_recalc - recalculate DPLL rate
@@ -79,7 +77,7 @@
WARN_ON(!dd->control_reg || !dd->enable_mask);
v = cm_read_reg(dd->control_reg) & dd->enable_mask;
- if (v != DPLL_LOCKED)
+ if (v != dd->enable_mask)
clk->rate = clk->parent->rate;
else
clk->rate = clk->parent->rate * 2;
Index: linux-omap-git/arch/arm/mach-omap2/clock34xx.h
===================================================================
--- linux-omap-git.orig/arch/arm/mach-omap2/clock34xx.h 2007-10-25 18:59:49.000000000 +0530
+++ linux-omap-git/arch/arm/mach-omap2/clock34xx.h 2007-10-25 19:03:03.000000000 +0530
@@ -437,14 +437,16 @@
static struct clk omap_96m_alwon_fck = {
.name = "omap_96m_alwon_fck",
.parent = &dpll4_m2x2_ck,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
+ PARENT_CONTROLS_CLOCK,
.recalc = &followparent_recalc,
};
static struct clk omap_96m_fck = {
.name = "omap_96m_fck",
.parent = &omap_96m_alwon_fck,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
+ PARENT_CONTROLS_CLOCK,
.recalc = &followparent_recalc,
};
@@ -830,7 +832,8 @@
static struct clk core_96m_fck = {
.name = "core_96m_fck",
.parent = &omap_96m_fck,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
+ PARENT_CONTROLS_CLOCK,
.recalc = &followparent_recalc,
};
@@ -862,7 +865,8 @@
};
static struct clk i2c3_fck = {
- .name = "i2c3_fck",
+ .name = "i2c_fck",
+ .id = 3,
.parent = &core_96m_fck,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430_EN_I2C3_SHIFT,
@@ -871,7 +875,8 @@
};
static struct clk i2c2_fck = {
- .name = "i2c2_fck",
+ .name = "i2c_fck",
+ .id = 2,
.parent = &core_96m_fck,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430_EN_I2C2_SHIFT,
@@ -880,7 +885,8 @@
};
static struct clk i2c1_fck = {
- .name = "i2c1_fck",
+ .name = "i2c_fck",
+ .id = 1,
.parent = &core_96m_fck,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430_EN_I2C1_SHIFT,
@@ -1222,7 +1228,8 @@
};
static struct clk i2c3_ick = {
- .name = "i2c3_ick",
+ .name = "i2c_ick",
+ .id = 3,
.parent = &core_l4_ick,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
.enable_bit = OMAP3430_EN_I2C3_SHIFT,
@@ -1231,7 +1238,8 @@
};
static struct clk i2c2_ick = {
- .name = "i2c2_ick",
+ .name = "i2c_ick",
+ .id = 2,
.parent = &core_l4_ick,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
.enable_bit = OMAP3430_EN_I2C2_SHIFT,
@@ -1240,7 +1248,8 @@
};
static struct clk i2c1_ick = {
- .name = "i2c1_ick",
+ .name = "i2c_ick",
+ .id = 1,
.parent = &core_l4_ick,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
.enable_bit = OMAP3430_EN_I2C1_SHIFT,
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 1/5] mach:omap: some correction in Clock 34XX
2007-11-02 15:24 [PATCH 1/5] mach:omap: some correction in Clock 34XX Girish
@ 2007-11-05 7:31 ` Paul Walmsley
2007-11-05 9:02 ` Choraria, Rohit
0 siblings, 1 reply; 7+ messages in thread
From: Paul Walmsley @ 2007-11-05 7:31 UTC (permalink / raw)
To: Girish; +Cc: linux-omap-open-source
Hi Girish,
Your changes to clock34xx.h look good. But the change to clock34xx.c
isn't quite right. The dpll_params.enable_mask field is intended to be a
mask for the register's enable bits - i.e., something one would
logical-AND with the shifted contents of CM_CLKEN_PLL* - rather than the
value to logical-OR into those bits to indicate a locked DPLL. The two
values happen to coincide, so the change is functionally harmless; but
semantically, not what was intended for the enable_mask field. Would you
care to resubmit the patch with the clock34xx.c change dropped?
Regards,
- Paul
On Fri, 2 Nov 2007, Girish wrote:
> This patch modifies the I2C clock nodes as per LDM, corrects usage of DPLL mask
> and updates the flags of 96M clock nodes
> Signed-off-by: Chandra Shekhar <x0044955@ti.com>
>
> ---
> arch/arm/mach-omap2/clock34xx.c | 4 +---
> arch/arm/mach-omap2/clock34xx.h | 27 ++++++++++++++++++---------
> 2 files changed, 19 insertions(+), 12 deletions(-)
>
> Index: linux-omap-git/arch/arm/mach-omap2/clock34xx.c
> ===================================================================
> --- linux-omap-git.orig/arch/arm/mach-omap2/clock34xx.c 2007-10-25 18:59:42.000000000 +0530
> +++ linux-omap-git/arch/arm/mach-omap2/clock34xx.c 2007-10-25 19:03:03.000000000 +0530
> @@ -37,8 +37,6 @@
> #include "cm.h"
> #include "cm_regbits_34xx.h"
>
> -/* CM_CLKEN_PLL*.EN* bit values */
> -#define DPLL_LOCKED 0x7
>
> /**
> * omap3_dpll_recalc - recalculate DPLL rate
> @@ -79,7 +77,7 @@
> WARN_ON(!dd->control_reg || !dd->enable_mask);
>
> v = cm_read_reg(dd->control_reg) & dd->enable_mask;
> - if (v != DPLL_LOCKED)
> + if (v != dd->enable_mask)
> clk->rate = clk->parent->rate;
> else
> clk->rate = clk->parent->rate * 2;
> Index: linux-omap-git/arch/arm/mach-omap2/clock34xx.h
> ===================================================================
> --- linux-omap-git.orig/arch/arm/mach-omap2/clock34xx.h 2007-10-25 18:59:49.000000000 +0530
> +++ linux-omap-git/arch/arm/mach-omap2/clock34xx.h 2007-10-25 19:03:03.000000000 +0530
> @@ -437,14 +437,16 @@
> static struct clk omap_96m_alwon_fck = {
> .name = "omap_96m_alwon_fck",
> .parent = &dpll4_m2x2_ck,
> - .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
> + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
> + PARENT_CONTROLS_CLOCK,
> .recalc = &followparent_recalc,
> };
>
> static struct clk omap_96m_fck = {
> .name = "omap_96m_fck",
> .parent = &omap_96m_alwon_fck,
> - .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
> + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
> + PARENT_CONTROLS_CLOCK,
> .recalc = &followparent_recalc,
> };
>
> @@ -830,7 +832,8 @@
> static struct clk core_96m_fck = {
> .name = "core_96m_fck",
> .parent = &omap_96m_fck,
> - .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
> + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
> + PARENT_CONTROLS_CLOCK,
> .recalc = &followparent_recalc,
> };
>
> @@ -862,7 +865,8 @@
> };
>
> static struct clk i2c3_fck = {
> - .name = "i2c3_fck",
> + .name = "i2c_fck",
> + .id = 3,
> .parent = &core_96m_fck,
> .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
> .enable_bit = OMAP3430_EN_I2C3_SHIFT,
> @@ -871,7 +875,8 @@
> };
>
> static struct clk i2c2_fck = {
> - .name = "i2c2_fck",
> + .name = "i2c_fck",
> + .id = 2,
> .parent = &core_96m_fck,
> .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
> .enable_bit = OMAP3430_EN_I2C2_SHIFT,
> @@ -880,7 +885,8 @@
> };
>
> static struct clk i2c1_fck = {
> - .name = "i2c1_fck",
> + .name = "i2c_fck",
> + .id = 1,
> .parent = &core_96m_fck,
> .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
> .enable_bit = OMAP3430_EN_I2C1_SHIFT,
> @@ -1222,7 +1228,8 @@
> };
>
> static struct clk i2c3_ick = {
> - .name = "i2c3_ick",
> + .name = "i2c_ick",
> + .id = 3,
> .parent = &core_l4_ick,
> .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
> .enable_bit = OMAP3430_EN_I2C3_SHIFT,
> @@ -1231,7 +1238,8 @@
> };
>
> static struct clk i2c2_ick = {
> - .name = "i2c2_ick",
> + .name = "i2c_ick",
> + .id = 2,
> .parent = &core_l4_ick,
> .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
> .enable_bit = OMAP3430_EN_I2C2_SHIFT,
> @@ -1240,7 +1248,8 @@
> };
>
> static struct clk i2c1_ick = {
> - .name = "i2c1_ick",
> + .name = "i2c_ick",
> + .id = 1,
> .parent = &core_l4_ick,
> .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
> .enable_bit = OMAP3430_EN_I2C1_SHIFT,
>
> _______________________________________________
> Linux-omap-open-source mailing list
> Linux-omap-open-source@linux.omap.com
> http://linux.omap.com/mailman/listinfo/linux-omap-open-source
>
- Paul
^ permalink raw reply [flat|nested] 7+ messages in thread* RE: [PATCH 1/5] mach:omap: some correction in Clock 34XX
2007-11-05 7:31 ` Paul Walmsley
@ 2007-11-05 9:02 ` Choraria, Rohit
2007-11-06 9:48 ` Paul Walmsley
0 siblings, 1 reply; 7+ messages in thread
From: Choraria, Rohit @ 2007-11-05 9:02 UTC (permalink / raw)
To: Paul Walmsley, Ghongadematt, Girish; +Cc: linux-omap-open-source
Hi Paul,
> Your changes to clock34xx.h look good. But the change to clock34xx.c
> isn't quite right. The dpll_params.enable_mask field is
> intended to be a
> mask for the register's enable bits - i.e., something one would
> logical-AND with the shifted contents of CM_CLKEN_PLL* -
> rather than the
> value to logical-OR into those bits to indicate a locked
> DPLL. The two
> values happen to coincide, so the change is functionally
> harmless; but
> semantically, not what was intended for the enable_mask
> field. Would you
> care to resubmit the patch with the clock34xx.c change dropped?
>
When we were debugging the clock code, we found that the change in clock.c was required to reflect the correct rate of dpll4_x2_ck.
v = cm_read_reg(dd->control_reg) & dd->enable_mask;
- if (v != DPLL_LOCKED)
+ if (v != dd->enable_mask)
clk->rate = clk->parent->rate;
else
clk->rate = clk->parent->rate * 2;
Previously, DPLL_LOCKED was defined as 0x7 - this worked for DPLL3 but for DPLL4, the value is supposed to be 0x7000.
If there was an enable_bit in dpll_data structure, we could have shifted DPLL_LOCKED by enable_bit and compared with the register value.
Since the current implementation will return wrong rate for DPLL4, we made this modification.
Can you suggest some other way of implementing this.
Regards,
Rohit
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH 1/5] mach:omap: some correction in Clock 34XX
2007-11-05 9:02 ` Choraria, Rohit
@ 2007-11-06 9:48 ` Paul Walmsley
0 siblings, 0 replies; 7+ messages in thread
From: Paul Walmsley @ 2007-11-06 9:48 UTC (permalink / raw)
To: Choraria, Rohit; +Cc: linux-omap-open-source
Hello Rohit,
On Mon, 5 Nov 2007, Choraria, Rohit wrote:
> When we were debugging the clock code, we found that the change in clock.c was required to reflect the correct rate of dpll4_x2_ck.
>
> v = cm_read_reg(dd->control_reg) & dd->enable_mask;
> - if (v != DPLL_LOCKED)
> + if (v != dd->enable_mask)
> clk->rate = clk->parent->rate;
> else
> clk->rate = clk->parent->rate * 2;
>
> Previously, DPLL_LOCKED was defined as 0x7 - this worked for DPLL3 but for DPLL4, the value is supposed to be 0x7000.
Good point. That code was broken.
> If there was an enable_bit in dpll_data structure, we could have shifted DPLL_LOCKED by enable_bit and compared with the register value.
> Since the current implementation will return wrong rate for DPLL4, we made this modification.
> Can you suggest some other way of implementing this.
I would suggest:
v = cm_read_reg(dd->control_reg) & dd->enable_mask;
+ v >>= mask_to_shift(dd->enable_mask);
if (v != DPLL_LOCKED)
clk->rate = clk->parent->rate;
else
clk->rate = clk->parent->rate * 2;
- Paul
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/5] mach:omap: some correction in Clock 34XX
@ 2007-11-12 13:46 Chandra shekhar
2007-11-15 21:14 ` Paul Walmsley
0 siblings, 1 reply; 7+ messages in thread
From: Chandra shekhar @ 2007-11-12 13:46 UTC (permalink / raw)
To: linux-omap-open-source
Resumbmitting the patch earlier sent by girish, after fixing review comments given by paul.
This patch modifies the I2C clock nodes as per LDM, corrects usage of DPLL mask and updates the flags of 96M clock nodes
Signed-off-by: Chandra Shekhar <x0044955@ti.com>
---
arch/arm/mach-omap2/clock34xx.c | 1 +
arch/arm/mach-omap2/clock34xx.h | 27 ++++++++++++++++++---------
2 files changed, 19 insertions(+), 9 deletions(-)
Index: linux-omap-git/arch/arm/mach-omap2/clock34xx.h
===================================================================
--- linux-omap-git.orig/arch/arm/mach-omap2/clock34xx.h 2007-11-12 17:07:54.000000000 +0530
+++ linux-omap-git/arch/arm/mach-omap2/clock34xx.h 2007-11-12 17:08:23.000000000 +0530
@@ -437,14 +437,16 @@
static struct clk omap_96m_alwon_fck = {
.name = "omap_96m_alwon_fck",
.parent = &dpll4_m2x2_ck,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
+ PARENT_CONTROLS_CLOCK,
.recalc = &followparent_recalc,
};
static struct clk omap_96m_fck = {
.name = "omap_96m_fck",
.parent = &omap_96m_alwon_fck,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
+ PARENT_CONTROLS_CLOCK,
.recalc = &followparent_recalc,
};
@@ -830,7 +832,8 @@
static struct clk core_96m_fck = {
.name = "core_96m_fck",
.parent = &omap_96m_fck,
- .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES,
+ .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES |
+ PARENT_CONTROLS_CLOCK,
.recalc = &followparent_recalc,
};
@@ -862,7 +865,8 @@
};
static struct clk i2c3_fck = {
- .name = "i2c3_fck",
+ .name = "i2c_fck",
+ .id = 3,
.parent = &core_96m_fck,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430_EN_I2C3_SHIFT,
@@ -871,7 +875,8 @@
};
static struct clk i2c2_fck = {
- .name = "i2c2_fck",
+ .name = "i2c_fck",
+ .id = 2,
.parent = &core_96m_fck,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430_EN_I2C2_SHIFT,
@@ -880,7 +885,8 @@
};
static struct clk i2c1_fck = {
- .name = "i2c1_fck",
+ .name = "i2c_fck",
+ .id = 1,
.parent = &core_96m_fck,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
.enable_bit = OMAP3430_EN_I2C1_SHIFT,
@@ -1222,7 +1228,8 @@
};
static struct clk i2c3_ick = {
- .name = "i2c3_ick",
+ .name = "i2c_ick",
+ .id = 3,
.parent = &core_l4_ick,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
.enable_bit = OMAP3430_EN_I2C3_SHIFT,
@@ -1231,7 +1238,8 @@
};
static struct clk i2c2_ick = {
- .name = "i2c2_ick",
+ .name = "i2c_ick",
+ .id = 2,
.parent = &core_l4_ick,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
.enable_bit = OMAP3430_EN_I2C2_SHIFT,
@@ -1240,7 +1248,8 @@
};
static struct clk i2c1_ick = {
- .name = "i2c1_ick",
+ .name = "i2c_ick",
+ .id = 1,
.parent = &core_l4_ick,
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
.enable_bit = OMAP3430_EN_I2C1_SHIFT,
Index: linux-omap-git/arch/arm/mach-omap2/clock34xx.c
===================================================================
--- linux-omap-git.orig/arch/arm/mach-omap2/clock34xx.c 2007-11-12 17:07:57.000000000 +0530
+++ linux-omap-git/arch/arm/mach-omap2/clock34xx.c 2007-11-12 17:09:17.000000000 +0530
@@ -79,6 +79,7 @@
WARN_ON(!dd->control_reg || !dd->enable_mask);
v = cm_read_reg(dd->control_reg) & dd->enable_mask;
+ v >>= mask_to_shift(dd->enable_mask);
if (v != DPLL_LOCKED)
clk->rate = clk->parent->rate;
else
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 1/5] mach:omap: some correction in Clock 34XX
2007-11-12 13:46 Chandra shekhar
@ 2007-11-15 21:14 ` Paul Walmsley
2007-11-15 21:16 ` Tony Lindgren
0 siblings, 1 reply; 7+ messages in thread
From: Paul Walmsley @ 2007-11-15 21:14 UTC (permalink / raw)
To: Chandra shekhar; +Cc: linux-omap-open-source
On Mon, 12 Nov 2007, Chandra shekhar wrote:
>
> Resumbmitting the patch earlier sent by girish, after fixing review comments given by paul.
>
> This patch modifies the I2C clock nodes as per LDM, corrects usage of DPLL mask and updates the flags of 96M clock nodes
>
> Signed-off-by: Chandra Shekhar <x0044955@ti.com>
Thanks Chandra, looks good.
Acked-by: Paul Walmsley <paul@pwsan.com>
- Paul
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/5] mach:omap: some correction in Clock 34XX
2007-11-15 21:14 ` Paul Walmsley
@ 2007-11-15 21:16 ` Tony Lindgren
0 siblings, 0 replies; 7+ messages in thread
From: Tony Lindgren @ 2007-11-15 21:16 UTC (permalink / raw)
To: Paul Walmsley; +Cc: linux-omap-open-source
* Paul Walmsley <paul@booyaka.com> [071115 13:15]:
> On Mon, 12 Nov 2007, Chandra shekhar wrote:
>
> >
> > Resumbmitting the patch earlier sent by girish, after fixing review comments given by paul.
> >
> > This patch modifies the I2C clock nodes as per LDM, corrects usage of DPLL mask and updates the flags of 96M clock nodes
> >
> > Signed-off-by: Chandra Shekhar <x0044955@ti.com>
>
> Thanks Chandra, looks good.
>
> Acked-by: Paul Walmsley <paul@pwsan.com>
Pushing.
Tony
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2007-11-15 21:16 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2007-11-02 15:24 [PATCH 1/5] mach:omap: some correction in Clock 34XX Girish
2007-11-05 7:31 ` Paul Walmsley
2007-11-05 9:02 ` Choraria, Rohit
2007-11-06 9:48 ` Paul Walmsley
-- strict thread matches above, loose matches on Subject: below --
2007-11-12 13:46 Chandra shekhar
2007-11-15 21:14 ` Paul Walmsley
2007-11-15 21:16 ` Tony Lindgren
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox