From: Matthew Percival <matthew@capgo.com>
To: Linux OMAP Open Source <linux-omap-open-source@linux.omap.com>
Subject: Re: Re: Regarding McBSP Int ...help needed... (Matthew Percival)
Date: Wed, 21 Dec 2005 09:40:05 +1100 [thread overview]
Message-ID: <1135118405.8928.17.camel@localhost.localdomain> (raw)
In-Reply-To: <D8595042F3765A4285B848A78A2C2ED101F596EA@bsdmsg002.corp.satyam.ad>
G'Day,
> There is indeed a bit a advance in the sense, My ISR is executed twice
> now after including ur line of code. But after that no response.
I would say that your interrupts are all working fine now (it is
executes twice, it is unlikely that you have any problems there), but I
would be inclined to say that your problem is related to your McBSP
configuration: the interrupt is probably not being asserted a third time
for some reason (you might want to watch the L2.0 handler registers to
confirm this).
My guess would be that you get the first interrupt, fill the McBSP
buffer, and this buffer is then loaded to be transmitted; now the buffer
is empty, you get the second interrupt and again fill the buffer. If
the transmission never occurs, however, the buffer will never be emptied
again, therefore the interrupt will not be asserted a third time. This
is just speculation, but I would suggest first confirming that the
interrupt is indeed asserted a third time, and if not then make sure
that your McBSP is actually transmitting.
-- Matthew
prev parent reply other threads:[~2005-12-20 22:40 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-12-20 5:52 Re: Regarding McBSP Int ...help needed... (Matthew Percival) Raghu_Mallya
2005-12-20 22:40 ` Matthew Percival [this message]
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