Re: Re: Regarding McBSP Int ...help needed... (Matthew Percival)

Re: Re: Regarding McBSP Int ...help needed... (Matthew Percival)

[Raghu_Mallya]

Hi:

Thanks for the reply matthew. 
I tried your directions  and now my code looks as below.

 Void McBSPRxInterrupt(Void)
 {   
       Uns McBSP1Data;
      Uns InterruptStatus; 
       
       //code to check if the interrupt is from McBSP1 or McBSP3
      InterruptStatus = inw(_LEV2_SIR_FIQ);
      
       
 	  McBSP1Data = inw(_MCBSP1_DRR1); // copy contents of McBSP
receive
 							//register to
variable
	outw(inw(DSP_L21_CONTROL) | NEW_FIQ_AGR, DSP_L21_CONTROL);

 }

There is indeed a bit a advance in the sense, My ISR is executed twice
now after including ur line of code. But after that no response. 

I am checking for the ISR execution as below.
First of all I have declared a global variable ie cpy=0x0000(initialized
to zero) b/w toklibios and ex_task and in the ISR I am incrementing this
variable by one
, In the ex_task.out I am doing a word send of the variable. Before
including your line of code is used to get cpy=0x0001 but after ur code
is included it get cpy=0x0002 and then no increments... not able to
figure out why the ISR stops executing in b/w. any idea about this

Regards

Raghu


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Re: Re: Regarding McBSP Int ...help needed... (Matthew Percival)

[Matthew Percival]

G'Day,

> There is indeed a bit a advance in the sense, My ISR is executed twice
> now after including ur line of code. But after that no response. 

	I would say that your interrupts are all working fine now (it is
executes twice, it is unlikely that you have any problems there), but I
would be inclined to say that your problem is related to your McBSP
configuration: the interrupt is probably not being asserted a third time
for some reason (you might want to watch the L2.0 handler registers to
confirm this).

	My guess would be that you get the first interrupt, fill the McBSP
buffer, and this buffer is then loaded to be transmitted; now the buffer
is empty, you get the second interrupt and again fill the buffer.  If
the transmission never occurs, however, the buffer will never be emptied
again, therefore the interrupt will not be asserted a third time.  This
is just speculation, but I would suggest first confirming that the
interrupt is indeed asserted a third time, and if not then make sure
that your McBSP is actually transmitting.

	-- Matthew