Re: Bug in linux omap clock framework?

[Tomi Valkeinen <tomi.valkeinen@nokia.com>]

On Mon, 2008-12-08 at 02:24 -0700, ext Paul Walmsley wrote:
> Hi Tomi,
> 
> On Mon, 8 Dec 2008, Tomi Valkeinen wrote:
> 
> > On Sat, 2008-12-06 at 16:51 -0700, ext Paul Walmsley wrote:
> 
> > > Based on the traceback that you sent, I'd conjecture that probably some 
> > > part of the DSS subsystem is generating an interrupt via DSS_IRQ; but then 
> > > dss_iclk ends up disabled, and the MPU INTC is not able to communicate 
> > > with the DSS, and the INTC wedges.  (The aborting access is to 0xd8200098, 
> > > the INTCPS_PENDING_IRQ0 register, rather than a DSS register.)  Probably 
> > > some IRQs need to be masked before disabling the dss_iclk.
> > 
> > Okay. So, is this a DSS problem or clock framework problem? 
> 
> At this point my guess would be that it is a DSS driver problem, but I 
> don't think it is clear yet.

Also, after disabling CONFIG_PM the code doesn't crash anymore...
Something is turning powers/clocks off too eagerly?

 Tomi