* [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED L1 entries
@ 2010-08-08 10:17 Santosh Shilimkar
2010-08-08 11:34 ` Russell King - ARM Linux
2010-08-08 11:35 ` Russell King - ARM Linux
0 siblings, 2 replies; 6+ messages in thread
From: Santosh Shilimkar @ 2010-08-08 10:17 UTC (permalink / raw)
To: linux-omap; +Cc: linux-arm-kernel, Santosh Shilimkar, Russell King
This patch populates the L1 entries for MT_MEMORY and MT_MEMORY_NONACHED
types so that at boot-up, we can map memories outside system memory
at page level granularity
Previously the mapping was limiting to section level, which creates
unnecessary addiotional mapping for which physical memory may not
present. On the newer ARM with speculation, this is dangerous and can
result in untraceable aborts.
The patch is based on inputs from Russell King
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
---
arch/arm/mm/mmu.c | 18 ++++++++++++++++--
1 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 6e1c4f6..4ede969 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -246,6 +246,9 @@ static struct mem_type mem_types[] = {
.domain = DOMAIN_USER,
},
[MT_MEMORY] = {
+ .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
+ L_PTE_USER | L_PTE_EXEC,
+ .prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
.domain = DOMAIN_KERNEL,
},
@@ -254,6 +257,9 @@ static struct mem_type mem_types[] = {
.domain = DOMAIN_KERNEL,
},
[MT_MEMORY_NONCACHED] = {
+ .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
+ L_PTE_USER | L_PTE_EXEC,
+ .prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
.domain = DOMAIN_KERNEL,
},
@@ -411,9 +417,12 @@ static void __init build_mem_type_table(void)
* Enable CPU-specific coherency if supported.
* (Only available on XSC3 at the moment.)
*/
- if (arch_is_coherent() && cpu_is_xsc3())
+ if (arch_is_coherent() && cpu_is_xsc3()) {
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
-
+ mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
+ mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
+ mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
+ }
/*
* ARMv6 and above have extended page tables.
*/
@@ -438,7 +447,9 @@ static void __init build_mem_type_table(void)
mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
+ mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
+ mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
#endif
}
@@ -475,6 +486,9 @@ static void __init build_mem_type_table(void)
mem_types[MT_LOW_VECTORS].prot_l1 |= ecc_mask;
mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask;
mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp->pmd;
+ mem_types[MT_MEMORY].prot_pte |= kern_pgprot;
+ mem_types[MT_MEMORY_NONCACHED].prot_sect |= ecc_mask | cp->pmd;
+ mem_types[MT_MEMORY_NONCACHED].prot_pte |= kern_pgprot;
mem_types[MT_ROM].prot_sect |= cp->pmd;
switch (cp->pmd) {
--
1.6.0.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED L1 entries
2010-08-08 10:17 [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED L1 entries Santosh Shilimkar
@ 2010-08-08 11:34 ` Russell King - ARM Linux
2010-08-08 11:46 ` Shilimkar, Santosh
2010-08-08 11:35 ` Russell King - ARM Linux
1 sibling, 1 reply; 6+ messages in thread
From: Russell King - ARM Linux @ 2010-08-08 11:34 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap, linux-arm-kernel
On Sun, Aug 08, 2010 at 03:47:52PM +0530, Santosh Shilimkar wrote:
> @@ -475,6 +486,9 @@ static void __init build_mem_type_table(void)
> mem_types[MT_LOW_VECTORS].prot_l1 |= ecc_mask;
> mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask;
> mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp->pmd;
> + mem_types[MT_MEMORY].prot_pte |= kern_pgprot;
> + mem_types[MT_MEMORY_NONCACHED].prot_sect |= ecc_mask | cp->pmd;
> + mem_types[MT_MEMORY_NONCACHED].prot_pte |= kern_pgprot;
This is wrong - it will result in the non-cached memory mapped in as
sections having the same cache settings as MT_MEMORY - in other
words, probably write back.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED L1 entries
2010-08-08 10:17 [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED L1 entries Santosh Shilimkar
2010-08-08 11:34 ` Russell King - ARM Linux
@ 2010-08-08 11:35 ` Russell King - ARM Linux
2010-08-08 11:44 ` Shilimkar, Santosh
1 sibling, 1 reply; 6+ messages in thread
From: Russell King - ARM Linux @ 2010-08-08 11:35 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap, linux-arm-kernel
On Sun, Aug 08, 2010 at 03:47:52PM +0530, Santosh Shilimkar wrote:
> This patch populates the L1 entries for MT_MEMORY and MT_MEMORY_NONACHED
Spelling.
> types so that at boot-up, we can map memories outside system memory
> at page level granularity
If you're only using MT_MEMORY_NONCACHED (it seems so from patch 4),
please only modify that entry.
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED L1 entries
2010-08-08 11:35 ` Russell King - ARM Linux
@ 2010-08-08 11:44 ` Shilimkar, Santosh
0 siblings, 0 replies; 6+ messages in thread
From: Shilimkar, Santosh @ 2010-08-08 11:44 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
> -----Original Message-----
> From: Russell King - ARM Linux [mailto:linux@arm.linux.org.uk]
> Sent: Sunday, August 08, 2010 5:06 PM
> To: Shilimkar, Santosh
> Cc: linux-omap@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> Subject: Re: [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED
> L1 entries
>
> On Sun, Aug 08, 2010 at 03:47:52PM +0530, Santosh Shilimkar wrote:
> > This patch populates the L1 entries for MT_MEMORY and MT_MEMORY_NONACHED
>
> Spelling.
>
> > types so that at boot-up, we can map memories outside system memory
> > at page level granularity
>
> If you're only using MT_MEMORY_NONCACHED (it seems so from patch 4),
> please only modify that entry.
Patch 2 uses "MT_MEMORY_NONCACHED" for OMAP3 and MT_MEMORY for
rest of the OMAPs. So we need both.
Regards,
Santosh
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED L1 entries
2010-08-08 11:34 ` Russell King - ARM Linux
@ 2010-08-08 11:46 ` Shilimkar, Santosh
2010-08-09 9:19 ` Shilimkar, Santosh
0 siblings, 1 reply; 6+ messages in thread
From: Shilimkar, Santosh @ 2010-08-08 11:46 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
> -----Original Message-----
> From: Russell King - ARM Linux [mailto:linux@arm.linux.org.uk]
> Sent: Sunday, August 08, 2010 5:04 PM
> To: Shilimkar, Santosh
> Cc: linux-omap@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> Subject: Re: [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED
> L1 entries
>
> On Sun, Aug 08, 2010 at 03:47:52PM +0530, Santosh Shilimkar wrote:
> > @@ -475,6 +486,9 @@ static void __init build_mem_type_table(void)
> > mem_types[MT_LOW_VECTORS].prot_l1 |= ecc_mask;
> > mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask;
> > mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp->pmd;
> > + mem_types[MT_MEMORY].prot_pte |= kern_pgprot;
> > + mem_types[MT_MEMORY_NONCACHED].prot_sect |= ecc_mask | cp->pmd;
> > + mem_types[MT_MEMORY_NONCACHED].prot_pte |= kern_pgprot;
>
> This is wrong - it will result in the non-cached memory mapped in as
> sections having the same cache settings as MT_MEMORY - in other
> words, probably write back.
You are right. Will fix this in next version.
Regards,
Santosh
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED L1 entries
2010-08-08 11:46 ` Shilimkar, Santosh
@ 2010-08-09 9:19 ` Shilimkar, Santosh
0 siblings, 0 replies; 6+ messages in thread
From: Shilimkar, Santosh @ 2010-08-09 9:19 UTC (permalink / raw)
To: linux-omap@vger.kernel.org
Cc: Russell King - ARM Linux, linux-arm-kernel@lists.infradead.org
[-- Attachment #1: Type: text/plain, Size: 4749 bytes --]
> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> owner@vger.kernel.org] On Behalf Of Shilimkar, Santosh
> Sent: Sunday, August 08, 2010 5:16 PM
> To: Russell King - ARM Linux
> Cc: linux-omap@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> Subject: RE: [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED
> L1 entries
>
> > -----Original Message-----
> > From: Russell King - ARM Linux [mailto:linux@arm.linux.org.uk]
> > Sent: Sunday, August 08, 2010 5:04 PM
> > To: Shilimkar, Santosh
> > Cc: linux-omap@vger.kernel.org; linux-arm-kernel@lists.infradead.org
> > Subject: Re: [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and
> MT_MEMORY_NONACHED
> > L1 entries
> >
> > On Sun, Aug 08, 2010 at 03:47:52PM +0530, Santosh Shilimkar wrote:
> > > @@ -475,6 +486,9 @@ static void __init build_mem_type_table(void)
> > > mem_types[MT_LOW_VECTORS].prot_l1 |= ecc_mask;
> > > mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask;
> > > mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp->pmd;
> > > + mem_types[MT_MEMORY].prot_pte |= kern_pgprot;
> > > + mem_types[MT_MEMORY_NONCACHED].prot_sect |= ecc_mask | cp->pmd;
> > > + mem_types[MT_MEMORY_NONCACHED].prot_pte |= kern_pgprot;
> >
> > This is wrong - it will result in the non-cached memory mapped in as
> > sections having the same cache settings as MT_MEMORY - in other
> > words, probably write back.
> You are right. Will fix this in next version.
>
Updated version with Russell's comments incorporated.
--------------------------------------------------------------------
>From 23d712c1846d78bdb09979087261911e5d80f014 Mon Sep 17 00:00:00 2001
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
Date: Sun, 8 Aug 2010 12:05:25 +0530
Subject: [PATCH 1/3 v2] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONCACHED L1 entries
This patch populates the L1 entries for MT_MEMORY and MT_MEMORY_NONCACHED
types so that at boot-up, we can map memories outside system memory
at page level granularity
Previously the mapping was limiting to section level, which creates
unnecessary additional mapping for which physical memory may not
present. On the newer ARM with speculation, this is dangerous and can
result in untraceable aborts.
The patch is based on inputs from Russell King
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
---
arch/arm/mm/mmu.c | 17 +++++++++++++++--
1 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 6e1c4f6..3e986a6 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -246,6 +246,9 @@ static struct mem_type mem_types[] = {
.domain = DOMAIN_USER,
},
[MT_MEMORY] = {
+ .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
+ L_PTE_USER | L_PTE_EXEC,
+ .prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
.domain = DOMAIN_KERNEL,
},
@@ -254,6 +257,9 @@ static struct mem_type mem_types[] = {
.domain = DOMAIN_KERNEL,
},
[MT_MEMORY_NONCACHED] = {
+ .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
+ L_PTE_USER | L_PTE_EXEC | L_PTE_MT_BUFFERABLE,
+ .prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
.domain = DOMAIN_KERNEL,
},
@@ -411,9 +417,12 @@ static void __init build_mem_type_table(void)
* Enable CPU-specific coherency if supported.
* (Only available on XSC3 at the moment.)
*/
- if (arch_is_coherent() && cpu_is_xsc3())
+ if (arch_is_coherent() && cpu_is_xsc3()) {
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
-
+ mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
+ mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
+ mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
+ }
/*
* ARMv6 and above have extended page tables.
*/
@@ -438,7 +447,9 @@ static void __init build_mem_type_table(void)
mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
+ mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
+ mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
#endif
}
@@ -475,6 +486,8 @@ static void __init build_mem_type_table(void)
mem_types[MT_LOW_VECTORS].prot_l1 |= ecc_mask;
mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask;
mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp->pmd;
+ mem_types[MT_MEMORY].prot_pte |= kern_pgprot;
+ mem_types[MT_MEMORY_NONCACHED].prot_sect |= ecc_mask;
mem_types[MT_ROM].prot_sect |= cp->pmd;
switch (cp->pmd) {
--
1.6.0.4
[-- Attachment #2: 0001-ARM-mmu-Setup-MT_MEMORY-and-MT_MEMORY_NONCACHED-L1.patch --]
[-- Type: application/octet-stream, Size: 3089 bytes --]
From 23d712c1846d78bdb09979087261911e5d80f014 Mon Sep 17 00:00:00 2001
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
Date: Sun, 8 Aug 2010 12:05:25 +0530
Subject: [PATCH 1/3 v2] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONCACHED L1 entries
This patch populates the L1 entries for MT_MEMORY and MT_MEMORY_NONCACHED
types so that at boot-up, we can map memories outside system memory
at page level granularity
Previously the mapping was limiting to section level, which creates
unnecessary additional mapping for which physical memory may not
present. On the newer ARM with speculation, this is dangerous and can
result in untraceable aborts.
The patch is based on inputs from Russell King
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Russell King <linux@arm.linux.org.uk>
---
Updated verion with RMK's comments.
arch/arm/mm/mmu.c | 17 +++++++++++++++--
1 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 6e1c4f6..3e986a6 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -246,6 +246,9 @@ static struct mem_type mem_types[] = {
.domain = DOMAIN_USER,
},
[MT_MEMORY] = {
+ .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
+ L_PTE_USER | L_PTE_EXEC,
+ .prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
.domain = DOMAIN_KERNEL,
},
@@ -254,6 +257,9 @@ static struct mem_type mem_types[] = {
.domain = DOMAIN_KERNEL,
},
[MT_MEMORY_NONCACHED] = {
+ .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
+ L_PTE_USER | L_PTE_EXEC | L_PTE_MT_BUFFERABLE,
+ .prot_l1 = PMD_TYPE_TABLE,
.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
.domain = DOMAIN_KERNEL,
},
@@ -411,9 +417,12 @@ static void __init build_mem_type_table(void)
* Enable CPU-specific coherency if supported.
* (Only available on XSC3 at the moment.)
*/
- if (arch_is_coherent() && cpu_is_xsc3())
+ if (arch_is_coherent() && cpu_is_xsc3()) {
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
-
+ mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
+ mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
+ mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
+ }
/*
* ARMv6 and above have extended page tables.
*/
@@ -438,7 +447,9 @@ static void __init build_mem_type_table(void)
mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
+ mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
+ mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
#endif
}
@@ -475,6 +486,8 @@ static void __init build_mem_type_table(void)
mem_types[MT_LOW_VECTORS].prot_l1 |= ecc_mask;
mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask;
mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp->pmd;
+ mem_types[MT_MEMORY].prot_pte |= kern_pgprot;
+ mem_types[MT_MEMORY_NONCACHED].prot_sect |= ecc_mask;
mem_types[MT_ROM].prot_sect |= cp->pmd;
switch (cp->pmd) {
--
1.6.0.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
end of thread, other threads:[~2010-08-09 9:19 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2010-08-08 10:17 [PATCH 1/3] ARM: mmu: Setup MT_MEMORY and MT_MEMORY_NONACHED L1 entries Santosh Shilimkar
2010-08-08 11:34 ` Russell King - ARM Linux
2010-08-08 11:46 ` Shilimkar, Santosh
2010-08-09 9:19 ` Shilimkar, Santosh
2010-08-08 11:35 ` Russell King - ARM Linux
2010-08-08 11:44 ` Shilimkar, Santosh
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