[PATCH/RFC 00/13] OMAP: voltage layer cleanup and restructure: part 2

[PATCH/RFC 00/13] OMAP: voltage layer cleanup and restructure: part 2

[Kevin Hilman]

Here is part 2 of the voltage layer cleanup and restrucure.  This part
focuses on the VC layer cleanups and abstracions, and moves register
access functions into PRM code.

Some things still needed on top of this series, please let me know if
you want to work on any of them:

- OMAP4: hard-coded I2C SCLL/SCCH values removed and calculated based
  on sys_clk

- OMAP3: abstract CLKSETUP, VOLTSETUP, VOLTSETUP2 to something that is
  common with OMAP4 so common VC code can be used.  (Vishwa started on
  this one already, but it needs a common OMAP3/OMAP4 description.)

This series is based on part 1, and is also available in the
pm-wip/voltdm_b branch of my tree.

Kevin

Kevin Hilman (13):
  OMAP3+: add PRM VP functions for checking/clearing VP TX done status
  OMAP3+ VP: replace transaction done check/clear with VP ops
  OMAP3+: PRM: add register access functions for VC/VP
  OMAP3+: voltage: convert to PRM register access functions
  OMAP3+: VC: cleanup i2c slave address configuration
  OMAP3+: VC: cleanup PMIC register address configuration
  OMAP3+: VC bypass: use fields from VC struct instead of PMIC info
  OMAP3+: VC: cleanup voltage setup time configuration
  OMAP3+: VC: move on/onlp/ret/off command configuration into common
    init
  OMAP3+: VC: abstract out channel configuration
  OMAP4: PRM: VC: rename I2C configuration register: s/INSTE/MODE/
  OMAP3+: voltage domain: move PMIC struct from vdd_info into struct
    voltagedomain
  OMAP3+: VC: make I2C config programmable with PMIC-specific settings

 arch/arm/mach-omap2/omap_twl.c                |   32 ++--
 arch/arm/mach-omap2/prm2xxx_3xxx.c            |   56 ++++++
 arch/arm/mach-omap2/prm2xxx_3xxx.h            |   12 ++
 arch/arm/mach-omap2/prm44xx.c                 |   71 +++++++
 arch/arm/mach-omap2/prm44xx.h                 |   16 ++-
 arch/arm/mach-omap2/vc.c                      |  256 ++++++++++++++++---------
 arch/arm/mach-omap2/vc.h                      |   31 ++-
 arch/arm/mach-omap2/vc3xxx_data.c             |   14 +-
 arch/arm/mach-omap2/vc44xx_data.c             |   18 +-
 arch/arm/mach-omap2/voltage.c                 |   60 ++-----
 arch/arm/mach-omap2/voltage.h                 |   27 ++-
 arch/arm/mach-omap2/voltagedomains3xxx_data.c |   14 +-
 arch/arm/mach-omap2/voltagedomains44xx_data.c |   21 ++-
 arch/arm/mach-omap2/vp.c                      |   86 ++++-----
 arch/arm/mach-omap2/vp.h                      |   35 ++--
 arch/arm/mach-omap2/vp3xxx_data.c             |   20 +-
 arch/arm/mach-omap2/vp44xx_data.c             |   26 +--
 17 files changed, 499 insertions(+), 296 deletions(-)

-- 
1.7.4

[PATCH/RFC 01/13] OMAP3+: add PRM VP functions for checking/clearing VP TX done status

[Kevin Hilman]

Add SoC specific PRM VP helper functions for checking and clearing
the VP transaction done status.

Longer term, these events should be handled by the forthcoming PRCM
interrupt handler.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/prm2xxx_3xxx.c |   41 ++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/prm2xxx_3xxx.h |    4 +++
 arch/arm/mach-omap2/prm44xx.c      |   49 ++++++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/prm44xx.h      |    4 +++
 arch/arm/mach-omap2/vp.h           |   33 ++++++++++++++---------
 arch/arm/mach-omap2/vp3xxx_data.c  |   19 ++++++-------
 arch/arm/mach-omap2/vp44xx_data.c  |   25 ++++++-----------
 7 files changed, 136 insertions(+), 39 deletions(-)

diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 051213f..58c5c87 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -20,6 +20,8 @@
 #include <plat/cpu.h>
 #include <plat/prcm.h>
 
+#include "vp.h"
+
 #include "prm2xxx_3xxx.h"
 #include "cm2xxx_3xxx.h"
 #include "prm-regbits-24xx.h"
@@ -156,3 +158,42 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
 
 	return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
 }
+
+/* PRM VP */
+
+/*
+ * struct omap3_vp - OMAP3 VP register access description.
+ * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
+ */
+struct omap3_vp {
+	u32 tranxdone_status;
+};
+
+struct omap3_vp omap3_vp[] = {
+	[OMAP3_VP_VDD_MPU_ID] = {
+		.tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
+	},
+	[OMAP3_VP_VDD_CORE_ID] = {
+		.tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
+	},
+};
+
+#define MAX_VP_ID ARRAY_SIZE(omap3_vp);
+
+u32 omap3_prm_vp_check_txdone(u8 vp_id)
+{
+	struct omap3_vp *vp = &omap3_vp[vp_id];
+	u32 irqstatus;
+
+	irqstatus = omap2_prm_read_mod_reg(OCP_MOD,
+					   OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+	return irqstatus & vp->tranxdone_status;
+}
+
+void omap3_prm_vp_clear_txdone(u8 vp_id)
+{
+	struct omap3_vp *vp = &omap3_vp[vp_id];
+
+	omap2_prm_write_mod_reg(vp->tranxdone_status,
+				OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
+}
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index a1fc62a..5112526 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -303,6 +303,10 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift);
 extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift);
 extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
 
+/* OMAP3-specific VP functions */
+u32 omap3_prm_vp_check_txdone(u8 vp_id);
+void omap3_prm_vp_clear_txdone(u8 vp_id);
+
 #endif	/* CONFIG_ARCH_OMAP4 */
 #endif
 
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index a2a04bf..3bb2f61 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -21,6 +21,7 @@
 #include <plat/cpu.h>
 #include <plat/prcm.h>
 
+#include "vp.h"
 #include "prm44xx.h"
 #include "prm-regbits-44xx.h"
 
@@ -193,3 +194,51 @@ void omap4_prm_global_warm_sw_reset(void)
 	v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
 				    OMAP4_RM_RSTCTRL);
 }
+
+/* PRM VP */
+
+/*
+ * struct omap4_vp - OMAP4 VP register access description.
+ * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP
+ * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
+ */
+struct omap4_vp {
+	u32 irqstatus_mpu;
+	u32 tranxdone_status;
+};
+
+static struct omap4_vp omap4_vp[] = {
+	[OMAP4_VP_VDD_MPU_ID] = {
+		.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
+		.tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
+	},
+	[OMAP4_VP_VDD_IVA_ID] = {
+		.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
+		.tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
+	},
+	[OMAP4_VP_VDD_CORE_ID] = {
+		.irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
+		.tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
+	},
+};
+
+u32 omap4_prm_vp_check_txdone(u8 vp_id)
+{
+	struct omap4_vp *vp = &omap4_vp[vp_id];
+	u32 irqstatus;
+
+	irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
+						OMAP4430_PRM_OCP_SOCKET_INST,
+						vp->irqstatus_mpu);
+	return irqstatus & vp->tranxdone_status;
+}
+
+void omap4_prm_vp_clear_txdone(u8 vp_id)
+{
+	struct omap4_vp *vp = &omap4_vp[vp_id];
+
+	omap4_prminst_write_inst_reg(vp->tranxdone_status,
+				     OMAP4430_PRM_PARTITION,
+				     OMAP4430_PRM_OCP_SOCKET_INST,
+				     vp->irqstatus_mpu);
+};
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 67a0d3f..e385366 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -773,6 +773,10 @@ extern int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift);
 
 extern void omap4_prm_global_warm_sw_reset(void);
 
+/* OMAP4-specific VP functions */
+u32 omap4_prm_vp_check_txdone(u8 vp_id);
+void omap4_prm_vp_clear_txdone(u8 vp_id);
+
 # endif
 
 #endif
diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h
index 025cf16..2c9cd76 100644
--- a/arch/arm/mach-omap2/vp.h
+++ b/arch/arm/mach-omap2/vp.h
@@ -21,10 +21,28 @@
 
 struct voltagedomain;
 
+/*
+ * Voltage Processor (VP) identifiers
+ */
+#define OMAP3_VP_VDD_MPU_ID 0
+#define OMAP3_VP_VDD_CORE_ID 1
+#define OMAP4_VP_VDD_CORE_ID 0
+#define OMAP4_VP_VDD_IVA_ID 1
+#define OMAP4_VP_VDD_MPU_ID 2
+
 /* XXX document */
 #define VP_IDLE_TIMEOUT		200
 #define VP_TRANXDONE_TIMEOUT	300
 
+/**
+ * struct omap_vp_ops - per-VP operations
+ * @check_txdone: check for VP transaction done
+ * @clear_txdone: clear VP transaction done status
+ */
+struct omap_vp_ops {
+	u32 (*check_txdone)(u8 vp_id);
+	void (*clear_txdone)(u8 vp_id);
+};
 
 /**
  * struct omap_vp_common_data - register data common to all VDDs
@@ -68,24 +86,13 @@ struct omap_vp_common_data {
 	u8 vlimitto_vddmin_shift;
 	u8 vlimitto_vddmax_shift;
 	u8 vlimitto_timeout_shift;
-};
 
-/**
- * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data
- * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg
- *
- * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a
- *     hardware bug
- * XXX This structure is probably not needed
- */
-struct omap_vp_prm_irqst_data {
-	u32 tranxdone_status;
+	const struct omap_vp_ops *ops;
 };
 
 /**
  * struct omap_vp_instance_data - VP register offsets (per-VDD)
  * @vp_common: pointer to struct omap_vp_common_data * for this SoC
- * @prm_irqst_data: pointer to struct omap_vp_prm_irqst_data for this VDD
  * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start
  * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start
  * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start
@@ -96,13 +103,13 @@ struct omap_vp_prm_irqst_data {
  */
 struct omap_vp_instance_data {
 	const struct omap_vp_common_data *vp_common;
-	const struct omap_vp_prm_irqst_data *prm_irqst_data;
 	u8 vpconfig;
 	u8 vstepmin;
 	u8 vstepmax;
 	u8 vlimitto;
 	u8 vstatus;
 	u8 voltage;
+	u8 id;
 };
 
 /**
diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c
index a8ea045..0372c1a 100644
--- a/arch/arm/mach-omap2/vp3xxx_data.c
+++ b/arch/arm/mach-omap2/vp3xxx_data.c
@@ -25,6 +25,12 @@
 #include "voltage.h"
 
 #include "vp.h"
+#include "prm2xxx_3xxx.h"
+
+static const struct omap_vp_ops omap3_vp_ops = {
+	.check_txdone = omap3_prm_vp_check_txdone,
+	.clear_txdone = omap3_prm_vp_clear_txdone,
+};
 
 /*
  * VP data common to 34xx/36xx chips
@@ -48,13 +54,11 @@ static const struct omap_vp_common_data omap3_vp_common = {
 	.vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT,
 	.vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT,
 	.vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT,
-};
-
-static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = {
-	.tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
+	.ops = &omap3_vp_ops,
 };
 
 struct omap_vp_instance_data omap3_vp1_data = {
+	.id = OMAP3_VP_VDD_MPU_ID,
 	.vp_common = &omap3_vp_common,
 	.vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET,
 	.vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET,
@@ -62,14 +66,10 @@ struct omap_vp_instance_data omap3_vp1_data = {
 	.vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET,
 	.vstatus = OMAP3_PRM_VP1_STATUS_OFFSET,
 	.voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET,
-	.prm_irqst_data = &omap3_vp1_prm_irqst_data,
-};
-
-static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = {
-	.tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
 };
 
 struct omap_vp_instance_data omap3_vp2_data = {
+	.id = OMAP3_VP_VDD_CORE_ID,
 	.vp_common = &omap3_vp_common,
 	.vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET,
 	.vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET,
@@ -77,5 +77,4 @@ struct omap_vp_instance_data omap3_vp2_data = {
 	.vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET,
 	.vstatus = OMAP3_PRM_VP2_STATUS_OFFSET,
 	.voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET,
-	.prm_irqst_data = &omap3_vp2_prm_irqst_data,
 };
diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c
index 0957c24..738ba04 100644
--- a/arch/arm/mach-omap2/vp44xx_data.c
+++ b/arch/arm/mach-omap2/vp44xx_data.c
@@ -27,6 +27,11 @@
 
 #include "vp.h"
 
+static const struct omap_vp_ops omap4_vp_ops = {
+	.check_txdone = omap4_prm_vp_check_txdone,
+	.clear_txdone = omap4_prm_vp_clear_txdone,
+};
+
 /*
  * VP data common to 44xx chips
  * XXX This stuff presumably belongs in the vp44xx.c or vp.c file.
@@ -49,13 +54,11 @@ static const struct omap_vp_common_data omap4_vp_common = {
 	.vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT,
 	.vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT,
 	.vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT,
-};
-
-static const struct omap_vp_prm_irqst_data omap4_vp_mpu_prm_irqst_data = {
-	.tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK,
+	.ops = &omap4_vp_ops,
 };
 
 struct omap_vp_instance_data omap4_vp_mpu_data = {
+	.id = OMAP4_VP_VDD_MPU_ID,
 	.vp_common = &omap4_vp_common,
 	.vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET,
 	.vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET,
@@ -63,14 +66,10 @@ struct omap_vp_instance_data omap4_vp_mpu_data = {
 	.vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET,
 	.vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET,
 	.voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET,
-	.prm_irqst_data = &omap4_vp_mpu_prm_irqst_data,
-};
-
-static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data = {
-	.tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK,
 };
 
 struct omap_vp_instance_data omap4_vp_iva_data = {
+	.id = OMAP4_VP_VDD_IVA_ID,
 	.vp_common = &omap4_vp_common,
 	.vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET,
 	.vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET,
@@ -78,14 +77,10 @@ struct omap_vp_instance_data omap4_vp_iva_data = {
 	.vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET,
 	.vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET,
 	.voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET,
-	.prm_irqst_data = &omap4_vp_iva_prm_irqst_data,
-};
-
-static const struct omap_vp_prm_irqst_data omap4_vp_core_prm_irqst_data = {
-	.tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK,
 };
 
 struct omap_vp_instance_data omap4_vp_core_data = {
+	.id = OMAP4_VP_VDD_CORE_ID,
 	.vp_common = &omap4_vp_common,
 	.vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET,
 	.vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET,
@@ -93,6 +88,4 @@ struct omap_vp_instance_data omap4_vp_core_data = {
 	.vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET,
 	.vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET,
 	.voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET,
-	.prm_irqst_data = &omap4_vp_core_prm_irqst_data,
 };
-
-- 
1.7.4

[PATCH/RFC 02/13] OMAP3+ VP: replace transaction done check/clear with VP ops

[Kevin Hilman]

Replace the VP tranxdone check/clear with helper functions from the
PRM layer.

In the process, remove prm_irqst_* voltage structure fields for IRQ
status checking which are no longer needed.

Since these reads/writes of the IRQ status bits were the only PRM
accesses that were not to VC/VP registers, this allows the rest of the
register accesses in the VC/VP code to use VC/VP specific register
access functions (done in the following patch.)

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/voltage.h                 |    2 --
 arch/arm/mach-omap2/voltagedomains3xxx_data.c |    4 ----
 arch/arm/mach-omap2/voltagedomains44xx_data.c |    6 ------
 arch/arm/mach-omap2/vp.c                      |   16 +++++-----------
 4 files changed, 5 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 65c5b81..a3e7d73 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -147,8 +147,6 @@ struct omap_vdd_info {
 	u32 curr_volt;
 	bool vp_enabled;
 
-	s16 prm_irqst_mod;
-	u8 prm_irqst_reg;
 	u32 (*read_reg) (u16 mod, u8 offset);
 	void (*write_reg) (u32 val, u16 mod, u8 offset);
 	int (*volt_scale) (struct voltagedomain *voltdm,
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 7cb27ec..ad8f05b 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -38,8 +38,6 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = {
 };
 
 static struct omap_vdd_info omap3_vdd1_info = {
-	.prm_irqst_mod = OCP_MOD,
-	.prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
 	.vp_data = &omap3_vp1_data,
 	.vfsm = &omap3_vdd1_vfsm_data,
 };
@@ -51,8 +49,6 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = {
 };
 
 static struct omap_vdd_info omap3_vdd2_info = {
-	.prm_irqst_mod = OCP_MOD,
-	.prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
 	.vp_data = &omap3_vp2_data,
 	.vfsm = &omap3_vdd2_vfsm_data,
 };
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index a05d90a..43e1d38 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -37,8 +37,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = {
 };
 
 static struct omap_vdd_info omap4_vdd_mpu_info = {
-	.prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
-	.prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET,
 	.vp_data = &omap4_vp_mpu_data,
 	.vfsm = &omap4_vdd_mpu_vfsm_data,
 };
@@ -48,8 +46,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = {
 };
 
 static struct omap_vdd_info omap4_vdd_iva_info = {
-	.prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
-	.prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
 	.vp_data = &omap4_vp_iva_data,
 	.vfsm = &omap4_vdd_iva_vfsm_data,
 };
@@ -59,8 +55,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = {
 };
 
 static struct omap_vdd_info omap4_vdd_core_info = {
-	.prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST,
-	.prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
 	.vp_data = &omap4_vp_core_data,
 	.vfsm = &omap4_vdd_core_vfsm_data,
 };
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index f3503de..113c839 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -111,10 +111,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
 	 * is <3us
 	 */
 	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
-		vdd->write_reg(vp->prm_irqst_data->tranxdone_status,
-			       vdd->prm_irqst_mod, vdd->prm_irqst_reg);
-		if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) &
-		      vp->prm_irqst_data->tranxdone_status))
+		vp->vp_common->ops->clear_txdone(vp->id);
+		if (!vp->vp_common->ops->check_txdone(vp->id))
 			break;
 		udelay(1);
 	}
@@ -146,9 +144,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
 	 * Depends on SMPSWAITTIMEMIN/MAX and voltage change
 	 */
 	timeout = 0;
-	omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod,
-					 vdd->prm_irqst_reg) &
-			   vp->prm_irqst_data->tranxdone_status),
+	omap_test_timeout(vp->vp_common->ops->check_txdone(vp->id),
 			  VP_TRANXDONE_TIMEOUT, timeout);
 	if (timeout >= VP_TRANXDONE_TIMEOUT)
 		pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
@@ -163,10 +159,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
 	 */
 	timeout = 0;
 	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
-		vdd->write_reg(vp->prm_irqst_data->tranxdone_status,
-			       vdd->prm_irqst_mod, vdd->prm_irqst_reg);
-		if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) &
-		      vp->prm_irqst_data->tranxdone_status))
+		vp->vp_common->ops->clear_txdone(vp->id);
+		if (!vp->vp_common->ops->check_txdone(vp->id))
 			break;
 		udelay(1);
 	}
-- 
1.7.4

[PATCH/RFC 03/13] OMAP3+: PRM: add register access functions for VC/VP

[Kevin Hilman]

On OMAP3+, the voltage controller (VC) and voltage processor (VP) are
inside the PRM.  Add some PRM helper functions for register access to
these module registers.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/prm2xxx_3xxx.c |   15 +++++++++++++++
 arch/arm/mach-omap2/prm2xxx_3xxx.h |    8 ++++++++
 arch/arm/mach-omap2/prm44xx.c      |   22 ++++++++++++++++++++++
 arch/arm/mach-omap2/prm44xx.h      |    8 ++++++++
 4 files changed, 53 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 58c5c87..3b83763 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -197,3 +197,18 @@ void omap3_prm_vp_clear_txdone(u8 vp_id)
 	omap2_prm_write_mod_reg(vp->tranxdone_status,
 				OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
 }
+
+u32 omap3_prm_vcvp_read(u8 offset)
+{
+	return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset);
+}
+
+void omap3_prm_vcvp_write(u32 val, u8 offset)
+{
+	omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset);
+}
+
+u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
+{
+	return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset);
+}
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h
index 5112526..cef533d 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h
@@ -307,7 +307,15 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift);
 u32 omap3_prm_vp_check_txdone(u8 vp_id);
 void omap3_prm_vp_clear_txdone(u8 vp_id);
 
+/*
+ * OMAP3 access functions for voltage controller (VC) and
+ * voltage proccessor (VP) in the PRM.
+ */
+extern u32 omap3_prm_vcvp_read(u8 offset);
+extern void omap3_prm_vcvp_write(u32 val, u8 offset);
+extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
 #endif	/* CONFIG_ARCH_OMAP4 */
+
 #endif
 
 /*
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 3bb2f61..8a3bba3 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -24,6 +24,8 @@
 #include "vp.h"
 #include "prm44xx.h"
 #include "prm-regbits-44xx.h"
+#include "prcm44xx.h"
+#include "prminst44xx.h"
 
 /*
  * Address offset (in bytes) between the reset control and the reset
@@ -242,3 +244,23 @@ void omap4_prm_vp_clear_txdone(u8 vp_id)
 				     OMAP4430_PRM_OCP_SOCKET_INST,
 				     vp->irqstatus_mpu);
 };
+
+u32 omap4_prm_vcvp_read(u8 offset)
+{
+	return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
+					   OMAP4430_PRM_DEVICE_INST, offset);
+}
+
+void omap4_prm_vcvp_write(u32 val, u8 offset)
+{
+	omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION,
+				     OMAP4430_PRM_DEVICE_INST, offset);
+}
+
+u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
+{
+	return omap4_prminst_rmw_inst_reg_bits(mask, bits,
+					       OMAP4430_PRM_PARTITION,
+					       OMAP4430_PRM_DEVICE_INST,
+					       offset);
+}
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index e385366..048c8e5 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -777,6 +777,14 @@ extern void omap4_prm_global_warm_sw_reset(void);
 u32 omap4_prm_vp_check_txdone(u8 vp_id);
 void omap4_prm_vp_clear_txdone(u8 vp_id);
 
+/*
+ * OMAP4 access functions for voltage controller (VC) and
+ * voltage proccessor (VP) in the PRM.
+ */
+extern u32 omap4_prm_vcvp_read(u8 offset);
+extern void omap4_prm_vcvp_write(u32 val, u8 offset);
+extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
+
 # endif
 
 #endif
-- 
1.7.4

[PATCH/RFC 04/13] OMAP3+: voltage: convert to PRM register access functions

[Kevin Hilman]

Convert VC/VP register access to use PRM VC/VP accessor functions.  In
the process, move the read/write function pointers from vdd_info into
struct voltagedomain.

No functional changes.

Additional cleanup:
- remove prm_mod field from  VC/VP data structures, the PRM register
  access functions know which PRM module to use.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/vc.c                      |   69 ++++++++++---------------
 arch/arm/mach-omap2/vc.h                      |    2 -
 arch/arm/mach-omap2/vc3xxx_data.c             |    1 -
 arch/arm/mach-omap2/vc44xx_data.c             |    1 -
 arch/arm/mach-omap2/voltage.c                 |   31 +-----------
 arch/arm/mach-omap2/voltage.h                 |    7 ++-
 arch/arm/mach-omap2/voltagedomains3xxx_data.c |    6 ++
 arch/arm/mach-omap2/voltagedomains44xx_data.c |    9 +++
 arch/arm/mach-omap2/vp.c                      |   57 ++++++++++----------
 arch/arm/mach-omap2/vp.h                      |    2 -
 arch/arm/mach-omap2/vp3xxx_data.c             |    1 -
 arch/arm/mach-omap2/vp44xx_data.c             |    1 -
 12 files changed, 76 insertions(+), 111 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index ce328c9..349b5b1 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -37,7 +37,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
 		return -ENODATA;
 	}
 
-	if (!vdd->read_reg || !vdd->write_reg) {
+	if (!voltdm->read || !voltdm->write) {
 		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
 			__func__, voltdm->name);
 		return -EINVAL;
@@ -49,24 +49,22 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
 		volt_data = NULL;
 
 	*target_vsel = vdd->pmic_info->uv_to_vsel(target_volt);
-	*current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage);
+	*current_vsel = voltdm->read(vdd->vp_data->voltage);
 
 	/* Setting the ON voltage to the new target voltage */
-	vc_cmdval = vdd->read_reg(vc->common->prm_mod, vc->cmdval_reg);
+	vc_cmdval = voltdm->read(vc->cmdval_reg);
 	vc_cmdval &= ~vc->common->cmd_on_mask;
 	vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift);
-	vdd->write_reg(vc_cmdval, vc->common->prm_mod, vc->cmdval_reg);
+	voltdm->write(vc_cmdval, vc->cmdval_reg);
 
 	/* Setting vp errorgain based on the voltage */
 	if (volt_data) {
-		vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod,
-					       vdd->vp_data->vpconfig);
+		vp_errgain_val = voltdm->read(vdd->vp_data->vpconfig);
 		vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain;
 		vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask;
 		vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain <<
 			vp_common->vpconfig_errorgain_shift;
-		vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod,
-			       vdd->vp_data->vpconfig);
+		voltdm->write(vp_errgain_val, vdd->vp_data->vpconfig);
 	}
 
 	return 0;
@@ -111,11 +109,10 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
 			(vdd->pmic_info->i2c_slave_addr <<
 			vc->common->slaveaddr_shift);
 
-	vdd->write_reg(vc_bypass_value, vc->common->prm_mod, vc_bypass_val_reg);
-	vdd->write_reg(vc_bypass_value | vc_valid, vc->common->prm_mod,
-		       vc_bypass_val_reg);
+	voltdm->write(vc_bypass_value, vc_bypass_val_reg);
+	voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg);
 
-	vc_bypass_value = vdd->read_reg(vc->common->prm_mod, vc_bypass_val_reg);
+	vc_bypass_value = voltdm->read(vc_bypass_val_reg);
 	/*
 	 * Loop till the bypass command is acknowledged from the SMPS.
 	 * NOTE: This is legacy code. The loop count and retry count needs
@@ -134,8 +131,7 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
 			loop_cnt = 0;
 			udelay(10);
 		}
-		vc_bypass_value = vdd->read_reg(vc->common->prm_mod,
-						vc_bypass_val_reg);
+		vc_bypass_value = voltdm->read(vc_bypass_val_reg);
 	}
 
 	omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
@@ -144,18 +140,13 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
 
 static void __init omap3_vfsm_init(struct voltagedomain *voltdm)
 {
-	struct omap_vc_channel *vc = voltdm->vc;
-	struct omap_vdd_info *vdd = voltdm->vdd;
-
 	/*
 	 * Voltage Manager FSM parameters init
 	 * XXX This data should be passed in from the board file
 	 */
-	vdd->write_reg(OMAP3_CLKSETUP, vc->common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET);
-	vdd->write_reg(OMAP3_VOLTOFFSET, vc->common->prm_mod,
-		       OMAP3_PRM_VOLTOFFSET_OFFSET);
-	vdd->write_reg(OMAP3_VOLTSETUP2, vc->common->prm_mod,
-		       OMAP3_PRM_VOLTSETUP2_OFFSET);
+	voltdm->write(OMAP3_CLKSETUP, OMAP3_PRM_CLKSETUP_OFFSET);
+	voltdm->write(OMAP3_VOLTOFFSET, OMAP3_PRM_VOLTOFFSET_OFFSET);
+	voltdm->write(OMAP3_VOLTSETUP2, OMAP3_PRM_VOLTSETUP2_OFFSET);
 }
 
 static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
@@ -178,16 +169,16 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
 		(onlp_vsel << vc->common->cmd_onlp_shift) |
 		(ret_vsel << vc->common->cmd_ret_shift) |
 		(off_vsel << vc->common->cmd_off_shift));
-	vdd->write_reg(vc_val, vc->common->prm_mod, vc->cmdval_reg);
+	voltdm->write(vc_val, vc->cmdval_reg);
 
 	/*
 	 * Generic VC parameters init
 	 * XXX This data should be abstracted out
 	 */
-	vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->common->prm_mod,
-			OMAP3_PRM_VC_CH_CONF_OFFSET);
-	vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->common->prm_mod,
-			OMAP3_PRM_VC_I2C_CFG_OFFSET);
+	voltdm->write(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK,
+		       OMAP3_PRM_VC_CH_CONF_OFFSET);
+	voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK,
+		       OMAP3_PRM_VC_I2C_CFG_OFFSET);
 
 	omap3_vfsm_init(voltdm);
 
@@ -198,8 +189,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
 /* OMAP4 specific voltage init functions */
 static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
 {
-	struct omap_vc_channel *vc = voltdm->vc;
-	struct omap_vdd_info *vdd = voltdm->vdd;
 	static bool is_initialized;
 	u32 vc_val;
 
@@ -215,11 +204,11 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
 	vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK |
 		  OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK |
 		  OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK);
-	vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET);
+	voltdm->write(vc_val, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET);
 
 	/* XXX These are magic numbers and do not belong! */
 	vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT);
-	vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
+	voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
 
 	is_initialized = true;
 }
@@ -237,34 +226,30 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 		return;
 	}
 
-	if (!vdd->read_reg || !vdd->write_reg) {
+	if (!voltdm->read || !voltdm->write) {
 		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
 			__func__, voltdm->name);
 		return;
 	}
 
 	/* Set up the SMPS_SA(i2c slave address in VC */
-	vc_val = vdd->read_reg(vc->common->prm_mod,
-			       vc->common->smps_sa_reg);
+	vc_val = voltdm->read(vc->common->smps_sa_reg);
 	vc_val &= ~vc->smps_sa_mask;
 	vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift;
-	vdd->write_reg(vc_val, vc->common->prm_mod,
-		       vc->common->smps_sa_reg);
+	voltdm->write(vc_val, vc->common->smps_sa_reg);
 
 	/* Setup the VOLRA(pmic reg addr) in VC */
-	vc_val = vdd->read_reg(vc->common->prm_mod,
-			       vc->common->smps_volra_reg);
+	vc_val = voltdm->read(vc->common->smps_volra_reg);
 	vc_val &= ~vc->smps_volra_mask;
 	vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift;
-	vdd->write_reg(vc_val, vc->common->prm_mod,
-		       vc->common->smps_volra_reg);
+	voltdm->write(vc_val, vc->common->smps_volra_reg);
 
 	/* Configure the setup times */
-	vc_val = vdd->read_reg(vc->common->prm_mod, vdd->vfsm->voltsetup_reg);
+	vc_val = voltdm->read(vdd->vfsm->voltsetup_reg);
 	vc_val &= ~vdd->vfsm->voltsetup_mask;
 	vc_val |= vdd->pmic_info->volt_setup_time <<
 			vdd->vfsm->voltsetup_shift;
-	vdd->write_reg(vc_val, vc->common->prm_mod, vdd->vfsm->voltsetup_reg);
+	voltdm->write(vc_val, vdd->vfsm->voltsetup_reg);
 
 	if (cpu_is_omap34xx())
 		omap3_vc_init_channel(voltdm);
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index d68bc30..553a5ac 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -25,7 +25,6 @@ struct voltagedomain;
  * struct omap_vc_common - per-VC register/bitfield data
  * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
  * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
- * @prm_mod: PRM module id used for PRM register access
  * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
  * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
  * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
@@ -43,7 +42,6 @@ struct voltagedomain;
 struct omap_vc_common {
 	u32 cmd_on_mask;
 	u32 valid;
-	s16 prm_mod;
 	u8 smps_sa_reg;
 	u8 smps_volra_reg;
 	u8 bypass_val_reg;
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index 1a17ed4..6b67203 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -30,7 +30,6 @@
  * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
  */
 static struct omap_vc_common omap3_vc_common = {
-	.prm_mod         = OMAP3430_GR_MOD,
 	.smps_sa_reg	 = OMAP3_PRM_VC_SMPS_SA_OFFSET,
 	.smps_volra_reg	 = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
 	.bypass_val_reg	 = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c
index 56f3f4a..e3125a3 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -31,7 +31,6 @@
  * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file.
  */
 static const struct omap_vc_common omap4_vc_common = {
-	.prm_mod = OMAP4430_PRM_DEVICE_INST,
 	.smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
 	.smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
 	.bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET,
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index fe13784..7d859f0 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -46,27 +46,6 @@ static LIST_HEAD(voltdm_list);
 #define VOLTAGE_DIR_SIZE	16
 static struct dentry *voltage_dir;
 
-static u32 omap3_voltage_read_reg(u16 mod, u8 offset)
-{
-	return omap2_prm_read_mod_reg(mod, offset);
-}
-
-static void omap3_voltage_write_reg(u32 val, u16 mod, u8 offset)
-{
-	omap2_prm_write_mod_reg(val, mod, offset);
-}
-
-static u32 omap4_voltage_read_reg(u16 mod, u8 offset)
-{
-	return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION,
-					mod, offset);
-}
-
-static void omap4_voltage_write_reg(u32 val, u16 mod, u8 offset)
-{
-	omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, mod, offset);
-}
-
 static int __init _config_common_vdd_data(struct voltagedomain *voltdm)
 {
 	char *sys_ck_name;
@@ -183,15 +162,7 @@ static int __init omap_vdd_data_configure(struct voltagedomain *voltdm)
 	if (IS_ERR_VALUE(_config_common_vdd_data(voltdm)))
 		goto ovdc_out;
 
-	if (cpu_is_omap34xx()) {
-		vdd->read_reg = omap3_voltage_read_reg;
-		vdd->write_reg = omap3_voltage_write_reg;
-		ret = 0;
-	} else if (cpu_is_omap44xx()) {
-		vdd->read_reg = omap4_voltage_read_reg;
-		vdd->write_reg = omap4_voltage_write_reg;
-		ret = 0;
-	}
+	ret = 0;
 
 ovdc_out:
 	return ret;
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index a3e7d73..a6f29fd 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -68,6 +68,11 @@ struct voltagedomain {
 	struct list_head pwrdm_list;
 	struct omap_vc_channel *vc;
 
+	/* VC/VP register access functions: SoC specific */
+	u32 (*read) (u8 offset);
+	void (*write) (u32 val, u8 offset);
+	u32 (*rmw)(u32 mask, u32 bits, u8 offset);
+
 	struct omap_vdd_info *vdd;
 };
 
@@ -147,8 +152,6 @@ struct omap_vdd_info {
 	u32 curr_volt;
 	bool vp_enabled;
 
-	u32 (*read_reg) (u16 mod, u8 offset);
-	void (*write_reg) (u32 val, u16 mod, u8 offset);
 	int (*volt_scale) (struct voltagedomain *voltdm,
 		unsigned long target_volt);
 };
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index ad8f05b..1d66749 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -56,6 +56,9 @@ static struct omap_vdd_info omap3_vdd2_info = {
 static struct voltagedomain omap3_voltdm_mpu = {
 	.name = "mpu_iva",
 	.scalable = true,
+	.read = omap3_prm_vcvp_read,
+	.write = omap3_prm_vcvp_write,
+	.rmw = omap3_prm_vcvp_rmw,
 	.vc = &omap3_vc_mpu,
 	.vdd = &omap3_vdd1_info,
 };
@@ -63,6 +66,9 @@ static struct voltagedomain omap3_voltdm_mpu = {
 static struct voltagedomain omap3_voltdm_core = {
 	.name = "core",
 	.scalable = true,
+	.read = omap3_prm_vcvp_read,
+	.write = omap3_prm_vcvp_write,
+	.rmw = omap3_prm_vcvp_rmw,
 	.vc = &omap3_vc_core,
 	.vdd = &omap3_vdd2_info,
 };
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index 43e1d38..e435795 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -62,6 +62,9 @@ static struct omap_vdd_info omap4_vdd_core_info = {
 static struct voltagedomain omap4_voltdm_mpu = {
 	.name = "mpu",
 	.scalable = true,
+	.read = omap4_prm_vcvp_read,
+	.write = omap4_prm_vcvp_write,
+	.rmw = omap4_prm_vcvp_rmw,
 	.vc = &omap4_vc_mpu,
 	.vdd = &omap4_vdd_mpu_info,
 };
@@ -69,6 +72,9 @@ static struct voltagedomain omap4_voltdm_mpu = {
 static struct voltagedomain omap4_voltdm_iva = {
 	.name = "iva",
 	.scalable = true,
+	.read = omap4_prm_vcvp_read,
+	.write = omap4_prm_vcvp_write,
+	.rmw = omap4_prm_vcvp_rmw,
 	.vc = &omap4_vc_iva,
 	.vdd = &omap4_vdd_iva_info,
 };
@@ -76,6 +82,9 @@ static struct voltagedomain omap4_voltdm_iva = {
 static struct voltagedomain omap4_voltdm_core = {
 	.name = "core",
 	.scalable = true,
+	.read = omap4_prm_vcvp_read,
+	.write = omap4_prm_vcvp_write,
+	.rmw = omap4_prm_vcvp_rmw,
 	.vc = &omap4_vc_core,
 	.vdd = &omap4_vdd_core_info,
 };
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 113c839..88ac742 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -35,19 +35,19 @@ static void vp_latch_vsel(struct voltagedomain *voltdm)
 
 	vsel = vdd->pmic_info->uv_to_vsel(uvdc);
 
-	vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig);
+	vpconfig = voltdm->read(vp->vpconfig);
 	vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask |
 			vp->vp_common->vpconfig_initvdd);
 	vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift;
 
-	vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
+	voltdm->write(vpconfig, vp->vpconfig);
 
 	/* Trigger initVDD value copy to voltage processor */
-	vdd->write_reg((vpconfig | vp->vp_common->vpconfig_initvdd),
-		       vp->vp_common->prm_mod, vp->vpconfig);
+	voltdm->write((vpconfig | vp->vp_common->vpconfig_initvdd),
+		       vp->vpconfig);
 
 	/* Clear initVDD copy trigger bit */
-	vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
+	voltdm->write(vpconfig, vp->vpconfig);
 }
 
 /* Generic voltage init functions */
@@ -57,7 +57,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
 	struct omap_vdd_info *vdd = voltdm->vdd;
 	u32 vp_val;
 
-	if (!vdd->read_reg || !vdd->write_reg) {
+	if (!voltdm->read || !voltdm->write) {
 		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
 			__func__, voltdm->name);
 		return;
@@ -67,19 +67,19 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
 		(vdd->vp_rt_data.vpconfig_errorgain <<
 		vp->vp_common->vpconfig_errorgain_shift) |
 		vp->vp_common->vpconfig_timeouten;
-	vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vpconfig);
+	voltdm->write(vp_val, vp->vpconfig);
 
 	vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin <<
 		vp->vp_common->vstepmin_smpswaittimemin_shift) |
 		(vdd->vp_rt_data.vstepmin_stepmin <<
 		vp->vp_common->vstepmin_stepmin_shift));
-	vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmin);
+	voltdm->write(vp_val, vp->vstepmin);
 
 	vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax <<
 		vp->vp_common->vstepmax_smpswaittimemax_shift) |
 		(vdd->vp_rt_data.vstepmax_stepmax <<
 		vp->vp_common->vstepmax_stepmax_shift));
-	vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmax);
+	voltdm->write(vp_val, vp->vstepmax);
 
 	vp_val = ((vdd->vp_rt_data.vlimitto_vddmax <<
 		vp->vp_common->vlimitto_vddmax_shift) |
@@ -87,7 +87,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
 		vp->vp_common->vlimitto_vddmin_shift) |
 		(vdd->vp_rt_data.vlimitto_timeout <<
 		vp->vp_common->vlimitto_timeout_shift));
-	vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vlimitto);
+	voltdm->write(vp_val, vp->vlimitto);
 
 	vp_debugfs_init(voltdm);
 }
@@ -97,7 +97,6 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
 			      unsigned long target_volt)
 {
 	struct omap_vp_instance_data *vp = voltdm->vdd->vp_data;
-	struct omap_vdd_info *vdd = voltdm->vdd;
 	u32 vpconfig;
 	u8 target_vsel, current_vsel;
 	int ret, timeout = 0;
@@ -123,21 +122,21 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
 	}
 
 	/* Configure for VP-Force Update */
-	vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig);
+	vpconfig = voltdm->read(vp->vpconfig);
 	vpconfig &= ~(vp->vp_common->vpconfig_initvdd |
 			vp->vp_common->vpconfig_forceupdate |
 			vp->vp_common->vpconfig_initvoltage_mask);
 	vpconfig |= ((target_vsel <<
 			vp->vp_common->vpconfig_initvoltage_shift));
-	vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
+	voltdm->write(vpconfig, vp->vpconfig);
 
 	/* Trigger initVDD value copy to voltage processor */
 	vpconfig |= vp->vp_common->vpconfig_initvdd;
-	vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
+	voltdm->write(vpconfig, vp->vpconfig);
 
 	/* Force update of voltage */
 	vpconfig |= vp->vp_common->vpconfig_forceupdate;
-	vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
+	voltdm->write(vpconfig, vp->vpconfig);
 
 	/*
 	 * Wait for TransactionDone. Typical latency is <200us.
@@ -170,13 +169,13 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
 			"to clear the TRANXDONE status\n",
 			__func__, voltdm->name);
 
-	vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig);
+	vpconfig = voltdm->read(vp->vpconfig);
 	/* Clear initVDD copy trigger bit */
 	vpconfig &= ~vp->vp_common->vpconfig_initvdd;
-	vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
+	voltdm->write(vpconfig, vp->vpconfig);
 	/* Clear force bit */
 	vpconfig &= ~vp->vp_common->vpconfig_forceupdate;
-	vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
+	voltdm->write(vpconfig, vp->vpconfig);
 
 	return 0;
 }
@@ -199,13 +198,13 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm)
 	}
 
 	vdd = voltdm->vdd;
-	if (!vdd->read_reg) {
+	if (!voltdm->read) {
 		pr_err("%s: No read API for reading vdd_%s regs\n",
 			__func__, voltdm->name);
 		return 0;
 	}
 
-	curr_vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage);
+	curr_vsel = voltdm->read(vp->voltage);
 
 	if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) {
 		pr_warning("%s: PMIC function to convert vsel to voltage"
@@ -236,7 +235,7 @@ void omap_vp_enable(struct voltagedomain *voltdm)
 
 	vdd = voltdm->vdd;
 	vp = voltdm->vdd->vp_data;
-	if (!vdd->read_reg || !vdd->write_reg) {
+	if (!voltdm->read || !voltdm->write) {
 		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
 			__func__, voltdm->name);
 		return;
@@ -249,9 +248,9 @@ void omap_vp_enable(struct voltagedomain *voltdm)
 	vp_latch_vsel(voltdm);
 
 	/* Enable VP */
-	vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig);
+	vpconfig = voltdm->read(vp->vpconfig);
 	vpconfig |= vp->vp_common->vpconfig_vpenable;
-	vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
+	voltdm->write(vpconfig, vp->vpconfig);
 	vdd->vp_enabled = true;
 }
 
@@ -276,7 +275,7 @@ void omap_vp_disable(struct voltagedomain *voltdm)
 
 	vdd = voltdm->vdd;
 	vp = voltdm->vdd->vp_data;
-	if (!vdd->read_reg || !vdd->write_reg) {
+	if (!voltdm->read || !voltdm->write) {
 		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
 			__func__, voltdm->name);
 		return;
@@ -290,15 +289,15 @@ void omap_vp_disable(struct voltagedomain *voltdm)
 	}
 
 	/* Disable VP */
-	vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig);
+	vpconfig = voltdm->read(vp->vpconfig);
 	vpconfig &= ~vp->vp_common->vpconfig_vpenable;
-	vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig);
+	voltdm->write(vpconfig, vp->vpconfig);
 
 	/*
 	 * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
 	 */
-	omap_test_timeout((vdd->read_reg(vp->vp_common->prm_mod, vp->vstatus)),
-				VP_IDLE_TIMEOUT, timeout);
+	omap_test_timeout((voltdm->read(vp->vstatus)),
+			  VP_IDLE_TIMEOUT, timeout);
 
 	if (timeout >= VP_IDLE_TIMEOUT)
 		pr_warning("%s: vdd_%s idle timedout\n",
@@ -322,7 +321,7 @@ static int vp_volt_debug_get(void *data, u64 *val)
 		return -EINVAL;
 	}
 
-	vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage);
+	vsel = voltdm->read(vp->voltage);
 
 	if (!vdd->pmic_info->vsel_to_uv) {
 		pr_warning("PMIC function to convert vsel to voltage"
diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h
index 2c9cd76..79aa8d3 100644
--- a/arch/arm/mach-omap2/vp.h
+++ b/arch/arm/mach-omap2/vp.h
@@ -62,7 +62,6 @@ struct omap_vp_ops {
  * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg
  * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg
  * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg
- * @prm_mod: PRM module id used for PRM register access
  *
  * XXX It it not necessary to have both a mask and a shift for the same
  *     bitfield - remove one
@@ -75,7 +74,6 @@ struct omap_vp_common_data {
 	u32 vpconfig_initvdd;
 	u32 vpconfig_forceupdate;
 	u32 vpconfig_vpenable;
-	s16 prm_mod;
 	u8 vpconfig_erroroffset_shift;
 	u8 vpconfig_errorgain_shift;
 	u8 vpconfig_initvoltage_shift;
diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c
index 0372c1a..b01d333 100644
--- a/arch/arm/mach-omap2/vp3xxx_data.c
+++ b/arch/arm/mach-omap2/vp3xxx_data.c
@@ -37,7 +37,6 @@ static const struct omap_vp_ops omap3_vp_ops = {
  * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file.
  */
 static const struct omap_vp_common_data omap3_vp_common = {
-	.prm_mod = OMAP3430_GR_MOD,
 	.vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT,
 	.vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK,
 	.vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT,
diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c
index 738ba04..9704c7b 100644
--- a/arch/arm/mach-omap2/vp44xx_data.c
+++ b/arch/arm/mach-omap2/vp44xx_data.c
@@ -37,7 +37,6 @@ static const struct omap_vp_ops omap4_vp_ops = {
  * XXX This stuff presumably belongs in the vp44xx.c or vp.c file.
  */
 static const struct omap_vp_common_data omap4_vp_common = {
-	.prm_mod = OMAP4430_PRM_DEVICE_INST,
 	.vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT,
 	.vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK,
 	.vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT,
-- 
1.7.4

[PATCH/RFC 05/13] OMAP3+: VC: cleanup i2c slave address configuration

[Kevin Hilman]

- Add an i2c_slave_address field to the omap_vc_channel
- use VC/VP read/modify/write helper instead of open-coding
- remove smps_sa_shift, use __ffs(mask) for shift value

Special thanks to Shweta Gulati <shweta.gulati@ti.com> for suggesting
the use of __ffs(x) instead of ffs(x) - 1.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/vc.c          |   12 +++++++-----
 arch/arm/mach-omap2/vc.h          |    8 +++++---
 arch/arm/mach-omap2/vc3xxx_data.c |    2 --
 arch/arm/mach-omap2/vc44xx_data.c |    3 ---
 4 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 349b5b1..0824904 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -232,11 +232,13 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 		return;
 	}
 
-	/* Set up the SMPS_SA(i2c slave address in VC */
-	vc_val = voltdm->read(vc->common->smps_sa_reg);
-	vc_val &= ~vc->smps_sa_mask;
-	vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift;
-	voltdm->write(vc_val, vc->common->smps_sa_reg);
+	/* get PMIC/board specific settings */
+	vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr;
+
+	/* Configure the i2c slave address for this VC */
+	voltdm->rmw(vc->smps_sa_mask,
+		    vc->i2c_slave_addr << __ffs(vc->smps_sa_mask),
+		    vc->common->smps_sa_reg);
 
 	/* Setup the VOLRA(pmic reg addr) in VC */
 	vc_val = voltdm->read(vc->common->smps_volra_reg);
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index 553a5ac..ca8479e 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -57,20 +57,22 @@ struct omap_vc_common {
 /**
  * struct omap_vc_channel - VC per-instance data
  * @common: pointer to VC common data for this platform
- * @smps_sa_mask: SA* bitmask in the PRM_VC_SMPS_SA register
+ * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
  * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
- * @smps_sa_shift: SA* field shift in the PRM_VC_SMPS_SA register
  * @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register
  *
  * XXX It is not necessary to have both a *_mask and a *_shift -
  *     remove one
  */
 struct omap_vc_channel {
+	/* channel state */
+	u8 i2c_slave_addr;
+
+	/* register access data */
 	const struct omap_vc_common *common;
 	u32 smps_sa_mask;
 	u32 smps_volra_mask;
 	u8 cmdval_reg;
-	u8 smps_sa_shift;
 	u8 smps_volra_shift;
 };
 
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index 6b67203..86be50c 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -47,7 +47,6 @@ static struct omap_vc_common omap3_vc_common = {
 struct omap_vc_channel omap3_vc_mpu = {
 	.common = &omap3_vc_common,
 	.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET,
-	.smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT,
 	.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK,
 	.smps_volra_shift = OMAP3430_VOLRA0_SHIFT,
 	.smps_volra_mask = OMAP3430_VOLRA0_MASK,
@@ -56,7 +55,6 @@ struct omap_vc_channel omap3_vc_mpu = {
 struct omap_vc_channel omap3_vc_core = {
 	.common = &omap3_vc_common,
 	.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET,
-	.smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT,
 	.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK,
 	.smps_volra_shift = OMAP3430_VOLRA1_SHIFT,
 	.smps_volra_mask = OMAP3430_VOLRA1_MASK,
diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c
index e3125a3..af922b4 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -49,7 +49,6 @@ static const struct omap_vc_common omap4_vc_common = {
 struct omap_vc_channel omap4_vc_mpu = {
 	.common = &omap4_vc_common,
 	.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET,
-	.smps_sa_shift = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT,
 	.smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK,
 	.smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT,
 	.smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK,
@@ -58,7 +57,6 @@ struct omap_vc_channel omap4_vc_mpu = {
 struct omap_vc_channel omap4_vc_iva = {
 	.common = &omap4_vc_common,
 	.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET,
-	.smps_sa_shift = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT,
 	.smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK,
 	.smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT,
 	.smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK,
@@ -67,7 +65,6 @@ struct omap_vc_channel omap4_vc_iva = {
 struct omap_vc_channel omap4_vc_core = {
 	.common = &omap4_vc_common,
 	.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET,
-	.smps_sa_shift = OMAP4430_SA_VDD_CORE_L_0_6_SHIFT,
 	.smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK,
 	.smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT,
 	.smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK,
-- 
1.7.4

[PATCH/RFC 06/13] OMAP3+: VC: cleanup PMIC register address configuration

[Kevin Hilman]

- support both voltage register address and command register address
  for each VC channel
- add fields for voltage register address (volra) and command register
  address (cmdra) to struct omap_vc_channel
- use VC/VP register access read/modify/write helper
- remove volra_shift field (use __ffs(mask) for shift value)

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/vc.c          |   17 ++++++++++++-----
 arch/arm/mach-omap2/vc.h          |    9 ++++-----
 arch/arm/mach-omap2/vc3xxx_data.c |    5 +++--
 arch/arm/mach-omap2/vc44xx_data.c |    7 ++++---
 4 files changed, 23 insertions(+), 15 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 0824904..7829861 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -234,17 +234,24 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 
 	/* get PMIC/board specific settings */
 	vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr;
+	vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr;
+	vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr;
 
 	/* Configure the i2c slave address for this VC */
 	voltdm->rmw(vc->smps_sa_mask,
 		    vc->i2c_slave_addr << __ffs(vc->smps_sa_mask),
 		    vc->common->smps_sa_reg);
 
-	/* Setup the VOLRA(pmic reg addr) in VC */
-	vc_val = voltdm->read(vc->common->smps_volra_reg);
-	vc_val &= ~vc->smps_volra_mask;
-	vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift;
-	voltdm->write(vc_val, vc->common->smps_volra_reg);
+	/*
+	 * Configure the PMIC register addresses.
+	 */
+	voltdm->rmw(vc->smps_volra_mask,
+		    vc->volt_reg_addr << __ffs(vc->smps_volra_mask),
+		    vc->common->smps_volra_reg);
+	if (vc->cmd_reg_addr)
+		voltdm->rmw(vc->smps_cmdra_mask,
+			    vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask),
+			    vc->common->smps_cmdra_reg);
 
 	/* Configure the setup times */
 	vc_val = voltdm->read(vdd->vfsm->voltsetup_reg);
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index ca8479e..72c4ee2 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -44,6 +44,7 @@ struct omap_vc_common {
 	u32 valid;
 	u8 smps_sa_reg;
 	u8 smps_volra_reg;
+	u8 smps_cmdra_reg;
 	u8 bypass_val_reg;
 	u8 data_shift;
 	u8 slaveaddr_shift;
@@ -59,21 +60,19 @@ struct omap_vc_common {
  * @common: pointer to VC common data for this platform
  * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
  * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
- * @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register
- *
- * XXX It is not necessary to have both a *_mask and a *_shift -
- *     remove one
  */
 struct omap_vc_channel {
 	/* channel state */
 	u8 i2c_slave_addr;
+	u8 volt_reg_addr;
+	u8 cmd_reg_addr;
 
 	/* register access data */
 	const struct omap_vc_common *common;
 	u32 smps_sa_mask;
 	u32 smps_volra_mask;
+	u32 smps_cmdra_mask;
 	u8 cmdval_reg;
-	u8 smps_volra_shift;
 };
 
 extern struct omap_vc_channel omap3_vc_mpu;
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index 86be50c..df8bd5e 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -32,6 +32,7 @@
 static struct omap_vc_common omap3_vc_common = {
 	.smps_sa_reg	 = OMAP3_PRM_VC_SMPS_SA_OFFSET,
 	.smps_volra_reg	 = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET,
+	.smps_cmdra_reg	 = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET,
 	.bypass_val_reg	 = OMAP3_PRM_VC_BYPASS_VAL_OFFSET,
 	.data_shift	 = OMAP3430_DATA_SHIFT,
 	.slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT,
@@ -48,14 +49,14 @@ struct omap_vc_channel omap3_vc_mpu = {
 	.common = &omap3_vc_common,
 	.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET,
 	.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK,
-	.smps_volra_shift = OMAP3430_VOLRA0_SHIFT,
 	.smps_volra_mask = OMAP3430_VOLRA0_MASK,
+	.smps_cmdra_mask = OMAP3430_CMDRA0_MASK,
 };
 
 struct omap_vc_channel omap3_vc_core = {
 	.common = &omap3_vc_common,
 	.cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET,
 	.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK,
-	.smps_volra_shift = OMAP3430_VOLRA1_SHIFT,
 	.smps_volra_mask = OMAP3430_VOLRA1_MASK,
+	.smps_cmdra_mask = OMAP3430_CMDRA1_MASK,
 };
diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c
index af922b4..5d104ff 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -33,6 +33,7 @@
 static const struct omap_vc_common omap4_vc_common = {
 	.smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET,
 	.smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET,
+	.smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET,
 	.bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET,
 	.data_shift = OMAP4430_DATA_SHIFT,
 	.slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT,
@@ -50,23 +51,23 @@ struct omap_vc_channel omap4_vc_mpu = {
 	.common = &omap4_vc_common,
 	.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET,
 	.smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK,
-	.smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT,
 	.smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK,
+	.smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK,
 };
 
 struct omap_vc_channel omap4_vc_iva = {
 	.common = &omap4_vc_common,
 	.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET,
 	.smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK,
-	.smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT,
 	.smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK,
+	.smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK,
 };
 
 struct omap_vc_channel omap4_vc_core = {
 	.common = &omap4_vc_common,
 	.cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET,
 	.smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK,
-	.smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT,
 	.smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK,
+	.smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK,
 };
 
-- 
1.7.4

[PATCH/RFC 07/13] OMAP3+: VC bypass: use fields from VC struct instead of PMIC info

[Kevin Hilman]

The PMIC configurable variables should be isolated to VC initialization.
The rest of the VC functions (like VC bypass) should use the i2c slave address
and voltage register address fields from struct omap_vc_channel.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/vc.c |    7 ++-----
 1 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 7829861..3fdc3fb 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -91,7 +91,6 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
 				 unsigned long target_volt)
 {
 	struct omap_vc_channel *vc = voltdm->vc;
-	struct omap_vdd_info *vdd = voltdm->vdd;
 	u32 loop_cnt = 0, retries_cnt = 0;
 	u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
 	u8 target_vsel, current_vsel;
@@ -104,10 +103,8 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
 	vc_valid = vc->common->valid;
 	vc_bypass_val_reg = vc->common->bypass_val_reg;
 	vc_bypass_value = (target_vsel << vc->common->data_shift) |
-			(vdd->pmic_info->volt_reg_addr <<
-			vc->common->regaddr_shift) |
-			(vdd->pmic_info->i2c_slave_addr <<
-			vc->common->slaveaddr_shift);
+		(vc->volt_reg_addr << vc->common->regaddr_shift) |
+		(vc->i2c_slave_addr << vc->common->slaveaddr_shift);
 
 	voltdm->write(vc_bypass_value, vc_bypass_val_reg);
 	voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg);
-- 
1.7.4

[PATCH/RFC 08/13] OMAP3+: VC: cleanup voltage setup time configuration

[Kevin Hilman]

- add setup_time field to struct omap_vc_channel (init'd from PMIC data)
- use VC/VP register access helper for read/modify/write
- move VFSM structure from omap_vdd_info into struct voltagedomain

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/vc.c                      |   10 ++++------
 arch/arm/mach-omap2/vc.h                      |    1 +
 arch/arm/mach-omap2/voltage.h                 |    2 +-
 arch/arm/mach-omap2/voltagedomains3xxx_data.c |    4 ++--
 arch/arm/mach-omap2/voltagedomains44xx_data.c |    6 +++---
 5 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 3fdc3fb..7731794 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -214,7 +214,6 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 {
 	struct omap_vc_channel *vc = voltdm->vc;
 	struct omap_vdd_info *vdd = voltdm->vdd;
-	u32 vc_val;
 
 	if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
 		pr_err("%s: PMIC info requried to configure vc for"
@@ -233,6 +232,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 	vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr;
 	vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr;
 	vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr;
+	vc->setup_time = vdd->pmic_info->volt_setup_time;
 
 	/* Configure the i2c slave address for this VC */
 	voltdm->rmw(vc->smps_sa_mask,
@@ -251,11 +251,9 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 			    vc->common->smps_cmdra_reg);
 
 	/* Configure the setup times */
-	vc_val = voltdm->read(vdd->vfsm->voltsetup_reg);
-	vc_val &= ~vdd->vfsm->voltsetup_mask;
-	vc_val |= vdd->pmic_info->volt_setup_time <<
-			vdd->vfsm->voltsetup_shift;
-	voltdm->write(vc_val, vdd->vfsm->voltsetup_reg);
+	voltdm->rmw(voltdm->vfsm->voltsetup_mask,
+		    vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask),
+		    voltdm->vfsm->voltsetup_reg);
 
 	if (cpu_is_omap34xx())
 		omap3_vc_init_channel(voltdm);
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index 72c4ee2..ade35f7 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -66,6 +66,7 @@ struct omap_vc_channel {
 	u8 i2c_slave_addr;
 	u8 volt_reg_addr;
 	u8 cmd_reg_addr;
+	u16 setup_time;
 
 	/* register access data */
 	const struct omap_vc_common *common;
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index a6f29fd..db08e2a 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -67,6 +67,7 @@ struct voltagedomain {
 	struct list_head node;
 	struct list_head pwrdm_list;
 	struct omap_vc_channel *vc;
+	const struct omap_vfsm_instance_data *vfsm;
 
 	/* VC/VP register access functions: SoC specific */
 	u32 (*read) (u8 offset);
@@ -147,7 +148,6 @@ struct omap_vdd_info {
 	struct omap_volt_pmic_info *pmic_info;
 	struct omap_vp_instance_data *vp_data;
 	struct omap_vp_runtime_data vp_rt_data;
-	const struct omap_vfsm_instance_data *vfsm;
 	struct dentry *debug_dir;
 	u32 curr_volt;
 	bool vp_enabled;
diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
index 1d66749..44c7927 100644
--- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c
@@ -39,7 +39,6 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = {
 
 static struct omap_vdd_info omap3_vdd1_info = {
 	.vp_data = &omap3_vp1_data,
-	.vfsm = &omap3_vdd1_vfsm_data,
 };
 
 static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = {
@@ -50,7 +49,6 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = {
 
 static struct omap_vdd_info omap3_vdd2_info = {
 	.vp_data = &omap3_vp2_data,
-	.vfsm = &omap3_vdd2_vfsm_data,
 };
 
 static struct voltagedomain omap3_voltdm_mpu = {
@@ -60,6 +58,7 @@ static struct voltagedomain omap3_voltdm_mpu = {
 	.write = omap3_prm_vcvp_write,
 	.rmw = omap3_prm_vcvp_rmw,
 	.vc = &omap3_vc_mpu,
+	.vfsm = &omap3_vdd1_vfsm_data,
 	.vdd = &omap3_vdd1_info,
 };
 
@@ -70,6 +69,7 @@ static struct voltagedomain omap3_voltdm_core = {
 	.write = omap3_prm_vcvp_write,
 	.rmw = omap3_prm_vcvp_rmw,
 	.vc = &omap3_vc_core,
+	.vfsm = &omap3_vdd2_vfsm_data,
 	.vdd = &omap3_vdd2_info,
 };
 
diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c
index e435795..9dc919d 100644
--- a/arch/arm/mach-omap2/voltagedomains44xx_data.c
+++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c
@@ -38,7 +38,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = {
 
 static struct omap_vdd_info omap4_vdd_mpu_info = {
 	.vp_data = &omap4_vp_mpu_data,
-	.vfsm = &omap4_vdd_mpu_vfsm_data,
 };
 
 static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = {
@@ -47,7 +46,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = {
 
 static struct omap_vdd_info omap4_vdd_iva_info = {
 	.vp_data = &omap4_vp_iva_data,
-	.vfsm = &omap4_vdd_iva_vfsm_data,
 };
 
 static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = {
@@ -56,7 +54,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = {
 
 static struct omap_vdd_info omap4_vdd_core_info = {
 	.vp_data = &omap4_vp_core_data,
-	.vfsm = &omap4_vdd_core_vfsm_data,
 };
 
 static struct voltagedomain omap4_voltdm_mpu = {
@@ -66,6 +63,7 @@ static struct voltagedomain omap4_voltdm_mpu = {
 	.write = omap4_prm_vcvp_write,
 	.rmw = omap4_prm_vcvp_rmw,
 	.vc = &omap4_vc_mpu,
+	.vfsm = &omap4_vdd_mpu_vfsm_data,
 	.vdd = &omap4_vdd_mpu_info,
 };
 
@@ -76,6 +74,7 @@ static struct voltagedomain omap4_voltdm_iva = {
 	.write = omap4_prm_vcvp_write,
 	.rmw = omap4_prm_vcvp_rmw,
 	.vc = &omap4_vc_iva,
+	.vfsm = &omap4_vdd_iva_vfsm_data,
 	.vdd = &omap4_vdd_iva_info,
 };
 
@@ -86,6 +85,7 @@ static struct voltagedomain omap4_voltdm_core = {
 	.write = omap4_prm_vcvp_write,
 	.rmw = omap4_prm_vcvp_rmw,
 	.vc = &omap4_vc_core,
+	.vfsm = &omap4_vdd_core_vfsm_data,
 	.vdd = &omap4_vdd_core_info,
 };
 
-- 
1.7.4

[PATCH/RFC 09/13] OMAP3+: VC: move on/onlp/ret/off command configuration into common init

[Kevin Hilman]

Configuring the on/onlp/ret/off command values is common to OMAP3 & 4.
Move from OMAP3-only init into common VC init.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/vc.c |   30 +++++++++++++-----------------
 1 files changed, 13 insertions(+), 17 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 7731794..4114909 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -148,26 +148,11 @@ static void __init omap3_vfsm_init(struct voltagedomain *voltdm)
 
 static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
 {
-	struct omap_vc_channel *vc = voltdm->vc;
-	struct omap_vdd_info *vdd = voltdm->vdd;
 	static bool is_initialized;
-	u8 on_vsel, onlp_vsel, ret_vsel, off_vsel;
-	u32 vc_val;
 
 	if (is_initialized)
 		return;
 
-	/* Set up the on, inactive, retention and off voltage */
-	on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt);
-	onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt);
-	ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt);
-	off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt);
-	vc_val	= ((on_vsel << vc->common->cmd_on_shift) |
-		(onlp_vsel << vc->common->cmd_onlp_shift) |
-		(ret_vsel << vc->common->cmd_ret_shift) |
-		(off_vsel << vc->common->cmd_off_shift));
-	voltdm->write(vc_val, vc->cmdval_reg);
-
 	/*
 	 * Generic VC parameters init
 	 * XXX This data should be abstracted out
@@ -192,8 +177,6 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
 	if (is_initialized)
 		return;
 
-	/* TODO: Configure setup times and CMD_VAL values*/
-
 	/*
 	 * Generic VC parameters init
 	 * XXX This data should be abstracted out
@@ -214,6 +197,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 {
 	struct omap_vc_channel *vc = voltdm->vc;
 	struct omap_vdd_info *vdd = voltdm->vdd;
+	u8 on_vsel, onlp_vsel, ret_vsel, off_vsel;
+	u32 val;
 
 	if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
 		pr_err("%s: PMIC info requried to configure vc for"
@@ -250,6 +235,17 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 			    vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask),
 			    vc->common->smps_cmdra_reg);
 
+	/* Set up the on, inactive, retention and off voltage */
+	on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt);
+	onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt);
+	ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt);
+	off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt);
+	val = ((on_vsel << vc->common->cmd_on_shift) |
+	       (onlp_vsel << vc->common->cmd_onlp_shift) |
+	       (ret_vsel << vc->common->cmd_ret_shift) |
+	       (off_vsel << vc->common->cmd_off_shift));
+	voltdm->write(val, vc->cmdval_reg);
+
 	/* Configure the setup times */
 	voltdm->rmw(voltdm->vfsm->voltsetup_mask,
 		    vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask),
-- 
1.7.4

[PATCH/RFC 10/13] OMAP3+: VC: abstract out channel configuration

[Kevin Hilman]

VC channel configuration is programmed based on settings coming from
the PMIC configuration.

Currently, the VC channel to PMIC mapping is a simple one-to-one
mapping.  Whenever a VC channel parameter is configured (i2c slave
addres, PMIC register address, on/ret/off command), the corresponding
bits are enabled in the VC channel configuration register.

If necessary, the programmability of channel configuration settings
could be extended to board/PMIC files, however, because this patch
changes the channel configuration to be programmed based on existing
values from the PMIC settings, it may not be required.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/vc.c          |   71 ++++++++++++++++++++++++++++++------
 arch/arm/mach-omap2/vc.h          |    3 ++
 arch/arm/mach-omap2/vc3xxx_data.c |    3 ++
 arch/arm/mach-omap2/vc44xx_data.c |    4 ++
 4 files changed, 69 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 4114909..1ce7b24 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -10,6 +10,53 @@
 #include "prm-regbits-44xx.h"
 #include "prm44xx.h"
 
+/*
+ * Channel configuration bits, common for OMAP3 & 4
+ * OMAP3 register: PRM_VC_CH_CONF
+ * OMAP4 register: PRM_VC_CFG_CHANNEL
+ */
+#define CFG_CHANNEL_SA    BIT(0)
+#define CFG_CHANNEL_RAV   BIT(1)
+#define CFG_CHANNEL_RAC   BIT(2)
+#define CFG_CHANNEL_RACEN BIT(3)
+#define CFG_CHANNEL_CMD   BIT(4)
+#define CFG_CHANNEL_MASK 0x3f
+
+/**
+ * omap_vc_config_channel - configure VC channel to PMIC mappings
+ * @voltdm: pointer to voltagdomain defining the desired VC channel
+ *
+ * Configures the VC channel to PMIC mappings for the following
+ * PMIC settings
+ * - i2c slave address (SA)
+ * - voltage configuration address (RAV)
+ * - command configuration address (RAC) and enable bit (RACEN)
+ * - command values for ON, ONLP, RET and OFF (CMD)
+ *
+ * This function currently only allows flexible configuration of
+ * the non-default channel (e.g. non-zero channels.)  Starting with
+ * OMAP4, only the non-zero channels can be configured.  Channel zero
+ * always uses the channel zero register values.  Therefore, the
+ * same limitation is imposed on OMAP3 for consistency.
+ */
+static int omap_vc_config_channel(struct voltagedomain *voltdm)
+{
+	struct omap_vc_channel *vc = voltdm->vc;
+
+	/*
+	 * For channel zero, the only configurable bit is RACEN.
+	 * All others must stay at zero (see function comment above.)
+	 */
+	if (!vc->cfg_channel_sa_shift)
+		vc->cfg_channel &= CFG_CHANNEL_RACEN;
+
+	voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift,
+		    vc->cfg_channel << vc->cfg_channel_sa_shift,
+		    vc->common->cfg_channel_reg);
+
+	return 0;
+}
+
 /* Voltage scale and accessory APIs */
 int omap_vc_pre_scale(struct voltagedomain *voltdm,
 		      unsigned long target_volt,
@@ -157,8 +204,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
 	 * Generic VC parameters init
 	 * XXX This data should be abstracted out
 	 */
-	voltdm->write(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK,
-		       OMAP3_PRM_VC_CH_CONF_OFFSET);
 	voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK,
 		       OMAP3_PRM_VC_I2C_CFG_OFFSET);
 
@@ -177,15 +222,6 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
 	if (is_initialized)
 		return;
 
-	/*
-	 * Generic VC parameters init
-	 * XXX This data should be abstracted out
-	 */
-	vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK |
-		  OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK |
-		  OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK);
-	voltdm->write(vc_val, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET);
-
 	/* XXX These are magic numbers and do not belong! */
 	vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT);
 	voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
@@ -213,6 +249,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 		return;
 	}
 
+	vc->cfg_channel = 0;
+
 	/* get PMIC/board specific settings */
 	vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr;
 	vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr;
@@ -223,6 +261,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 	voltdm->rmw(vc->smps_sa_mask,
 		    vc->i2c_slave_addr << __ffs(vc->smps_sa_mask),
 		    vc->common->smps_sa_reg);
+	vc->cfg_channel |= CFG_CHANNEL_SA;
 
 	/*
 	 * Configure the PMIC register addresses.
@@ -230,10 +269,14 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 	voltdm->rmw(vc->smps_volra_mask,
 		    vc->volt_reg_addr << __ffs(vc->smps_volra_mask),
 		    vc->common->smps_volra_reg);
-	if (vc->cmd_reg_addr)
+	vc->cfg_channel |= CFG_CHANNEL_RAV;
+
+	if (vc->cmd_reg_addr) {
 		voltdm->rmw(vc->smps_cmdra_mask,
 			    vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask),
 			    vc->common->smps_cmdra_reg);
+		vc->cfg_channel |= CFG_CHANNEL_RAC | CFG_CHANNEL_RACEN;
+	}
 
 	/* Set up the on, inactive, retention and off voltage */
 	on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt);
@@ -245,6 +288,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 	       (ret_vsel << vc->common->cmd_ret_shift) |
 	       (off_vsel << vc->common->cmd_off_shift));
 	voltdm->write(val, vc->cmdval_reg);
+	vc->cfg_channel |= CFG_CHANNEL_CMD;
+
+	/* Channel configuration */
+	omap_vc_config_channel(voltdm);
 
 	/* Configure the setup times */
 	voltdm->rmw(voltdm->vfsm->voltsetup_mask,
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index ade35f7..e0d2931 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -53,6 +53,7 @@ struct omap_vc_common {
 	u8 cmd_onlp_shift;
 	u8 cmd_ret_shift;
 	u8 cmd_off_shift;
+	u8 cfg_channel_reg;
 };
 
 /**
@@ -66,6 +67,7 @@ struct omap_vc_channel {
 	u8 i2c_slave_addr;
 	u8 volt_reg_addr;
 	u8 cmd_reg_addr;
+	u8 cfg_channel;
 	u16 setup_time;
 
 	/* register access data */
@@ -74,6 +76,7 @@ struct omap_vc_channel {
 	u32 smps_volra_mask;
 	u32 smps_cmdra_mask;
 	u8 cmdval_reg;
+	u8 cfg_channel_sa_shift;
 };
 
 extern struct omap_vc_channel omap3_vc_mpu;
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index df8bd5e..f4449eb 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -43,6 +43,7 @@ static struct omap_vc_common omap3_vc_common = {
 	.cmd_onlp_shift	 = OMAP3430_VC_CMD_ONLP_SHIFT,
 	.cmd_ret_shift	 = OMAP3430_VC_CMD_RET_SHIFT,
 	.cmd_off_shift	 = OMAP3430_VC_CMD_OFF_SHIFT,
+	.cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
 };
 
 struct omap_vc_channel omap3_vc_mpu = {
@@ -51,6 +52,7 @@ struct omap_vc_channel omap3_vc_mpu = {
 	.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK,
 	.smps_volra_mask = OMAP3430_VOLRA0_MASK,
 	.smps_cmdra_mask = OMAP3430_CMDRA0_MASK,
+	.cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT,
 };
 
 struct omap_vc_channel omap3_vc_core = {
@@ -59,4 +61,5 @@ struct omap_vc_channel omap3_vc_core = {
 	.smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK,
 	.smps_volra_mask = OMAP3430_VOLRA1_MASK,
 	.smps_cmdra_mask = OMAP3430_CMDRA1_MASK,
+	.cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT,
 };
diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c
index 5d104ff..f933f98 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -44,6 +44,7 @@ static const struct omap_vc_common omap4_vc_common = {
 	.cmd_onlp_shift = OMAP4430_ONLP_SHIFT,
 	.cmd_ret_shift = OMAP4430_RET_SHIFT,
 	.cmd_off_shift = OMAP4430_OFF_SHIFT,
+	.cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET,
 };
 
 /* VC instance data for each controllable voltage line */
@@ -53,6 +54,7 @@ struct omap_vc_channel omap4_vc_mpu = {
 	.smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK,
 	.smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK,
 	.smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK,
+	.cfg_channel_sa_shift = OMAP4430_SA_VDD_MPU_L_SHIFT,
 };
 
 struct omap_vc_channel omap4_vc_iva = {
@@ -61,6 +63,7 @@ struct omap_vc_channel omap4_vc_iva = {
 	.smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK,
 	.smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK,
 	.smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK,
+	.cfg_channel_sa_shift = OMAP4430_SA_VDD_IVA_L_SHIFT,
 };
 
 struct omap_vc_channel omap4_vc_core = {
@@ -69,5 +72,6 @@ struct omap_vc_channel omap4_vc_core = {
 	.smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK,
 	.smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK,
 	.smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK,
+	.cfg_channel_sa_shift = OMAP4430_SA_VDD_CORE_L_SHIFT,
 };
 
-- 
1.7.4

[PATCH/RFC 11/13] OMAP4: PRM: VC: rename I2C configuration register: s/INSTE/MODE/

[Kevin Hilman]

Current code uses the name PRM_VC_CFG_I2C_INSTE for the VC I2C
configuration mode register.  The TRM name for the I2C configuration
mode register is PRM_VC_CFG_I2C_MODE.  Rename accordingly.

No functional changes (no current users of this register.)

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/prm44xx.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 048c8e5..026529f 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -713,8 +713,8 @@
 #define OMAP4430_PRM_VC_VAL_BYPASS			OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0)
 #define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET			0x00a4
 #define OMAP4430_PRM_VC_CFG_CHANNEL			OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4)
-#define OMAP4_PRM_VC_CFG_I2C_INSTE_OFFSET		0x00a8
-#define OMAP4430_PRM_VC_CFG_I2C_INSTE			OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8)
+#define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET		0x00a8
+#define OMAP4430_PRM_VC_CFG_I2C_MODE			OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8)
 #define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET			0x00ac
 #define OMAP4430_PRM_VC_CFG_I2C_CLK			OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac)
 #define OMAP4_PRM_SRAM_COUNT_OFFSET			0x00b0
-- 
1.7.4

[PATCH/RFC 12/13] OMAP3+: voltage domain: move PMIC struct from vdd_info into struct voltagedomain

[Kevin Hilman]

Move structure containing PMIC configurable settings into struct
voltagedomain.  In the process, rename from omap_volt_pmic_info to
omap_voltdm_pmic (_info suffix is not helpful.)

No functional changes.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/omap_twl.c |   28 ++++++++++++++--------------
 arch/arm/mach-omap2/vc.c       |   29 ++++++++++++++---------------
 arch/arm/mach-omap2/voltage.c  |   29 ++++++++++++-----------------
 arch/arm/mach-omap2/voltage.h  |   12 ++++++------
 arch/arm/mach-omap2/vp.c       |   13 ++++++-------
 5 files changed, 52 insertions(+), 59 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index 9428b00..feefd30 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -143,7 +143,7 @@ static u8 twl6030_uv_to_vsel(unsigned long uv)
 		return DIV_ROUND_UP(uv - 600000, 12500) + 1;
 }
 
-static struct omap_volt_pmic_info omap3_mpu_volt_info = {
+static struct omap_voltdm_pmic omap3_mpu_pmic = {
 	.slew_rate		= 4000,
 	.step_size		= 12500,
 	.on_volt		= 1200000,
@@ -163,7 +163,7 @@ static struct omap_volt_pmic_info omap3_mpu_volt_info = {
 	.uv_to_vsel		= twl4030_uv_to_vsel,
 };
 
-static struct omap_volt_pmic_info omap3_core_volt_info = {
+static struct omap_voltdm_pmic omap3_core_pmic = {
 	.slew_rate		= 4000,
 	.step_size		= 12500,
 	.on_volt                = 1200000,
@@ -183,7 +183,7 @@ static struct omap_volt_pmic_info omap3_core_volt_info = {
 	.uv_to_vsel		= twl4030_uv_to_vsel,
 };
 
-static struct omap_volt_pmic_info omap4_mpu_volt_info = {
+static struct omap_voltdm_pmic omap4_mpu_pmic = {
 	.slew_rate		= 4000,
 	.step_size		= 12500,
 	.on_volt		= 1350000,
@@ -203,7 +203,7 @@ static struct omap_volt_pmic_info omap4_mpu_volt_info = {
 	.uv_to_vsel		= twl6030_uv_to_vsel,
 };
 
-static struct omap_volt_pmic_info omap4_iva_volt_info = {
+static struct omap_voltdm_pmic omap4_iva_pmic = {
 	.slew_rate		= 4000,
 	.step_size		= 12500,
 	.on_volt		= 1100000,
@@ -223,7 +223,7 @@ static struct omap_volt_pmic_info omap4_iva_volt_info = {
 	.uv_to_vsel		= twl6030_uv_to_vsel,
 };
 
-static struct omap_volt_pmic_info omap4_core_volt_info = {
+static struct omap_voltdm_pmic omap4_core_pmic = {
 	.slew_rate		= 4000,
 	.step_size		= 12500,
 	.on_volt		= 1100000,
@@ -251,13 +251,13 @@ int __init omap4_twl_init(void)
 		return -ENODEV;
 
 	voltdm = voltdm_lookup("mpu");
-	omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info);
+	omap_voltage_register_pmic(voltdm, &omap4_mpu_pmic);
 
 	voltdm = voltdm_lookup("iva");
-	omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info);
+	omap_voltage_register_pmic(voltdm, &omap4_iva_pmic);
 
 	voltdm = voltdm_lookup("core");
-	omap_voltage_register_pmic(voltdm, &omap4_core_volt_info);
+	omap_voltage_register_pmic(voltdm, &omap4_core_pmic);
 
 	return 0;
 }
@@ -270,10 +270,10 @@ int __init omap3_twl_init(void)
 		return -ENODEV;
 
 	if (cpu_is_omap3630()) {
-		omap3_mpu_volt_info.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN;
-		omap3_mpu_volt_info.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX;
-		omap3_core_volt_info.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN;
-		omap3_core_volt_info.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX;
+		omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN;
+		omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX;
+		omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN;
+		omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX;
 	}
 
 	/*
@@ -289,10 +289,10 @@ int __init omap3_twl_init(void)
 		omap3_twl_set_sr_bit(true);
 
 	voltdm = voltdm_lookup("mpu_iva");
-	omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info);
+	omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic);
 
 	voltdm = voltdm_lookup("core");
-	omap_voltage_register_pmic(voltdm, &omap3_core_volt_info);
+	omap_voltage_register_pmic(voltdm, &omap3_core_pmic);
 
 	return 0;
 }
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 1ce7b24..910d02f 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -71,13 +71,13 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
 	vp_common = vdd->vp_data->vp_common;
 
 	/* Check if sufficient pmic info is available for this vdd */
-	if (!vdd->pmic_info) {
+	if (!voltdm->pmic) {
 		pr_err("%s: Insufficient pmic info to scale the vdd_%s\n",
 			__func__, voltdm->name);
 		return -EINVAL;
 	}
 
-	if (!vdd->pmic_info->uv_to_vsel) {
+	if (!voltdm->pmic->uv_to_vsel) {
 		pr_err("%s: PMIC function to convert voltage in uV to"
 			"vsel not registered. Hence unable to scale voltage"
 			"for vdd_%s\n", __func__, voltdm->name);
@@ -95,7 +95,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm,
 	if (IS_ERR(volt_data))
 		volt_data = NULL;
 
-	*target_vsel = vdd->pmic_info->uv_to_vsel(target_volt);
+	*target_vsel = voltdm->pmic->uv_to_vsel(target_volt);
 	*current_vsel = voltdm->read(vdd->vp_data->voltage);
 
 	/* Setting the ON voltage to the new target voltage */
@@ -126,8 +126,8 @@ void omap_vc_post_scale(struct voltagedomain *voltdm,
 
 	smps_steps = abs(target_vsel - current_vsel);
 	/* SMPS slew rate / step size. 2us added as buffer. */
-	smps_delay = ((smps_steps * vdd->pmic_info->step_size) /
-			vdd->pmic_info->slew_rate) + 2;
+	smps_delay = ((smps_steps * voltdm->pmic->step_size) /
+			voltdm->pmic->slew_rate) + 2;
 	udelay(smps_delay);
 
 	vdd->curr_volt = target_volt;
@@ -232,11 +232,10 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
 void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 {
 	struct omap_vc_channel *vc = voltdm->vc;
-	struct omap_vdd_info *vdd = voltdm->vdd;
 	u8 on_vsel, onlp_vsel, ret_vsel, off_vsel;
 	u32 val;
 
-	if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
+	if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
 		pr_err("%s: PMIC info requried to configure vc for"
 			"vdd_%s not populated.Hence cannot initialize vc\n",
 			__func__, voltdm->name);
@@ -252,10 +251,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 	vc->cfg_channel = 0;
 
 	/* get PMIC/board specific settings */
-	vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr;
-	vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr;
-	vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr;
-	vc->setup_time = vdd->pmic_info->volt_setup_time;
+	vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr;
+	vc->volt_reg_addr = voltdm->pmic->volt_reg_addr;
+	vc->cmd_reg_addr = voltdm->pmic->cmd_reg_addr;
+	vc->setup_time = voltdm->pmic->volt_setup_time;
 
 	/* Configure the i2c slave address for this VC */
 	voltdm->rmw(vc->smps_sa_mask,
@@ -279,10 +278,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 	}
 
 	/* Set up the on, inactive, retention and off voltage */
-	on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt);
-	onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt);
-	ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt);
-	off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt);
+	on_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->on_volt);
+	onlp_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->onlp_volt);
+	ret_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->ret_volt);
+	off_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->off_volt);
 	val = ((on_vsel << vc->common->cmd_on_shift) |
 	       (onlp_vsel << vc->common->cmd_onlp_shift) |
 	       (ret_vsel << vc->common->cmd_ret_shift) |
diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c
index 7d859f0..d9e619f 100644
--- a/arch/arm/mach-omap2/voltage.c
+++ b/arch/arm/mach-omap2/voltage.c
@@ -84,20 +84,20 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm)
 	vdd->vp_enabled = false;
 
 	vdd->vp_rt_data.vpconfig_erroroffset =
-		(vdd->pmic_info->vp_erroroffset <<
+		(voltdm->pmic->vp_erroroffset <<
 		 vdd->vp_data->vp_common->vpconfig_erroroffset_shift);
 
-	timeout_val = (sys_clk_speed * vdd->pmic_info->vp_timeout_us) / 1000;
+	timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000;
 	vdd->vp_rt_data.vlimitto_timeout = timeout_val;
-	vdd->vp_rt_data.vlimitto_vddmin = vdd->pmic_info->vp_vddmin;
-	vdd->vp_rt_data.vlimitto_vddmax = vdd->pmic_info->vp_vddmax;
+	vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin;
+	vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax;
 
-	waittime = ((vdd->pmic_info->step_size / vdd->pmic_info->slew_rate) *
+	waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) *
 				sys_clk_speed) / 1000;
 	vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime;
 	vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime;
-	vdd->vp_rt_data.vstepmin_stepmin = vdd->pmic_info->vp_vstepmin;
-	vdd->vp_rt_data.vstepmax_stepmax = vdd->pmic_info->vp_vstepmax;
+	vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin;
+	vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax;
 
 	return 0;
 }
@@ -149,10 +149,9 @@ static void __init vdd_debugfs_init(struct voltagedomain *voltdm)
 
 static int __init omap_vdd_data_configure(struct voltagedomain *voltdm)
 {
-	struct omap_vdd_info *vdd = voltdm->vdd;
 	int ret = -EINVAL;
 
-	if (!vdd->pmic_info) {
+	if (!voltdm->pmic) {
 		pr_err("%s: PMIC info requried to configure vdd_%s not"
 			"populated.Hence cannot initialize vdd_%s\n",
 			__func__, voltdm->name, voltdm->name);
@@ -324,24 +323,20 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm,
  * omap_voltage_register_pmic() - API to register PMIC specific data
  * @voltdm:	pointer to the VDD for which the PMIC specific data is
  *		to be registered
- * @pmic_info:	the structure containing pmic info
+ * @pmic:	the structure containing pmic info
  *
  * This API is to be called by the SOC/PMIC file to specify the
- * pmic specific info as present in omap_volt_pmic_info structure.
+ * pmic specific info as present in omap_voltdm_pmic structure.
  */
 int omap_voltage_register_pmic(struct voltagedomain *voltdm,
-		struct omap_volt_pmic_info *pmic_info)
+			       struct omap_voltdm_pmic *pmic)
 {
-	struct omap_vdd_info *vdd;
-
 	if (!voltdm || IS_ERR(voltdm)) {
 		pr_warning("%s: VDD specified does not exist!\n", __func__);
 		return -EINVAL;
 	}
 
-	vdd = voltdm->vdd;
-
-	vdd->pmic_info = pmic_info;
+	voltdm->pmic = pmic;
 
 	return 0;
 }
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index db08e2a..8b2d951 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -68,6 +68,7 @@ struct voltagedomain {
 	struct list_head pwrdm_list;
 	struct omap_vc_channel *vc;
 	const struct omap_vfsm_instance_data *vfsm;
+	struct omap_voltdm_pmic *pmic;
 
 	/* VC/VP register access functions: SoC specific */
 	u32 (*read) (u8 offset);
@@ -97,13 +98,13 @@ struct omap_volt_data {
 };
 
 /**
- * struct omap_volt_pmic_info - PMIC specific data required by voltage driver.
+ * struct omap_voltdm_pmic - PMIC specific data required by voltage driver.
  * @slew_rate:	PMIC slew rate (in uv/us)
  * @step_size:	PMIC voltage step size (in uv)
  * @vsel_to_uv:	PMIC API to convert vsel value to actual voltage in uV.
  * @uv_to_vsel:	PMIC API to convert voltage in uV to vsel value.
  */
-struct omap_volt_pmic_info {
+struct omap_voltdm_pmic {
 	int slew_rate;
 	int step_size;
 	u32 on_volt;
@@ -129,7 +130,7 @@ struct omap_volt_pmic_info {
  *
  * @volt_data		: voltage table having the distinct voltages supported
  *			  by the domain and other associated per voltage data.
- * @pmic_info		: pmic specific parameters which should be populted by
+ * @pmic		: pmic specific parameters which should be populted by
  *			  the pmic drivers.
  * @vp_data		: the register values, shifts, masks for various
  *			  vp registers
@@ -145,7 +146,6 @@ struct omap_volt_pmic_info {
  */
 struct omap_vdd_info {
 	struct omap_volt_data *volt_data;
-	struct omap_volt_pmic_info *pmic_info;
 	struct omap_vp_instance_data *vp_data;
 	struct omap_vp_runtime_data vp_rt_data;
 	struct dentry *debug_dir;
@@ -167,13 +167,13 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm);
 struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm);
 #ifdef CONFIG_PM
 int omap_voltage_register_pmic(struct voltagedomain *voltdm,
-		struct omap_volt_pmic_info *pmic_info);
+			       struct omap_voltdm_pmic *pmic);
 void omap_change_voltscale_method(struct voltagedomain *voltdm,
 		int voltscale_method);
 int omap_voltage_late_init(void);
 #else
 static inline int omap_voltage_register_pmic(struct voltagedomain *voltdm,
-		struct omap_volt_pmic_info *pmic_info)
+					     struct omap_voltdm_pmic *pmic)
 {
 	return -EINVAL;
 }
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 88ac742..a3afcbe 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -18,7 +18,6 @@ static void vp_latch_vsel(struct voltagedomain *voltdm)
 	u32 vpconfig;
 	unsigned long uvdc;
 	char vsel;
-	struct omap_vdd_info *vdd = voltdm->vdd;
 
 	uvdc = omap_voltage_get_nom_volt(voltdm);
 	if (!uvdc) {
@@ -27,13 +26,13 @@ static void vp_latch_vsel(struct voltagedomain *voltdm)
 		return;
 	}
 
-	if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
+	if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
 		pr_warning("%s: PMIC function to convert voltage in uV to"
 			" vsel not registered\n", __func__);
 		return;
 	}
 
-	vsel = vdd->pmic_info->uv_to_vsel(uvdc);
+	vsel = voltdm->pmic->uv_to_vsel(uvdc);
 
 	vpconfig = voltdm->read(vp->vpconfig);
 	vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask |
@@ -206,13 +205,13 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm)
 
 	curr_vsel = voltdm->read(vp->voltage);
 
-	if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) {
+	if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) {
 		pr_warning("%s: PMIC function to convert vsel to voltage"
 			"in uV not registerd\n", __func__);
 		return 0;
 	}
 
-	return vdd->pmic_info->vsel_to_uv(curr_vsel);
+	return voltdm->pmic->vsel_to_uv(curr_vsel);
 }
 
 /**
@@ -323,13 +322,13 @@ static int vp_volt_debug_get(void *data, u64 *val)
 
 	vsel = voltdm->read(vp->voltage);
 
-	if (!vdd->pmic_info->vsel_to_uv) {
+	if (!voltdm->pmic->vsel_to_uv) {
 		pr_warning("PMIC function to convert vsel to voltage"
 			"in uV not registerd\n");
 		return -EINVAL;
 	}
 
-	*val = vdd->pmic_info->vsel_to_uv(vsel);
+	*val = voltdm->pmic->vsel_to_uv(vsel);
 	return 0;
 }
 
-- 
1.7.4

[PATCH/RFC 13/13] OMAP3+: VC: make I2C config programmable with PMIC-specific settings

[Kevin Hilman]

Remove hard-coded I2C configuration in favor of settings that can be
configured from PMIC-specific values.  Currently only high-speed mode
and the master-code value are supported, since they were the only
fields currently used, but extending this is now trivial.

Signed-off-by: Kevin Hilman <khilman@ti.com>
---
 arch/arm/mach-omap2/omap_twl.c    |    4 +++
 arch/arm/mach-omap2/vc.c          |   51 +++++++++++++++++++++++++++++++-----
 arch/arm/mach-omap2/vc.h          |    8 +++++-
 arch/arm/mach-omap2/vc3xxx_data.c |    3 ++
 arch/arm/mach-omap2/vc44xx_data.c |    3 ++
 arch/arm/mach-omap2/voltage.h     |    4 +++
 6 files changed, 65 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index feefd30..30f4323 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -159,6 +159,7 @@ static struct omap_voltdm_pmic omap3_mpu_pmic = {
 	.vp_timeout_us		= OMAP3_VP_VLIMITTO_TIMEOUT_US,
 	.i2c_slave_addr		= OMAP3_SRI2C_SLAVE_ADDR,
 	.volt_reg_addr		= OMAP3_VDD_MPU_SR_CONTROL_REG,
+	.i2c_high_speed		= true,
 	.vsel_to_uv		= twl4030_vsel_to_uv,
 	.uv_to_vsel		= twl4030_uv_to_vsel,
 };
@@ -179,6 +180,7 @@ static struct omap_voltdm_pmic omap3_core_pmic = {
 	.vp_timeout_us		= OMAP3_VP_VLIMITTO_TIMEOUT_US,
 	.i2c_slave_addr		= OMAP3_SRI2C_SLAVE_ADDR,
 	.volt_reg_addr		= OMAP3_VDD_CORE_SR_CONTROL_REG,
+	.i2c_high_speed		= true,
 	.vsel_to_uv		= twl4030_vsel_to_uv,
 	.uv_to_vsel		= twl4030_uv_to_vsel,
 };
@@ -199,6 +201,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = {
 	.vp_timeout_us		= OMAP4_VP_VLIMITTO_TIMEOUT_US,
 	.i2c_slave_addr		= OMAP4_SRI2C_SLAVE_ADDR,
 	.volt_reg_addr		= OMAP4_VDD_MPU_SR_VOLT_REG,
+	.i2c_high_speed		= true,
 	.vsel_to_uv		= twl6030_vsel_to_uv,
 	.uv_to_vsel		= twl6030_uv_to_vsel,
 };
@@ -219,6 +222,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = {
 	.vp_timeout_us		= OMAP4_VP_VLIMITTO_TIMEOUT_US,
 	.i2c_slave_addr		= OMAP4_SRI2C_SLAVE_ADDR,
 	.volt_reg_addr		= OMAP4_VDD_IVA_SR_VOLT_REG,
+	.i2c_high_speed		= true,
 	.vsel_to_uv		= twl6030_vsel_to_uv,
 	.uv_to_vsel		= twl6030_uv_to_vsel,
 };
diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c
index 910d02f..f8cdb87 100644
--- a/arch/arm/mach-omap2/vc.c
+++ b/arch/arm/mach-omap2/vc.c
@@ -200,13 +200,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
 	if (is_initialized)
 		return;
 
-	/*
-	 * Generic VC parameters init
-	 * XXX This data should be abstracted out
-	 */
-	voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK,
-		       OMAP3_PRM_VC_I2C_CFG_OFFSET);
-
 	omap3_vfsm_init(voltdm);
 
 	is_initialized = true;
@@ -229,6 +222,48 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
 	is_initialized = true;
 }
 
+/**
+ * omap_vc_i2c_init - initialize I2C interface to PMIC
+ * @voltdm: voltage domain containing VC data
+ *
+ * Use PMIC supplied seetings for I2C high-speed mode and
+ * master code (if set) and program the VC I2C configuration
+ * register.
+ *
+ * The VC I2C configuration is common to all VC channels,
+ * so this function only configures I2C for the first VC
+ * channel registers.  All other VC channels will use the
+ * same configuration.
+ */
+void __init omap_vc_i2c_init(struct voltagedomain *voltdm)
+{
+	struct omap_vc_channel *vc = voltdm->vc;
+	static bool initialized;
+	static bool i2c_high_speed;
+	u8 mcode;
+
+	if (initialized) {
+		if (voltdm->pmic->i2c_high_speed != i2c_high_speed)
+			pr_warn("%s: I2C config for all channels must match.",
+				__func__);
+		return;
+	}
+
+	i2c_high_speed = voltdm->pmic->i2c_high_speed;
+	if (i2c_high_speed)
+		voltdm->rmw(vc->common->i2c_cfg_hsen_shift,
+			    vc->common->i2c_cfg_hsen_shift,
+			    vc->common->i2c_cfg_reg);
+
+	mcode = voltdm->pmic->i2c_mcode;
+	if (mcode)
+		voltdm->rmw(vc->common->i2c_mcode_mask,
+			    mcode << __ffs(vc->common->i2c_mcode_mask),
+			    vc->common->i2c_cfg_reg);
+
+	initialized = true;
+}
+
 void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 {
 	struct omap_vc_channel *vc = voltdm->vc;
@@ -297,6 +332,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm)
 		    vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask),
 		    voltdm->vfsm->voltsetup_reg);
 
+	omap_vc_i2c_init(voltdm);
+
 	if (cpu_is_omap34xx())
 		omap3_vc_init_channel(voltdm);
 	else if (cpu_is_omap44xx())
diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h
index e0d2931..85f13f1 100644
--- a/arch/arm/mach-omap2/vc.h
+++ b/arch/arm/mach-omap2/vc.h
@@ -35,6 +35,9 @@ struct voltagedomain;
  * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register
  * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register
  * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register
+ * @i2c_cfg_reg: I2C configuration register offset
+ * @i2c_cfg_hsen_shift: high-speed mode bit field shift in I2C config register
+ * @i2c_mcode_mask: MCODE field mask for I2C config register
  *
  * XXX One of cmd_on_mask and cmd_on_shift are not needed
  * XXX VALID should probably be a shift, not a mask
@@ -54,6 +57,9 @@ struct omap_vc_common {
 	u8 cmd_ret_shift;
 	u8 cmd_off_shift;
 	u8 cfg_channel_reg;
+	u8 i2c_cfg_reg;
+	u8 i2c_cfg_hsen_shift;
+	u8 i2c_mcode_mask;
 };
 
 /**
@@ -69,6 +75,7 @@ struct omap_vc_channel {
 	u8 cmd_reg_addr;
 	u8 cfg_channel;
 	u16 setup_time;
+	bool i2c_high_speed;
 
 	/* register access data */
 	const struct omap_vc_common *common;
@@ -95,6 +102,5 @@ void omap_vc_post_scale(struct voltagedomain *voltdm,
 			u8 target_vsel, u8 current_vsel);
 int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm,
 				 unsigned long target_volt);
-
 #endif
 
diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c
index f4449eb..688d55d 100644
--- a/arch/arm/mach-omap2/vc3xxx_data.c
+++ b/arch/arm/mach-omap2/vc3xxx_data.c
@@ -44,6 +44,9 @@ static struct omap_vc_common omap3_vc_common = {
 	.cmd_ret_shift	 = OMAP3430_VC_CMD_RET_SHIFT,
 	.cmd_off_shift	 = OMAP3430_VC_CMD_OFF_SHIFT,
 	.cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET,
+	.i2c_cfg_hsen_shift = OMAP3430_HSEN_MASK,
+	.i2c_cfg_reg	 = OMAP3_PRM_VC_I2C_CFG_OFFSET,
+	.i2c_mcode_mask	 = OMAP3430_MCODE_MASK,
 };
 
 struct omap_vc_channel omap3_vc_mpu = {
diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c
index f933f98..8aee1fe 100644
--- a/arch/arm/mach-omap2/vc44xx_data.c
+++ b/arch/arm/mach-omap2/vc44xx_data.c
@@ -45,6 +45,9 @@ static const struct omap_vc_common omap4_vc_common = {
 	.cmd_ret_shift = OMAP4430_RET_SHIFT,
 	.cmd_off_shift = OMAP4430_OFF_SHIFT,
 	.cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET,
+	.i2c_cfg_reg = OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET,
+	.i2c_cfg_hsen_shift = OMAP4430_HSMODEEN_SHIFT,
+	.i2c_mcode_mask	 = OMAP4430_HSMCODE_MASK,
 };
 
 /* VC instance data for each controllable voltage line */
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index 8b2d951..d2c965e 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -101,6 +101,8 @@ struct omap_volt_data {
  * struct omap_voltdm_pmic - PMIC specific data required by voltage driver.
  * @slew_rate:	PMIC slew rate (in uv/us)
  * @step_size:	PMIC voltage step size (in uv)
+ * @i2c_high_speed: whether VC uses I2C high-speed mode to PMIC
+ * @i2c_mcode: master code value for I2C high-speed preamble transmission
  * @vsel_to_uv:	PMIC API to convert vsel value to actual voltage in uV.
  * @uv_to_vsel:	PMIC API to convert voltage in uV to vsel value.
  */
@@ -121,6 +123,8 @@ struct omap_voltdm_pmic {
 	u8 i2c_slave_addr;
 	u8 volt_reg_addr;
 	u8 cmd_reg_addr;
+	bool i2c_high_speed;
+	u8 i2c_mcode;
 	unsigned long (*vsel_to_uv) (const u8 vsel);
 	u8 (*uv_to_vsel) (unsigned long uV);
 };
-- 
1.7.4