From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Ithamar R. Adema" Subject: Re: [RFC PATCH] Consolidate SRAM support Date: Fri, 15 Apr 2011 16:02:31 +0200 Message-ID: <1302876151.2036.14.camel@team-embedded-2> References: <20110415130607.GM1611@n2100.arm.linux.org.uk> <4DA84AAB.60601@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <4DA84AAB.60601@gmail.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Rob Herring Cc: Kevin Hilman , davinci-linux-open-source@linux.davincidsp.com, Russell King - ARM Linux , Tony Lindgren , Sekhar Nori , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: linux-omap@vger.kernel.org On Fri, 2011-04-15 at 08:39 -0500, Rob Herring wrote: > lpc32xx and pnx4008 also use iram, but do not have an allocator (only > 1 user). Both are doing a copy the suspend code to IRAM and run it > which may also be a good thing to have generic code for. Several i.MX > chips also need to run from IRAM for suspend. There will be similar patches for my lpc2k architecture once it gets accepted, a common interface would be _very_ beneficial IMHO. Regards, Ithamar.