[PATCH 3/5] OMAP: DSS2: Use for loop where ever possible in SR(), RR(), DUMPREG()

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From: Amber Jain <amber@ti.com>
To: linux-omap@vger.kernel.org
Cc: tomi.valkeinen@ti.com, molnar@ti.com, Amber Jain <amber@ti.com>
Subject: [PATCH 3/5] OMAP: DSS2: Use for loop where ever possible in SR(), RR(), DUMPREG()
Date: Thu, 19 May 2011 11:01:28 +0530	[thread overview]
Message-ID: <1305783090-21214-4-git-send-email-amber@ti.com> (raw)
In-Reply-To: <1305783090-21214-1-git-send-email-amber@ti.com>

Use for loop instead of individual entries for OVL_FIR_COEF_H, OVL_FIR_COEF_HV,
OVL_FIR_COEF_V and OVL_CONV_COEF in SR(), RR() and DUMPREG() functions.

Signed-off-by: Amber Jain <amber@ti.com>
---
 drivers/video/omap2/dss/dispc.c |  257 +++++++++++----------------------------
 1 files changed, 70 insertions(+), 187 deletions(-)

diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 92169bb..19b0b50 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -129,6 +129,7 @@ static inline u32 dispc_read_reg(const u16 idx)
 
 void dispc_save_context(void)
 {
+	int i;
 	if (cpu_is_omap24xx())
 		return;
 
@@ -204,38 +205,17 @@ void dispc_save_context(void)
 	SR(OVL_ACCU0(OMAP_DSS_VIDEO1));
 	SR(OVL_ACCU1(OMAP_DSS_VIDEO1));
 
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 0));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 1));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 2));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 3));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 4));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 5));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 6));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 7));
-
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 0));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 1));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 2));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 3));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 4));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 5));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 6));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 7));
-
-	SR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, 0));
-	SR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, 1));
-	SR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, 2));
-	SR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, 3));
-	SR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, 4));
-
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 0));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 1));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 2));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 3));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 4));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 5));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 6));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 7));
+	for (i = 0; i < 8; i++)
+		SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, i));
+
+	for (i = 0; i < 8; i++)
+		SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, i));
+
+	for (i = 0; i < 5; i++)
+		SR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, i));
+
+	for (i = 0; i < 8; i++)
+		SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, i));
 
 	SR(OVL_PRELOAD(OMAP_DSS_VIDEO1));
 
@@ -253,38 +233,17 @@ void dispc_save_context(void)
 	SR(OVL_ACCU0(OMAP_DSS_VIDEO2));
 	SR(OVL_ACCU1(OMAP_DSS_VIDEO2));
 
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 0));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 1));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 2));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 3));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 4));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 5));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 6));
-	SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 7));
-
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 0));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 1));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 2));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 3));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 4));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 5));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 6));
-	SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 7));
-
-	SR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, 0));
-	SR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, 1));
-	SR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, 2));
-	SR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, 3));
-	SR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, 4));
-
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 0));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 1));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 2));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 3));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 4));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 5));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 6));
-	SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 7));
+	for (i = 0; i < 8; i++)
+		SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, i));
+
+	for (i = 0; i < 8; i++)
+		SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, i));
+
+	for (i = 0; i < 5; i++)
+		SR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, i));
+
+	for (i = 0; i < 8; i++)
+		SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, i));
 
 	SR(OVL_PRELOAD(OMAP_DSS_VIDEO2));
 
@@ -294,6 +253,7 @@ void dispc_save_context(void)
 
 void dispc_restore_context(void)
 {
+	int i;
 	RR(SYSCONFIG);
 	/*RR(IRQENABLE);*/
 	/*RR(CONTROL);*/
@@ -366,38 +326,17 @@ void dispc_restore_context(void)
 	RR(OVL_ACCU0(OMAP_DSS_VIDEO1));
 	RR(OVL_ACCU1(OMAP_DSS_VIDEO1));
 
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 0));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 1));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 2));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 3));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 4));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 5));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 6));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 7));
-
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 0));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 1));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 2));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 3));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 4));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 5));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 6));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 7));
-
-	RR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, 0));
-	RR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, 1));
-	RR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, 2));
-	RR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, 3));
-	RR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, 4));
-
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 0));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 1));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 2));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 3));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 4));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 5));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 6));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 7));
+	for (i = 0; i < 8; i++)
+		RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, i));
+
+	for (i = 0; i < 8; i++)
+		RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, i));
+
+	for (i = 0; i < 5; i++)
+		RR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, i));
+
+	for (i = 0; i < 8; i++)
+		RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, i));
 
 	RR(OVL_PRELOAD(OMAP_DSS_VIDEO1));
 
@@ -415,38 +354,17 @@ void dispc_restore_context(void)
 	RR(OVL_ACCU0(OMAP_DSS_VIDEO2));
 	RR(OVL_ACCU1(OMAP_DSS_VIDEO2));
 
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 0));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 1));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 2));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 3));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 4));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 5));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 6));
-	RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 7));
-
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 0));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 1));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 2));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 3));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 4));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 5));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 6));
-	RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 7));
-
-	RR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, 0));
-	RR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, 1));
-	RR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, 2));
-	RR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, 3));
-	RR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, 4));
-
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 0));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 1));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 2));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 3));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 4));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 5));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 6));
-	RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 7));
+	for (i = 0; i < 8; i++)
+		RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, i));
+
+	for (i = 0; i < 8; i++)
+		RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, i));
+
+	for (i = 0; i < 5; i++)
+		RR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, i));
+
+	for (i = 0; i < 8; i++)
+		RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, i));
 
 	RR(OVL_PRELOAD(OMAP_DSS_VIDEO2));
 
@@ -2454,6 +2372,7 @@ void dispc_dump_regs(struct seq_file *s)
 {
 #define DUMPREG(r) seq_printf(s, "%-50s %08x\n", #r, dispc_read_reg(r))
 
+	int i;
 	dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
 
 	DUMPREG(DISPC_REVISION);
@@ -2548,65 +2467,29 @@ void dispc_dump_regs(struct seq_file *s)
 	DUMPREG(DISPC_OVL_ACCU0(OMAP_DSS_VIDEO2));
 	DUMPREG(DISPC_OVL_ACCU1(OMAP_DSS_VIDEO2));
 
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 0));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 1));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 2));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 3));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 4));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 5));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 6));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 7));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 0));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 1));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 2));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 3));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 4));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 5));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 6));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 7));
-	DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 0));
-	DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 1));
-	DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 2));
-	DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 3));
-	DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 4));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 0));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 1));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 2));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 3));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 4));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 5));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 6));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 7));
-
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 0));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 1));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 2));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 3));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 4));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 5));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 6));
-	DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 7));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 0));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 1));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 2));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 3));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 4));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 5));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 6));
-	DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 7));
-	DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 0));
-	DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 1));
-	DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 2));
-	DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 3));
-	DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 4));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 0));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 1));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 2));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 3));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 4));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 5));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 6));
-	DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 7));
+	for (i = 0; i < 8; i++)
+		DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, i));
+
+	for (i = 0; i < 8; i++)
+		DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, i));
+
+	for (i = 0; i < 5; i++)
+		DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, i));
+
+	for (i = 0; i < 8; i++)
+		DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, i));
+
+	for (i = 0; i < 8; i++)
+		DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, i));
+
+	for (i = 0; i < 8; i++)
+		DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, i));
+
+	for (i = 0; i < 5; i++)
+		DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, i));
+
+	for (i = 0; i < 8; i++)
+		DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, i));
 
 	DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_VIDEO1));
 	DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_VIDEO2));
-- 
1.7.1

next prev parent reply	other threads:[~2011-05-19  5:31 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-05-19  5:31 [PATCH 0/5] OMAP: DSS2: Add suppport for new color format Amber Jain
2011-05-19  5:31 ` [PATCH 1/5] OMAP: DSS2: Add new color formats Amber Jain
2011-05-19  6:12   ` Tomi Valkeinen
2011-05-19  5:31 ` [PATCH 2/5] OMAP: DSS2: configuring non-zero values for fir_hinc/fir_vinc Amber Jain
2011-05-19  6:34   ` Tomi Valkeinen
2011-05-19  5:31 ` Amber Jain [this message]
2011-05-19  5:31 ` [PATCH 4/5] OMAP: DSS2: Adds new registers for NV12 support Amber Jain
2011-05-19  6:45   ` Tomi Valkeinen
2011-05-19  5:31 ` [PATCH 5/5] OMAP: DSS2: Add support for NV12 format Amber Jain
2011-05-19  6:51   ` Tomi Valkeinen

find likely ancestor, descendant, or conflicting patches for this message:
( dfblob:92169bb dfblob:19b0b50 )
 OR (
bs:"[PATCH 3/5] OMAP: DSS2: Use for loop where ever possible in SR(), RR(), DUMPREG()" )
	(help)

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