* [PATCH v2 1/5] OMAP: DSS2: DISPC: Prepare dispc_dump_regs() for shortening
2011-08-05 13:35 [PATCH v2 0/5] OMAP: DSS2: Miscellaneous DISPC Patches Archit Taneja
@ 2011-08-05 13:36 ` Archit Taneja
2011-08-05 13:36 ` [PATCH v2 2/5] OMAP: DSS2: DISPC: Shorten dispc_dump_regs() Archit Taneja
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Archit Taneja @ 2011-08-05 13:36 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, Archit Taneja
Prepare dispc_dump_regs() to iterate over manager and overlay id's. Doing this
requires modifications of the macro "DUMPREG" which currently needs us to specify
the manager/overlay name to get the correct result. For example, in order to
print the register DISPC_TIMING_H(OMAP_DSS_CHANNEL_LCD), we can't iterate over
a varaible i and get the desired result through DUMPREG(DISPC_TIMING_H(i)).
Split the registers into 3 sections, the first with no arguments(common
registers), the second with one argument(manager/overlay id), and the third with
two arguments(overlay id and coefficient index), redefine DUMPREG macros for
each of these.
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/dispc.c | 444 +++++++++++++++++++++------------------
1 files changed, 239 insertions(+), 205 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index d849fa0..cdb53aa 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -2712,6 +2712,7 @@ void dispc_dump_regs(struct seq_file *s)
if (dispc_runtime_get())
return;
+ /* DISPC common registers */
DUMPREG(DISPC_REVISION);
DUMPREG(DISPC_SYSCONFIG);
DUMPREG(DISPC_SYSSTATUS);
@@ -2720,242 +2721,275 @@ void dispc_dump_regs(struct seq_file *s)
DUMPREG(DISPC_CONTROL);
DUMPREG(DISPC_CONFIG);
DUMPREG(DISPC_CAPABLE);
- DUMPREG(DISPC_DEFAULT_COLOR(OMAP_DSS_CHANNEL_LCD));
- DUMPREG(DISPC_DEFAULT_COLOR(OMAP_DSS_CHANNEL_DIGIT));
- DUMPREG(DISPC_TRANS_COLOR(OMAP_DSS_CHANNEL_LCD));
- DUMPREG(DISPC_TRANS_COLOR(OMAP_DSS_CHANNEL_DIGIT));
DUMPREG(DISPC_LINE_STATUS);
DUMPREG(DISPC_LINE_NUMBER);
- DUMPREG(DISPC_TIMING_H(OMAP_DSS_CHANNEL_LCD));
- DUMPREG(DISPC_TIMING_V(OMAP_DSS_CHANNEL_LCD));
- DUMPREG(DISPC_POL_FREQ(OMAP_DSS_CHANNEL_LCD));
- DUMPREG(DISPC_DIVISORo(OMAP_DSS_CHANNEL_LCD));
if (dss_has_feature(FEAT_GLOBAL_ALPHA))
DUMPREG(DISPC_GLOBAL_ALPHA);
- DUMPREG(DISPC_SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT));
- DUMPREG(DISPC_SIZE_MGR(OMAP_DSS_CHANNEL_LCD));
if (dss_has_feature(FEAT_MGR_LCD2)) {
DUMPREG(DISPC_CONTROL2);
DUMPREG(DISPC_CONFIG2);
- DUMPREG(DISPC_DEFAULT_COLOR(OMAP_DSS_CHANNEL_LCD2));
- DUMPREG(DISPC_TRANS_COLOR(OMAP_DSS_CHANNEL_LCD2));
- DUMPREG(DISPC_TIMING_H(OMAP_DSS_CHANNEL_LCD2));
- DUMPREG(DISPC_TIMING_V(OMAP_DSS_CHANNEL_LCD2));
- DUMPREG(DISPC_POL_FREQ(OMAP_DSS_CHANNEL_LCD2));
- DUMPREG(DISPC_DIVISORo(OMAP_DSS_CHANNEL_LCD2));
- DUMPREG(DISPC_SIZE_MGR(OMAP_DSS_CHANNEL_LCD2));
- }
-
- DUMPREG(DISPC_OVL_BA0(OMAP_DSS_GFX));
- DUMPREG(DISPC_OVL_BA1(OMAP_DSS_GFX));
- DUMPREG(DISPC_OVL_POSITION(OMAP_DSS_GFX));
- DUMPREG(DISPC_OVL_SIZE(OMAP_DSS_GFX));
- DUMPREG(DISPC_OVL_ATTRIBUTES(OMAP_DSS_GFX));
- DUMPREG(DISPC_OVL_FIFO_THRESHOLD(OMAP_DSS_GFX));
- DUMPREG(DISPC_OVL_FIFO_SIZE_STATUS(OMAP_DSS_GFX));
- DUMPREG(DISPC_OVL_ROW_INC(OMAP_DSS_GFX));
- DUMPREG(DISPC_OVL_PIXEL_INC(OMAP_DSS_GFX));
- DUMPREG(DISPC_OVL_WINDOW_SKIP(OMAP_DSS_GFX));
- DUMPREG(DISPC_OVL_TABLE_BA(OMAP_DSS_GFX));
-
- DUMPREG(DISPC_DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD));
- DUMPREG(DISPC_DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD));
- DUMPREG(DISPC_DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD));
+ }
+
+#undef DUMPREG
+
+#define DISPC_REG(i, name) name(i)
+#define DUMPREG(i, r) seq_printf(s, "%s(%s)%*s %08x\n", #r, #i, \
+ 48 - strlen(#r) - strlen(#i), " ", \
+ dispc_read_reg(DISPC_REG(i, r)))
+
+ /* LCD registers */
+ DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DEFAULT_COLOR);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TRANS_COLOR);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TIMING_H);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TIMING_V);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_POL_FREQ);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DIVISORo);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_SIZE_MGR);
+
+ DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE1);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE2);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE3);
if (dss_has_feature(FEAT_CPR)) {
- DUMPREG(DISPC_CPR_COEF_R(OMAP_DSS_CHANNEL_LCD));
- DUMPREG(DISPC_CPR_COEF_G(OMAP_DSS_CHANNEL_LCD));
- DUMPREG(DISPC_CPR_COEF_B(OMAP_DSS_CHANNEL_LCD));
+ DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_R);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_G);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_B);
}
+
+ /* DIGIT registers */
+ DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_DEFAULT_COLOR);
+ DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_TRANS_COLOR);
+ DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_SIZE_MGR);
+
+ /* LCD2 registers */
if (dss_has_feature(FEAT_MGR_LCD2)) {
- DUMPREG(DISPC_DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD2));
- DUMPREG(DISPC_DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD2));
- DUMPREG(DISPC_DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD2));
+ DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DEFAULT_COLOR);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TRANS_COLOR);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TIMING_H);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TIMING_V);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_POL_FREQ);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DIVISORo);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_SIZE_MGR);
+
+ DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE1);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE2);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE3);
if (dss_has_feature(FEAT_CPR)) {
- DUMPREG(DISPC_CPR_COEF_R(OMAP_DSS_CHANNEL_LCD2));
- DUMPREG(DISPC_CPR_COEF_G(OMAP_DSS_CHANNEL_LCD2));
- DUMPREG(DISPC_CPR_COEF_B(OMAP_DSS_CHANNEL_LCD2));
+ DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_R);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_G);
+ DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_B);
}
}
+ /* GFX registers */
+ DUMPREG(OMAP_DSS_GFX, DISPC_OVL_BA0);
+ DUMPREG(OMAP_DSS_GFX, DISPC_OVL_BA1);
+ DUMPREG(OMAP_DSS_GFX, DISPC_OVL_POSITION);
+ DUMPREG(OMAP_DSS_GFX, DISPC_OVL_SIZE);
+ DUMPREG(OMAP_DSS_GFX, DISPC_OVL_ATTRIBUTES);
+ DUMPREG(OMAP_DSS_GFX, DISPC_OVL_FIFO_THRESHOLD);
+ DUMPREG(OMAP_DSS_GFX, DISPC_OVL_FIFO_SIZE_STATUS);
+ DUMPREG(OMAP_DSS_GFX, DISPC_OVL_ROW_INC);
+ DUMPREG(OMAP_DSS_GFX, DISPC_OVL_PIXEL_INC);
+ DUMPREG(OMAP_DSS_GFX, DISPC_OVL_WINDOW_SKIP);
+ DUMPREG(OMAP_DSS_GFX, DISPC_OVL_TABLE_BA);
if (dss_has_feature(FEAT_PRELOAD))
- DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_GFX));
-
- DUMPREG(DISPC_OVL_BA0(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_BA1(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_POSITION(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_SIZE(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_ATTRIBUTES(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_FIFO_THRESHOLD(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_FIFO_SIZE_STATUS(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_ROW_INC(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_PIXEL_INC(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_FIR(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_PICTURE_SIZE(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_ACCU0(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_ACCU1(OMAP_DSS_VIDEO1));
-
- DUMPREG(DISPC_OVL_BA0(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_BA1(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_POSITION(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_SIZE(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_ATTRIBUTES(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_FIFO_THRESHOLD(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_FIFO_SIZE_STATUS(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_ROW_INC(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_PIXEL_INC(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_FIR(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_PICTURE_SIZE(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_ACCU0(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_ACCU1(OMAP_DSS_VIDEO2));
-
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 0));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 1));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 2));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 3));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 4));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 5));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 6));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, 7));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 0));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 1));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 2));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 3));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 4));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 5));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 6));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, 7));
- DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 0));
- DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 1));
- DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 2));
- DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 3));
- DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 4));
- if (dss_has_feature(FEAT_FIR_COEF_V)) {
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 0));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 1));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 2));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 3));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 4));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 5));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 6));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, 7));
+ DUMPREG(OMAP_DSS_GFX, DISPC_OVL_PRELOAD);
+
+ /* VIDEO1 registers */
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA0);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA1);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_POSITION);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_SIZE);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ATTRIBUTES);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIFO_THRESHOLD);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIFO_SIZE_STATUS);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ROW_INC);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PIXEL_INC);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PICTURE_SIZE);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU0);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU1);
+ if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA0_UV);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA1_UV);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR2);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU2_0);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU2_1);
}
-
+ if (dss_has_feature(FEAT_ATTR2))
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ATTRIBUTES2);
+ if (dss_has_feature(FEAT_PRELOAD))
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PRELOAD);
+
+ /* VIDEO2 registers */
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA0);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA1);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_POSITION);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_SIZE);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ATTRIBUTES);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIFO_THRESHOLD);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIFO_SIZE_STATUS);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ROW_INC);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PIXEL_INC);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PICTURE_SIZE);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU0);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU1);
if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
- DUMPREG(DISPC_OVL_BA0_UV(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_BA1_UV(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_FIR2(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_ACCU2_0(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_ACCU2_1(OMAP_DSS_VIDEO1));
-
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 0));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 1));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 2));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 3));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 4));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 5));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 6));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, 7));
-
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 0));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 1));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 2));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 3));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 4));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 5));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 6));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, 7));
-
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 0));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 1));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 2));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 3));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 4));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 5));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 6));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, 7));
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA0_UV);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA1_UV);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR2);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU2_0);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU2_1);
}
if (dss_has_feature(FEAT_ATTR2))
- DUMPREG(DISPC_OVL_ATTRIBUTES2(OMAP_DSS_VIDEO1));
-
-
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 0));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 1));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 2));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 3));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 4));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 5));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 6));
- DUMPREG(DISPC_OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, 7));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 0));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 1));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 2));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 3));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 4));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 5));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 6));
- DUMPREG(DISPC_OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, 7));
- DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 0));
- DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 1));
- DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 2));
- DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 3));
- DUMPREG(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 4));
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ATTRIBUTES2);
+ if (dss_has_feature(FEAT_PRELOAD))
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PRELOAD);
+
+#undef DISPC_REG
+#undef DUMPREG
+
+#define DISPC_REG(plane, name, i) name(plane, i)
+#define DUMPREG(plane, name, i) \
+ seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, #plane, \
+ 46 - strlen(#name) - strlen(#plane), " ", \
+ dispc_read_reg(DISPC_REG(plane, name, i)))
+
+ /* VIDEO1 coefficient registers */
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 0);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 1);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 2);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 3);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 4);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 5);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 6);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 7);
+
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 0);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 1);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 2);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 3);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 4);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 5);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 6);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 7);
+
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 0);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 1);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 2);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 3);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 4);
if (dss_has_feature(FEAT_FIR_COEF_V)) {
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 0));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 1));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 2));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 3));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 4));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 5));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 6));
- DUMPREG(DISPC_OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, 7));
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 0);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 1);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 2);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 3);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 4);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 5);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 6);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 7);
}
if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
- DUMPREG(DISPC_OVL_BA0_UV(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_BA1_UV(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_FIR2(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_ACCU2_0(OMAP_DSS_VIDEO2));
- DUMPREG(DISPC_OVL_ACCU2_1(OMAP_DSS_VIDEO2));
-
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 0));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 1));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 2));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 3));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 4));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 5));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 6));
- DUMPREG(DISPC_OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, 7));
-
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 0));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 1));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 2));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 3));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 4));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 5));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 6));
- DUMPREG(DISPC_OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, 7));
-
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 0));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 1));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 2));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 3));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 4));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 5));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 6));
- DUMPREG(DISPC_OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, 7));
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 0);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 1);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 2);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 3);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 4);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 5);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 6);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 7);
+
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 0);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 1);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 2);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 3);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 4);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 5);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 6);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 7);
+
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 0);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 1);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 2);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 3);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 4);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 5);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 6);
+ DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 7);
+ }
+
+ /* VIDEO2 coefficient registers */
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 0);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 1);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 2);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 3);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 4);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 5);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 6);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 7);
+
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 0);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 1);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 2);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 3);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 4);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 5);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 6);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 7);
+
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 0);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 1);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 2);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 3);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 4);
+ if (dss_has_feature(FEAT_FIR_COEF_V)) {
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 0);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 1);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 2);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 3);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 4);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 5);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 6);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 7);
}
- if (dss_has_feature(FEAT_ATTR2))
- DUMPREG(DISPC_OVL_ATTRIBUTES2(OMAP_DSS_VIDEO2));
- if (dss_has_feature(FEAT_PRELOAD)) {
- DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_VIDEO1));
- DUMPREG(DISPC_OVL_PRELOAD(OMAP_DSS_VIDEO2));
+ if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 0);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 1);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 2);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 3);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 4);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 5);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 6);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 7);
+
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 0);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 1);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 2);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 3);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 4);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 5);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 6);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 7);
+
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 0);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 1);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 2);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 3);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 4);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 5);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 6);
+ DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 7);
}
dispc_runtime_put();
+
+#undef DISPC_REG
#undef DUMPREG
}
--
1.7.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 2/5] OMAP: DSS2: DISPC: Shorten dispc_dump_regs()
2011-08-05 13:35 [PATCH v2 0/5] OMAP: DSS2: Miscellaneous DISPC Patches Archit Taneja
2011-08-05 13:36 ` [PATCH v2 1/5] OMAP: DSS2: DISPC: Prepare dispc_dump_regs() for shortening Archit Taneja
@ 2011-08-05 13:36 ` Archit Taneja
2011-08-05 13:36 ` [PATCH v2 3/5] OMAP: DSS2: DISPC: dispc_save_context() and dispc_restore_context() cleanup Archit Taneja
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Archit Taneja @ 2011-08-05 13:36 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, Archit Taneja
Iterate over manager and overlay id's to shorten dispc_dump_regs().
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/dispc.c | 326 ++++++++++++---------------------------
1 files changed, 98 insertions(+), 228 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index cdb53aa..bdd24a2 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -2707,6 +2707,19 @@ void dispc_dump_irqs(struct seq_file *s)
void dispc_dump_regs(struct seq_file *s)
{
+ int i, j;
+ const char *mgr_names[] = {
+ [OMAP_DSS_CHANNEL_LCD] = "LCD",
+ [OMAP_DSS_CHANNEL_DIGIT] = "TV",
+ [OMAP_DSS_CHANNEL_LCD2] = "LCD2",
+ };
+ const char *ovl_names[] = {
+ [OMAP_DSS_GFX] = "GFX",
+ [OMAP_DSS_VIDEO1] = "VID1",
+ [OMAP_DSS_VIDEO2] = "VID2",
+ };
+ const char **p_names;
+
#define DUMPREG(r) seq_printf(s, "%-50s %08x\n", #r, dispc_read_reg(r))
if (dispc_runtime_get())
@@ -2733,258 +2746,115 @@ void dispc_dump_regs(struct seq_file *s)
#undef DUMPREG
#define DISPC_REG(i, name) name(i)
-#define DUMPREG(i, r) seq_printf(s, "%s(%s)%*s %08x\n", #r, #i, \
- 48 - strlen(#r) - strlen(#i), " ", \
+#define DUMPREG(i, r) seq_printf(s, "%s(%s)%*s %08x\n", #r, p_names[i], \
+ 48 - strlen(#r) - strlen(p_names[i]), " ", \
dispc_read_reg(DISPC_REG(i, r)))
- /* LCD registers */
- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DEFAULT_COLOR);
- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TRANS_COLOR);
- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TIMING_H);
- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_TIMING_V);
- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_POL_FREQ);
- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DIVISORo);
- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_SIZE_MGR);
+ p_names = mgr_names;
- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE1);
- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE2);
- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_DATA_CYCLE3);
+ /* DISPC channel specific registers */
+ for (i = 0; i < dss_feat_get_num_mgrs(); i++) {
+ DUMPREG(i, DISPC_DEFAULT_COLOR);
+ DUMPREG(i, DISPC_TRANS_COLOR);
+ DUMPREG(i, DISPC_SIZE_MGR);
- if (dss_has_feature(FEAT_CPR)) {
- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_R);
- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_G);
- DUMPREG(OMAP_DSS_CHANNEL_LCD, DISPC_CPR_COEF_B);
- }
+ if (i == OMAP_DSS_CHANNEL_DIGIT)
+ continue;
- /* DIGIT registers */
- DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_DEFAULT_COLOR);
- DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_TRANS_COLOR);
- DUMPREG(OMAP_DSS_CHANNEL_DIGIT, DISPC_SIZE_MGR);
+ DUMPREG(i, DISPC_DEFAULT_COLOR);
+ DUMPREG(i, DISPC_TRANS_COLOR);
+ DUMPREG(i, DISPC_TIMING_H);
+ DUMPREG(i, DISPC_TIMING_V);
+ DUMPREG(i, DISPC_POL_FREQ);
+ DUMPREG(i, DISPC_DIVISORo);
+ DUMPREG(i, DISPC_SIZE_MGR);
- /* LCD2 registers */
- if (dss_has_feature(FEAT_MGR_LCD2)) {
- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DEFAULT_COLOR);
- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TRANS_COLOR);
- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TIMING_H);
- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_TIMING_V);
- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_POL_FREQ);
- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DIVISORo);
- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_SIZE_MGR);
-
- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE1);
- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE2);
- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_DATA_CYCLE3);
+ DUMPREG(i, DISPC_DATA_CYCLE1);
+ DUMPREG(i, DISPC_DATA_CYCLE2);
+ DUMPREG(i, DISPC_DATA_CYCLE3);
if (dss_has_feature(FEAT_CPR)) {
- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_R);
- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_G);
- DUMPREG(OMAP_DSS_CHANNEL_LCD2, DISPC_CPR_COEF_B);
+ DUMPREG(i, DISPC_CPR_COEF_R);
+ DUMPREG(i, DISPC_CPR_COEF_G);
+ DUMPREG(i, DISPC_CPR_COEF_B);
}
}
- /* GFX registers */
- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_BA0);
- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_BA1);
- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_POSITION);
- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_SIZE);
- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_ATTRIBUTES);
- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_FIFO_THRESHOLD);
- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_FIFO_SIZE_STATUS);
- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_ROW_INC);
- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_PIXEL_INC);
- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_WINDOW_SKIP);
- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_TABLE_BA);
- if (dss_has_feature(FEAT_PRELOAD))
- DUMPREG(OMAP_DSS_GFX, DISPC_OVL_PRELOAD);
-
- /* VIDEO1 registers */
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA0);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA1);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_POSITION);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_SIZE);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ATTRIBUTES);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIFO_THRESHOLD);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIFO_SIZE_STATUS);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ROW_INC);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PIXEL_INC);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PICTURE_SIZE);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU0);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU1);
- if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA0_UV);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_BA1_UV);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR2);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU2_0);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ACCU2_1);
- }
- if (dss_has_feature(FEAT_ATTR2))
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_ATTRIBUTES2);
- if (dss_has_feature(FEAT_PRELOAD))
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_PRELOAD);
-
- /* VIDEO2 registers */
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA0);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA1);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_POSITION);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_SIZE);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ATTRIBUTES);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIFO_THRESHOLD);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIFO_SIZE_STATUS);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ROW_INC);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PIXEL_INC);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PICTURE_SIZE);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU0);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU1);
- if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA0_UV);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_BA1_UV);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR2);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU2_0);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ACCU2_1);
+ p_names = ovl_names;
+
+ for (i = 0; i < dss_feat_get_num_ovls(); i++) {
+ DUMPREG(i, DISPC_OVL_BA0);
+ DUMPREG(i, DISPC_OVL_BA1);
+ DUMPREG(i, DISPC_OVL_POSITION);
+ DUMPREG(i, DISPC_OVL_SIZE);
+ DUMPREG(i, DISPC_OVL_ATTRIBUTES);
+ DUMPREG(i, DISPC_OVL_FIFO_THRESHOLD);
+ DUMPREG(i, DISPC_OVL_FIFO_SIZE_STATUS);
+ DUMPREG(i, DISPC_OVL_ROW_INC);
+ DUMPREG(i, DISPC_OVL_PIXEL_INC);
+ if (dss_has_feature(FEAT_PRELOAD))
+ DUMPREG(i, DISPC_OVL_PRELOAD);
+
+ if (i == OMAP_DSS_GFX) {
+ DUMPREG(i, DISPC_OVL_WINDOW_SKIP);
+ DUMPREG(i, DISPC_OVL_TABLE_BA);
+ continue;
+ }
+
+ DUMPREG(i, DISPC_OVL_FIR);
+ DUMPREG(i, DISPC_OVL_PICTURE_SIZE);
+ DUMPREG(i, DISPC_OVL_ACCU0);
+ DUMPREG(i, DISPC_OVL_ACCU1);
+ if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
+ DUMPREG(i, DISPC_OVL_BA0_UV);
+ DUMPREG(i, DISPC_OVL_BA1_UV);
+ DUMPREG(i, DISPC_OVL_FIR2);
+ DUMPREG(i, DISPC_OVL_ACCU2_0);
+ DUMPREG(i, DISPC_OVL_ACCU2_1);
+ }
+ if (dss_has_feature(FEAT_ATTR2))
+ DUMPREG(i, DISPC_OVL_ATTRIBUTES2);
+ if (dss_has_feature(FEAT_PRELOAD))
+ DUMPREG(i, DISPC_OVL_PRELOAD);
}
- if (dss_has_feature(FEAT_ATTR2))
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_ATTRIBUTES2);
- if (dss_has_feature(FEAT_PRELOAD))
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_PRELOAD);
#undef DISPC_REG
#undef DUMPREG
#define DISPC_REG(plane, name, i) name(plane, i)
#define DUMPREG(plane, name, i) \
- seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, #plane, \
- 46 - strlen(#name) - strlen(#plane), " ", \
+ seq_printf(s, "%s_%d(%s)%*s %08x\n", #name, i, p_names[plane], \
+ 46 - strlen(#name) - strlen(p_names[plane]), " ", \
dispc_read_reg(DISPC_REG(plane, name, i)))
- /* VIDEO1 coefficient registers */
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 0);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 1);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 2);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 3);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 4);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 5);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 6);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H, 7);
-
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 0);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 1);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 2);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 3);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 4);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 5);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 6);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV, 7);
-
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 0);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 1);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 2);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 3);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_CONV_COEF, 4);
+ /* Video pipeline coefficient registers */
- if (dss_has_feature(FEAT_FIR_COEF_V)) {
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 0);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 1);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 2);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 3);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 4);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 5);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 6);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V, 7);
- }
+ /* start from OMAP_DSS_VIDEO1 */
+ for (i = 1; i < dss_feat_get_num_ovls(); i++) {
+ for (j = 0; j < 8; j++)
+ DUMPREG(i, DISPC_OVL_FIR_COEF_H, j);
- if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 0);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 1);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 2);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 3);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 4);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 5);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 6);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_H2, 7);
-
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 0);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 1);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 2);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 3);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 4);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 5);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 6);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_HV2, 7);
-
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 0);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 1);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 2);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 3);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 4);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 5);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 6);
- DUMPREG(OMAP_DSS_VIDEO1, DISPC_OVL_FIR_COEF_V2, 7);
- }
-
- /* VIDEO2 coefficient registers */
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 0);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 1);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 2);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 3);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 4);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 5);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 6);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H, 7);
-
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 0);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 1);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 2);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 3);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 4);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 5);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 6);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV, 7);
-
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 0);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 1);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 2);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 3);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_CONV_COEF, 4);
- if (dss_has_feature(FEAT_FIR_COEF_V)) {
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 0);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 1);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 2);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 3);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 4);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 5);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 6);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V, 7);
- }
+ for (j = 0; j < 8; j++)
+ DUMPREG(i, DISPC_OVL_FIR_COEF_HV, j);
- if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 0);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 1);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 2);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 3);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 4);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 5);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 6);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_H2, 7);
-
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 0);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 1);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 2);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 3);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 4);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 5);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 6);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_HV2, 7);
-
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 0);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 1);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 2);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 3);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 4);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 5);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 6);
- DUMPREG(OMAP_DSS_VIDEO2, DISPC_OVL_FIR_COEF_V2, 7);
+ for (j = 0; j < 5; j++)
+ DUMPREG(i, DISPC_OVL_CONV_COEF, j);
+
+ if (dss_has_feature(FEAT_FIR_COEF_V)) {
+ for (j = 0; j < 8; j++)
+ DUMPREG(i, DISPC_OVL_FIR_COEF_V, j);
+ }
+
+ if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
+ for (j = 0; j < 8; j++)
+ DUMPREG(i, DISPC_OVL_FIR_COEF_H2, j);
+
+ for (j = 0; j < 8; j++)
+ DUMPREG(i, DISPC_OVL_FIR_COEF_HV2, j);
+
+ for (j = 0; j < 8; j++)
+ DUMPREG(i, DISPC_OVL_FIR_COEF_V2, j);
+ }
}
dispc_runtime_put();
--
1.7.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 3/5] OMAP: DSS2: DISPC: dispc_save_context() and dispc_restore_context() cleanup
2011-08-05 13:35 [PATCH v2 0/5] OMAP: DSS2: Miscellaneous DISPC Patches Archit Taneja
2011-08-05 13:36 ` [PATCH v2 1/5] OMAP: DSS2: DISPC: Prepare dispc_dump_regs() for shortening Archit Taneja
2011-08-05 13:36 ` [PATCH v2 2/5] OMAP: DSS2: DISPC: Shorten dispc_dump_regs() Archit Taneja
@ 2011-08-05 13:36 ` Archit Taneja
2011-08-05 13:36 ` [PATCH v2 4/5] OMAP: DSS2: DISPC: Shorten _dispc_set_color_conv_coef() Archit Taneja
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Archit Taneja @ 2011-08-05 13:36 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, Archit Taneja
Iterate over manager and overlay id's to shorten dispc_save_context() and
dispc_restore_context().
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/dispc.c | 408 ++++++++++++---------------------------
1 files changed, 128 insertions(+), 280 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index bdd24a2..2fd16ac 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -171,172 +171,97 @@ static int dispc_get_ctx_loss_count(void)
static void dispc_save_context(void)
{
- int i;
+ int i, j;
DSSDBG("dispc_save_context\n");
SR(IRQENABLE);
SR(CONTROL);
SR(CONFIG);
- SR(DEFAULT_COLOR(OMAP_DSS_CHANNEL_LCD));
- SR(DEFAULT_COLOR(OMAP_DSS_CHANNEL_DIGIT));
- SR(TRANS_COLOR(OMAP_DSS_CHANNEL_LCD));
- SR(TRANS_COLOR(OMAP_DSS_CHANNEL_DIGIT));
SR(LINE_NUMBER);
- SR(TIMING_H(OMAP_DSS_CHANNEL_LCD));
- SR(TIMING_V(OMAP_DSS_CHANNEL_LCD));
- SR(POL_FREQ(OMAP_DSS_CHANNEL_LCD));
- SR(DIVISORo(OMAP_DSS_CHANNEL_LCD));
if (dss_has_feature(FEAT_GLOBAL_ALPHA))
SR(GLOBAL_ALPHA);
- SR(SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT));
- SR(SIZE_MGR(OMAP_DSS_CHANNEL_LCD));
if (dss_has_feature(FEAT_MGR_LCD2)) {
SR(CONTROL2);
- SR(DEFAULT_COLOR(OMAP_DSS_CHANNEL_LCD2));
- SR(TRANS_COLOR(OMAP_DSS_CHANNEL_LCD2));
- SR(SIZE_MGR(OMAP_DSS_CHANNEL_LCD2));
- SR(TIMING_H(OMAP_DSS_CHANNEL_LCD2));
- SR(TIMING_V(OMAP_DSS_CHANNEL_LCD2));
- SR(POL_FREQ(OMAP_DSS_CHANNEL_LCD2));
- SR(DIVISORo(OMAP_DSS_CHANNEL_LCD2));
SR(CONFIG2);
}
- SR(OVL_BA0(OMAP_DSS_GFX));
- SR(OVL_BA1(OMAP_DSS_GFX));
- SR(OVL_POSITION(OMAP_DSS_GFX));
- SR(OVL_SIZE(OMAP_DSS_GFX));
- SR(OVL_ATTRIBUTES(OMAP_DSS_GFX));
- SR(OVL_FIFO_THRESHOLD(OMAP_DSS_GFX));
- SR(OVL_ROW_INC(OMAP_DSS_GFX));
- SR(OVL_PIXEL_INC(OMAP_DSS_GFX));
- SR(OVL_WINDOW_SKIP(OMAP_DSS_GFX));
- SR(OVL_TABLE_BA(OMAP_DSS_GFX));
+ for (i = 0; i < dss_feat_get_num_mgrs(); i++) {
+ SR(DEFAULT_COLOR(i));
+ SR(TRANS_COLOR(i));
+ SR(SIZE_MGR(i));
+ if (i == OMAP_DSS_CHANNEL_DIGIT)
+ continue;
+ SR(TIMING_H(i));
+ SR(TIMING_V(i));
+ SR(POL_FREQ(i));
+ SR(DIVISORo(i));
- SR(DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD));
- SR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD));
- SR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD));
+ SR(DATA_CYCLE1(i));
+ SR(DATA_CYCLE2(i));
+ SR(DATA_CYCLE3(i));
- if (dss_has_feature(FEAT_CPR)) {
- SR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD));
- SR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD));
- SR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD));
- }
- if (dss_has_feature(FEAT_MGR_LCD2)) {
if (dss_has_feature(FEAT_CPR)) {
- SR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD2));
- SR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD2));
- SR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD2));
+ SR(CPR_COEF_R(i));
+ SR(CPR_COEF_G(i));
+ SR(CPR_COEF_B(i));
}
-
- SR(DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD2));
- SR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD2));
- SR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD2));
}
- if (dss_has_feature(FEAT_PRELOAD))
- SR(OVL_PRELOAD(OMAP_DSS_GFX));
-
- /* VID1 */
- SR(OVL_BA0(OMAP_DSS_VIDEO1));
- SR(OVL_BA1(OMAP_DSS_VIDEO1));
- SR(OVL_POSITION(OMAP_DSS_VIDEO1));
- SR(OVL_SIZE(OMAP_DSS_VIDEO1));
- SR(OVL_ATTRIBUTES(OMAP_DSS_VIDEO1));
- SR(OVL_FIFO_THRESHOLD(OMAP_DSS_VIDEO1));
- SR(OVL_ROW_INC(OMAP_DSS_VIDEO1));
- SR(OVL_PIXEL_INC(OMAP_DSS_VIDEO1));
- SR(OVL_FIR(OMAP_DSS_VIDEO1));
- SR(OVL_PICTURE_SIZE(OMAP_DSS_VIDEO1));
- SR(OVL_ACCU0(OMAP_DSS_VIDEO1));
- SR(OVL_ACCU1(OMAP_DSS_VIDEO1));
-
- for (i = 0; i < 8; i++)
- SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, i));
-
- for (i = 0; i < 8; i++)
- SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, i));
-
- for (i = 0; i < 5; i++)
- SR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, i));
-
- if (dss_has_feature(FEAT_FIR_COEF_V)) {
- for (i = 0; i < 8; i++)
- SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, i));
- }
-
- if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
- SR(OVL_BA0_UV(OMAP_DSS_VIDEO1));
- SR(OVL_BA1_UV(OMAP_DSS_VIDEO1));
- SR(OVL_FIR2(OMAP_DSS_VIDEO1));
- SR(OVL_ACCU2_0(OMAP_DSS_VIDEO1));
- SR(OVL_ACCU2_1(OMAP_DSS_VIDEO1));
-
- for (i = 0; i < 8; i++)
- SR(OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, i));
-
- for (i = 0; i < 8; i++)
- SR(OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, i));
-
- for (i = 0; i < 8; i++)
- SR(OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, i));
- }
- if (dss_has_feature(FEAT_ATTR2))
- SR(OVL_ATTRIBUTES2(OMAP_DSS_VIDEO1));
-
- if (dss_has_feature(FEAT_PRELOAD))
- SR(OVL_PRELOAD(OMAP_DSS_VIDEO1));
-
- /* VID2 */
- SR(OVL_BA0(OMAP_DSS_VIDEO2));
- SR(OVL_BA1(OMAP_DSS_VIDEO2));
- SR(OVL_POSITION(OMAP_DSS_VIDEO2));
- SR(OVL_SIZE(OMAP_DSS_VIDEO2));
- SR(OVL_ATTRIBUTES(OMAP_DSS_VIDEO2));
- SR(OVL_FIFO_THRESHOLD(OMAP_DSS_VIDEO2));
- SR(OVL_ROW_INC(OMAP_DSS_VIDEO2));
- SR(OVL_PIXEL_INC(OMAP_DSS_VIDEO2));
- SR(OVL_FIR(OMAP_DSS_VIDEO2));
- SR(OVL_PICTURE_SIZE(OMAP_DSS_VIDEO2));
- SR(OVL_ACCU0(OMAP_DSS_VIDEO2));
- SR(OVL_ACCU1(OMAP_DSS_VIDEO2));
+ for (i = 0; i < dss_feat_get_num_ovls(); i++) {
+ SR(OVL_BA0(i));
+ SR(OVL_BA1(i));
+ SR(OVL_POSITION(i));
+ SR(OVL_SIZE(i));
+ SR(OVL_ATTRIBUTES(i));
+ SR(OVL_FIFO_THRESHOLD(i));
+ SR(OVL_ROW_INC(i));
+ SR(OVL_PIXEL_INC(i));
+ if (dss_has_feature(FEAT_PRELOAD))
+ SR(OVL_PRELOAD(i));
+ if (i == OMAP_DSS_GFX) {
+ SR(OVL_WINDOW_SKIP(i));
+ SR(OVL_TABLE_BA(i));
+ continue;
+ }
+ SR(OVL_FIR(i));
+ SR(OVL_PICTURE_SIZE(i));
+ SR(OVL_ACCU0(i));
+ SR(OVL_ACCU1(i));
- for (i = 0; i < 8; i++)
- SR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, i));
+ for (j = 0; j < 8; j++)
+ SR(OVL_FIR_COEF_H(i, j));
- for (i = 0; i < 8; i++)
- SR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, i));
+ for (j = 0; j < 8; j++)
+ SR(OVL_FIR_COEF_HV(i, j));
- for (i = 0; i < 5; i++)
- SR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, i));
+ for (j = 0; j < 5; j++)
+ SR(OVL_CONV_COEF(i, j));
- if (dss_has_feature(FEAT_FIR_COEF_V)) {
- for (i = 0; i < 8; i++)
- SR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, i));
- }
+ if (dss_has_feature(FEAT_FIR_COEF_V)) {
+ for (j = 0; j < 8; j++)
+ SR(OVL_FIR_COEF_V(i, j));
+ }
- if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
- SR(OVL_BA0_UV(OMAP_DSS_VIDEO2));
- SR(OVL_BA1_UV(OMAP_DSS_VIDEO2));
- SR(OVL_FIR2(OMAP_DSS_VIDEO2));
- SR(OVL_ACCU2_0(OMAP_DSS_VIDEO2));
- SR(OVL_ACCU2_1(OMAP_DSS_VIDEO2));
+ if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
+ SR(OVL_BA0_UV(i));
+ SR(OVL_BA1_UV(i));
+ SR(OVL_FIR2(i));
+ SR(OVL_ACCU2_0(i));
+ SR(OVL_ACCU2_1(i));
- for (i = 0; i < 8; i++)
- SR(OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, i));
+ for (j = 0; j < 8; j++)
+ SR(OVL_FIR_COEF_H2(i, j));
- for (i = 0; i < 8; i++)
- SR(OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, i));
+ for (j = 0; j < 8; j++)
+ SR(OVL_FIR_COEF_HV2(i, j));
- for (i = 0; i < 8; i++)
- SR(OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, i));
+ for (j = 0; j < 8; j++)
+ SR(OVL_FIR_COEF_V2(i, j));
+ }
+ if (dss_has_feature(FEAT_ATTR2))
+ SR(OVL_ATTRIBUTES2(i));
}
- if (dss_has_feature(FEAT_ATTR2))
- SR(OVL_ATTRIBUTES2(OMAP_DSS_VIDEO2));
-
- if (dss_has_feature(FEAT_PRELOAD))
- SR(OVL_PRELOAD(OMAP_DSS_VIDEO2));
if (dss_has_feature(FEAT_CORE_CLK_DIV))
SR(DIVISOR);
@@ -349,7 +274,7 @@ static void dispc_save_context(void)
static void dispc_restore_context(void)
{
- int i, ctx;
+ int i, j, ctx;
DSSDBG("dispc_restore_context\n");
@@ -367,165 +292,88 @@ static void dispc_restore_context(void)
/*RR(IRQENABLE);*/
/*RR(CONTROL);*/
RR(CONFIG);
- RR(DEFAULT_COLOR(OMAP_DSS_CHANNEL_LCD));
- RR(DEFAULT_COLOR(OMAP_DSS_CHANNEL_DIGIT));
- RR(TRANS_COLOR(OMAP_DSS_CHANNEL_LCD));
- RR(TRANS_COLOR(OMAP_DSS_CHANNEL_DIGIT));
RR(LINE_NUMBER);
- RR(TIMING_H(OMAP_DSS_CHANNEL_LCD));
- RR(TIMING_V(OMAP_DSS_CHANNEL_LCD));
- RR(POL_FREQ(OMAP_DSS_CHANNEL_LCD));
- RR(DIVISORo(OMAP_DSS_CHANNEL_LCD));
if (dss_has_feature(FEAT_GLOBAL_ALPHA))
RR(GLOBAL_ALPHA);
- RR(SIZE_MGR(OMAP_DSS_CHANNEL_DIGIT));
- RR(SIZE_MGR(OMAP_DSS_CHANNEL_LCD));
- if (dss_has_feature(FEAT_MGR_LCD2)) {
- RR(DEFAULT_COLOR(OMAP_DSS_CHANNEL_LCD2));
- RR(TRANS_COLOR(OMAP_DSS_CHANNEL_LCD2));
- RR(SIZE_MGR(OMAP_DSS_CHANNEL_LCD2));
- RR(TIMING_H(OMAP_DSS_CHANNEL_LCD2));
- RR(TIMING_V(OMAP_DSS_CHANNEL_LCD2));
- RR(POL_FREQ(OMAP_DSS_CHANNEL_LCD2));
- RR(DIVISORo(OMAP_DSS_CHANNEL_LCD2));
+ if (dss_has_feature(FEAT_MGR_LCD2))
RR(CONFIG2);
- }
-
- RR(OVL_BA0(OMAP_DSS_GFX));
- RR(OVL_BA1(OMAP_DSS_GFX));
- RR(OVL_POSITION(OMAP_DSS_GFX));
- RR(OVL_SIZE(OMAP_DSS_GFX));
- RR(OVL_ATTRIBUTES(OMAP_DSS_GFX));
- RR(OVL_FIFO_THRESHOLD(OMAP_DSS_GFX));
- RR(OVL_ROW_INC(OMAP_DSS_GFX));
- RR(OVL_PIXEL_INC(OMAP_DSS_GFX));
- RR(OVL_WINDOW_SKIP(OMAP_DSS_GFX));
- RR(OVL_TABLE_BA(OMAP_DSS_GFX));
+ for (i = 0; i < dss_feat_get_num_mgrs(); i++) {
+ RR(DEFAULT_COLOR(i));
+ RR(TRANS_COLOR(i));
+ RR(SIZE_MGR(i));
+ if (i == OMAP_DSS_CHANNEL_DIGIT)
+ continue;
+ RR(TIMING_H(i));
+ RR(TIMING_V(i));
+ RR(POL_FREQ(i));
+ RR(DIVISORo(i));
- RR(DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD));
- RR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD));
- RR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD));
-
- if (dss_has_feature(FEAT_CPR)) {
- RR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD));
- RR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD));
- RR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD));
- }
- if (dss_has_feature(FEAT_MGR_LCD2)) {
- RR(DATA_CYCLE1(OMAP_DSS_CHANNEL_LCD2));
- RR(DATA_CYCLE2(OMAP_DSS_CHANNEL_LCD2));
- RR(DATA_CYCLE3(OMAP_DSS_CHANNEL_LCD2));
+ RR(DATA_CYCLE1(i));
+ RR(DATA_CYCLE2(i));
+ RR(DATA_CYCLE3(i));
if (dss_has_feature(FEAT_CPR)) {
- RR(CPR_COEF_B(OMAP_DSS_CHANNEL_LCD2));
- RR(CPR_COEF_G(OMAP_DSS_CHANNEL_LCD2));
- RR(CPR_COEF_R(OMAP_DSS_CHANNEL_LCD2));
+ RR(CPR_COEF_R(i));
+ RR(CPR_COEF_G(i));
+ RR(CPR_COEF_B(i));
}
}
- if (dss_has_feature(FEAT_PRELOAD))
- RR(OVL_PRELOAD(OMAP_DSS_GFX));
-
- /* VID1 */
- RR(OVL_BA0(OMAP_DSS_VIDEO1));
- RR(OVL_BA1(OMAP_DSS_VIDEO1));
- RR(OVL_POSITION(OMAP_DSS_VIDEO1));
- RR(OVL_SIZE(OMAP_DSS_VIDEO1));
- RR(OVL_ATTRIBUTES(OMAP_DSS_VIDEO1));
- RR(OVL_FIFO_THRESHOLD(OMAP_DSS_VIDEO1));
- RR(OVL_ROW_INC(OMAP_DSS_VIDEO1));
- RR(OVL_PIXEL_INC(OMAP_DSS_VIDEO1));
- RR(OVL_FIR(OMAP_DSS_VIDEO1));
- RR(OVL_PICTURE_SIZE(OMAP_DSS_VIDEO1));
- RR(OVL_ACCU0(OMAP_DSS_VIDEO1));
- RR(OVL_ACCU1(OMAP_DSS_VIDEO1));
-
- for (i = 0; i < 8; i++)
- RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO1, i));
-
- for (i = 0; i < 8; i++)
- RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO1, i));
-
- for (i = 0; i < 5; i++)
- RR(OVL_CONV_COEF(OMAP_DSS_VIDEO1, i));
-
- if (dss_has_feature(FEAT_FIR_COEF_V)) {
- for (i = 0; i < 8; i++)
- RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO1, i));
- }
-
- if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
- RR(OVL_BA0_UV(OMAP_DSS_VIDEO1));
- RR(OVL_BA1_UV(OMAP_DSS_VIDEO1));
- RR(OVL_FIR2(OMAP_DSS_VIDEO1));
- RR(OVL_ACCU2_0(OMAP_DSS_VIDEO1));
- RR(OVL_ACCU2_1(OMAP_DSS_VIDEO1));
-
- for (i = 0; i < 8; i++)
- RR(OVL_FIR_COEF_H2(OMAP_DSS_VIDEO1, i));
-
- for (i = 0; i < 8; i++)
- RR(OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO1, i));
-
- for (i = 0; i < 8; i++)
- RR(OVL_FIR_COEF_V2(OMAP_DSS_VIDEO1, i));
- }
- if (dss_has_feature(FEAT_ATTR2))
- RR(OVL_ATTRIBUTES2(OMAP_DSS_VIDEO1));
-
- if (dss_has_feature(FEAT_PRELOAD))
- RR(OVL_PRELOAD(OMAP_DSS_VIDEO1));
-
- /* VID2 */
- RR(OVL_BA0(OMAP_DSS_VIDEO2));
- RR(OVL_BA1(OMAP_DSS_VIDEO2));
- RR(OVL_POSITION(OMAP_DSS_VIDEO2));
- RR(OVL_SIZE(OMAP_DSS_VIDEO2));
- RR(OVL_ATTRIBUTES(OMAP_DSS_VIDEO2));
- RR(OVL_FIFO_THRESHOLD(OMAP_DSS_VIDEO2));
- RR(OVL_ROW_INC(OMAP_DSS_VIDEO2));
- RR(OVL_PIXEL_INC(OMAP_DSS_VIDEO2));
- RR(OVL_FIR(OMAP_DSS_VIDEO2));
- RR(OVL_PICTURE_SIZE(OMAP_DSS_VIDEO2));
- RR(OVL_ACCU0(OMAP_DSS_VIDEO2));
- RR(OVL_ACCU1(OMAP_DSS_VIDEO2));
+ for (i = 0; i < dss_feat_get_num_ovls(); i++) {
+ RR(OVL_BA0(i));
+ RR(OVL_BA1(i));
+ RR(OVL_POSITION(i));
+ RR(OVL_SIZE(i));
+ RR(OVL_ATTRIBUTES(i));
+ RR(OVL_FIFO_THRESHOLD(i));
+ RR(OVL_ROW_INC(i));
+ RR(OVL_PIXEL_INC(i));
+ if (dss_has_feature(FEAT_PRELOAD))
+ RR(OVL_PRELOAD(i));
+ if (i == OMAP_DSS_GFX) {
+ RR(OVL_WINDOW_SKIP(i));
+ RR(OVL_TABLE_BA(i));
+ continue;
+ }
+ RR(OVL_FIR(i));
+ RR(OVL_PICTURE_SIZE(i));
+ RR(OVL_ACCU0(i));
+ RR(OVL_ACCU1(i));
- for (i = 0; i < 8; i++)
- RR(OVL_FIR_COEF_H(OMAP_DSS_VIDEO2, i));
+ for (j = 0; j < 8; j++)
+ RR(OVL_FIR_COEF_H(i, j));
- for (i = 0; i < 8; i++)
- RR(OVL_FIR_COEF_HV(OMAP_DSS_VIDEO2, i));
+ for (j = 0; j < 8; j++)
+ RR(OVL_FIR_COEF_HV(i, j));
- for (i = 0; i < 5; i++)
- RR(OVL_CONV_COEF(OMAP_DSS_VIDEO2, i));
+ for (j = 0; j < 5; j++)
+ RR(OVL_CONV_COEF(i, j));
- if (dss_has_feature(FEAT_FIR_COEF_V)) {
- for (i = 0; i < 8; i++)
- RR(OVL_FIR_COEF_V(OMAP_DSS_VIDEO2, i));
- }
+ if (dss_has_feature(FEAT_FIR_COEF_V)) {
+ for (j = 0; j < 8; j++)
+ RR(OVL_FIR_COEF_V(i, j));
+ }
- if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
- RR(OVL_BA0_UV(OMAP_DSS_VIDEO2));
- RR(OVL_BA1_UV(OMAP_DSS_VIDEO2));
- RR(OVL_FIR2(OMAP_DSS_VIDEO2));
- RR(OVL_ACCU2_0(OMAP_DSS_VIDEO2));
- RR(OVL_ACCU2_1(OMAP_DSS_VIDEO2));
+ if (dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) {
+ RR(OVL_BA0_UV(i));
+ RR(OVL_BA1_UV(i));
+ RR(OVL_FIR2(i));
+ RR(OVL_ACCU2_0(i));
+ RR(OVL_ACCU2_1(i));
- for (i = 0; i < 8; i++)
- RR(OVL_FIR_COEF_H2(OMAP_DSS_VIDEO2, i));
+ for (j = 0; j < 8; j++)
+ RR(OVL_FIR_COEF_H2(i, j));
- for (i = 0; i < 8; i++)
- RR(OVL_FIR_COEF_HV2(OMAP_DSS_VIDEO2, i));
+ for (j = 0; j < 8; j++)
+ RR(OVL_FIR_COEF_HV2(i, j));
- for (i = 0; i < 8; i++)
- RR(OVL_FIR_COEF_V2(OMAP_DSS_VIDEO2, i));
+ for (j = 0; j < 8; j++)
+ RR(OVL_FIR_COEF_V2(i, j));
+ }
+ if (dss_has_feature(FEAT_ATTR2))
+ RR(OVL_ATTRIBUTES2(i));
}
- if (dss_has_feature(FEAT_ATTR2))
- RR(OVL_ATTRIBUTES2(OMAP_DSS_VIDEO2));
-
- if (dss_has_feature(FEAT_PRELOAD))
- RR(OVL_PRELOAD(OMAP_DSS_VIDEO2));
if (dss_has_feature(FEAT_CORE_CLK_DIV))
RR(DIVISOR);
--
1.7.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 4/5] OMAP: DSS2: DISPC: Shorten _dispc_set_color_conv_coef()
2011-08-05 13:35 [PATCH v2 0/5] OMAP: DSS2: Miscellaneous DISPC Patches Archit Taneja
` (2 preceding siblings ...)
2011-08-05 13:36 ` [PATCH v2 3/5] OMAP: DSS2: DISPC: dispc_save_context() and dispc_restore_context() cleanup Archit Taneja
@ 2011-08-05 13:36 ` Archit Taneja
2011-08-05 13:36 ` [PATCH v2 5/5] OMAP: DSS2: Use a macro to declare size of the fifo_size array in dispc.c Archit Taneja
2011-08-05 13:46 ` [PATCH v2 0/5] OMAP: DSS2: Miscellaneous DISPC Patches Tomi Valkeinen
5 siblings, 0 replies; 7+ messages in thread
From: Archit Taneja @ 2011-08-05 13:36 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, Archit Taneja
Iterate over overlay id's to shorten _dispc_set_color_conv_coef()
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/dispc.c | 42 ++++++++++++++------------------------
1 files changed, 16 insertions(+), 26 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 2fd16ac..8cab996 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -641,6 +641,7 @@ static void _dispc_set_scale_coef(enum omap_plane plane, int hscaleup,
static void _dispc_setup_color_conv_coef(void)
{
+ int i;
const struct color_conv_coef {
int ry, rcr, rcb, gy, gcr, gcb, by, bcr, bcb;
int full_range;
@@ -654,34 +655,23 @@ static void _dispc_setup_color_conv_coef(void)
ct = &ctbl_bt601_5;
- dispc_write_reg(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 0),
- CVAL(ct->rcr, ct->ry));
- dispc_write_reg(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 1),
- CVAL(ct->gy, ct->rcb));
- dispc_write_reg(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 2),
- CVAL(ct->gcb, ct->gcr));
- dispc_write_reg(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 3),
- CVAL(ct->bcr, ct->by));
- dispc_write_reg(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO1, 4),
- CVAL(0, ct->bcb));
-
- dispc_write_reg(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 0),
- CVAL(ct->rcr, ct->ry));
- dispc_write_reg(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 1),
- CVAL(ct->gy, ct->rcb));
- dispc_write_reg(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 2),
- CVAL(ct->gcb, ct->gcr));
- dispc_write_reg(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 3),
- CVAL(ct->bcr, ct->by));
- dispc_write_reg(DISPC_OVL_CONV_COEF(OMAP_DSS_VIDEO2, 4),
- CVAL(0, ct->bcb));
+ for (i = 1; i < dss_feat_get_num_ovls(); i++) {
+ dispc_write_reg(DISPC_OVL_CONV_COEF(i, 0),
+ CVAL(ct->rcr, ct->ry));
+ dispc_write_reg(DISPC_OVL_CONV_COEF(i, 1),
+ CVAL(ct->gy, ct->rcb));
+ dispc_write_reg(DISPC_OVL_CONV_COEF(i, 2),
+ CVAL(ct->gcb, ct->gcr));
+ dispc_write_reg(DISPC_OVL_CONV_COEF(i, 3),
+ CVAL(ct->bcr, ct->by));
+ dispc_write_reg(DISPC_OVL_CONV_COEF(i, 4),
+ CVAL(0, ct->bcb));
-#undef CVAL
+ REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(i), ct->full_range,
+ 11, 11);
+ }
- REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(OMAP_DSS_VIDEO1),
- ct->full_range, 11, 11);
- REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(OMAP_DSS_VIDEO2),
- ct->full_range, 11, 11);
+#undef CVAL
}
--
1.7.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 5/5] OMAP: DSS2: Use a macro to declare size of the fifo_size array in dispc.c
2011-08-05 13:35 [PATCH v2 0/5] OMAP: DSS2: Miscellaneous DISPC Patches Archit Taneja
` (3 preceding siblings ...)
2011-08-05 13:36 ` [PATCH v2 4/5] OMAP: DSS2: DISPC: Shorten _dispc_set_color_conv_coef() Archit Taneja
@ 2011-08-05 13:36 ` Archit Taneja
2011-08-05 13:46 ` [PATCH v2 0/5] OMAP: DSS2: Miscellaneous DISPC Patches Tomi Valkeinen
5 siblings, 0 replies; 7+ messages in thread
From: Archit Taneja @ 2011-08-05 13:36 UTC (permalink / raw)
To: tomi.valkeinen; +Cc: linux-omap, Archit Taneja
The array size of fifo_size array in the global dispc struct is currently
hardcoded to 3. Replace this with the MAX_DSS_OVERLAYS macro in dss_features.h,
use dss_features function to get the number of overlays instead of the
ARRAY_SIZE macro in dispc_read_plane_fifo_sizes().
Signed-off-by: Archit Taneja <archit@ti.com>
---
drivers/video/omap2/dss/dispc.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 8cab996..d910373 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -106,7 +106,7 @@ static struct {
int irq;
struct clk *dss_clk;
- u32 fifo_size[3];
+ u32 fifo_size[MAX_DSS_OVERLAYS];
spinlock_t irq_lock;
u32 irq_error_mask;
@@ -1024,7 +1024,7 @@ static void dispc_read_plane_fifo_sizes(void)
dss_feat_get_reg_field(FEAT_REG_FIFOSIZE, &start, &end);
- for (plane = 0; plane < ARRAY_SIZE(dispc.fifo_size); ++plane) {
+ for (plane = 0; plane < dss_feat_get_num_ovls(); ++plane) {
size = REG_GET(DISPC_OVL_FIFO_SIZE_STATUS(plane), start, end);
size *= unit;
dispc.fifo_size[plane] = size;
--
1.7.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v2 0/5] OMAP: DSS2: Miscellaneous DISPC Patches
2011-08-05 13:35 [PATCH v2 0/5] OMAP: DSS2: Miscellaneous DISPC Patches Archit Taneja
` (4 preceding siblings ...)
2011-08-05 13:36 ` [PATCH v2 5/5] OMAP: DSS2: Use a macro to declare size of the fifo_size array in dispc.c Archit Taneja
@ 2011-08-05 13:46 ` Tomi Valkeinen
5 siblings, 0 replies; 7+ messages in thread
From: Tomi Valkeinen @ 2011-08-05 13:46 UTC (permalink / raw)
To: Archit Taneja; +Cc: linux-omap
On Fri, 2011-08-05 at 19:05 +0530, Archit Taneja wrote:
> Reduce the size of the large functions dispc_dump_regs(), dispc_save_context()
> and dispc_restore_context() and _dispc_setup_color_conv_coef().
>
> Make fifo_size array length in dispc.c generic.
>
> Applies over master branch of:
>
> git://gitorious.org/linux-omap-dss2/linux.git
>
> changes in v2:
> - Remove "OMAP4: DSS2: VIDEO3 pipeline support", replace it with a patch which
> makes fifo_size array length in dispc.c generic. VIDEO3 is removed because it
> has some functional dependencies with Zorder. So they should be posted together.
>
> Archit Taneja (5):
> OMAP: DSS2: DISPC: Prepare dispc_dump_regs() for shortening
> OMAP: DSS2: DISPC: Shorten dispc_dump_regs()
> OMAP: DSS2: DISPC: dispc_save_context() and dispc_restore_context()
> cleanup
> OMAP: DSS2: DISPC: Shorten _dispc_set_color_conv_coef()
> OMAP: DSS2: Use a macro to declare size of the fifo_size array in
> dispc.c
>
> drivers/video/omap2/dss/dispc.c | 788 +++++++++++++--------------------------
> 1 files changed, 265 insertions(+), 523 deletions(-)
Looks good, thanks.
Tomi
^ permalink raw reply [flat|nested] 7+ messages in thread