[PATCHv2 0/5] OMAP DSS HWMOD fixes

[PATCHv2 0/5] OMAP DSS HWMOD fixes

[Tomi Valkeinen]

Second try with the DSS HWMODs

This set fixes the DSS clocks in HWMOD data, and implements a new reset
mechanism for dss_core.

The new dss_reset function doesn't actually do a reset, it just enables all DSS
clocks and waits for the reset to complete. This should be better approach than
actually doing a reset, because:

OMAP4 - dss_core HW doesn't contain a SW reset bit so doing a reset is
impossible. But after power-on we need to enable all DSS clocks and wait for
the power-on reset to complete.

OMAP2/3 - dss_core does have a SW reset bit, but resetting dss_core also resets
all the other DSS modules. This means that the other modules could be left
uninitialized, as the hwmod code handles all modules independently, and in this
case initializes only dss_core's registers. Thus dss_core's reset shouldn't be
used, and we should only verify that the power-on reset has completed.

Tested on OMAP4 and OMAP3.

The first two HWMOD patches (for OMAP2/3) are not changed since v1.

 Tomi

Tomi Valkeinen (5):
  OMAP2xxx: HWMOD: fix DSS opt clocks
  OMAP3: HWMOD: fix DSS opt clocks
  OMAP4: HWMOD: fix DSS opt clocks
  OMAP2/3: HWMOD: Add SYSS_HAS_RESET_STATUS for dss
  OMAP: HWMOD: Unify DSS resets for all OMAPs

 arch/arm/mach-omap2/common-board-devices.h         |    4 ++
 arch/arm/mach-omap2/display.c                      |   35 ++++++++++++++++++++
 arch/arm/mach-omap2/omap_hwmod_2420_data.c         |   15 +++++++-
 arch/arm/mach-omap2/omap_hwmod_2430_data.c         |   15 +++++++-
 .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c |    5 ++-
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c         |   35 +++++++++++++++++--
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c         |   18 +++-------
 7 files changed, 106 insertions(+), 21 deletions(-)

-- 
1.7.4.1

[PATCHv2 1/5] OMAP2xxx: HWMOD: fix DSS opt clocks

[Tomi Valkeinen]

Set HWMOD_CONTROL_OPT_CLKS_IN_RESET for dss_core to allow DSS reset
properly.

Add missing ick opt-clock for rfbi. Rfbi uses the ick to calculate
timings.

Fix the venc iclk and fclk.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_2420_data.c |   15 +++++++++++++--
 arch/arm/mach-omap2/omap_hwmod_2430_data.c |   15 +++++++++++++--
 2 files changed, 26 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a015c69..09d9395 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -874,12 +874,17 @@ static struct omap_hwmod_ocp_if *omap2420_dss_slaves[] = {
 };
 
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
+	/*
+	 * The DSS HW needs all DSS clocks enabled during reset. The dss_core
+	 * driver does not use these clocks.
+	 */
 	{ .role = "tv_clk", .clk = "dss_54m_fck" },
 	{ .role = "sys_clk", .clk = "dss2_fck" },
 };
 
 static struct omap_hwmod omap2420_dss_core_hwmod = {
 	.name		= "dss_core",
+	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 	.class		= &omap2_dss_hwmod_class,
 	.main_clk	= "dss1_fck", /* instead of dss_fck */
 	.sdma_reqs	= omap2xxx_dss_sdma_chs,
@@ -962,6 +967,10 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = {
 	&omap2420_l4_core__dss_rfbi,
 };
 
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+	{ .role = "ick", .clk = "dss_ick" },
+};
+
 static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
 	.name		= "dss_rfbi",
 	.class		= &omap2_rfbi_hwmod_class,
@@ -973,6 +982,8 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
 			.module_offs = CORE_MOD,
 		},
 	},
+	.opt_clks	= dss_rfbi_opt_clks,
+	.opt_clks_cnt	= ARRAY_SIZE(dss_rfbi_opt_clks),
 	.slaves		= omap2420_dss_rfbi_slaves,
 	.slaves_cnt	= ARRAY_SIZE(omap2420_dss_rfbi_slaves),
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
@@ -983,7 +994,7 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
 static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = {
 	.master		= &omap2420_l4_core_hwmod,
 	.slave		= &omap2420_dss_venc_hwmod,
-	.clk		= "dss_54m_fck",
+	.clk		= "dss_ick",
 	.addr		= omap2_dss_venc_addrs,
 	.fw = {
 		.omap2 = {
@@ -1003,7 +1014,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = {
 static struct omap_hwmod omap2420_dss_venc_hwmod = {
 	.name		= "dss_venc",
 	.class		= &omap2_venc_hwmod_class,
-	.main_clk	= "dss1_fck",
+	.main_clk	= "dss_54m_fck",
 	.prcm		= {
 		.omap2 = {
 			.prcm_reg_id = 1,
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 16743c7..67aff19 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -940,12 +940,17 @@ static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = {
 };
 
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
+	/*
+	 * The DSS HW needs all DSS clocks enabled during reset. The dss_core
+	 * driver does not use these clocks.
+	 */
 	{ .role = "tv_clk", .clk = "dss_54m_fck" },
 	{ .role = "sys_clk", .clk = "dss2_fck" },
 };
 
 static struct omap_hwmod omap2430_dss_core_hwmod = {
 	.name		= "dss_core",
+	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 	.class		= &omap2_dss_hwmod_class,
 	.main_clk	= "dss1_fck", /* instead of dss_fck */
 	.sdma_reqs	= omap2xxx_dss_sdma_chs,
@@ -1016,6 +1021,10 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = {
 	&omap2430_l4_core__dss_rfbi,
 };
 
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+	{ .role = "ick", .clk = "dss_ick" },
+};
+
 static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
 	.name		= "dss_rfbi",
 	.class		= &omap2_rfbi_hwmod_class,
@@ -1027,6 +1036,8 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
 			.module_offs = CORE_MOD,
 		},
 	},
+	.opt_clks	= dss_rfbi_opt_clks,
+	.opt_clks_cnt	= ARRAY_SIZE(dss_rfbi_opt_clks),
 	.slaves		= omap2430_dss_rfbi_slaves,
 	.slaves_cnt	= ARRAY_SIZE(omap2430_dss_rfbi_slaves),
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
@@ -1037,7 +1048,7 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
 static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = {
 	.master		= &omap2430_l4_core_hwmod,
 	.slave		= &omap2430_dss_venc_hwmod,
-	.clk		= "dss_54m_fck",
+	.clk		= "dss_ick",
 	.addr		= omap2_dss_venc_addrs,
 	.flags		= OCPIF_SWSUP_IDLE,
 	.user		= OCP_USER_MPU | OCP_USER_SDMA,
@@ -1051,7 +1062,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = {
 static struct omap_hwmod omap2430_dss_venc_hwmod = {
 	.name		= "dss_venc",
 	.class		= &omap2_venc_hwmod_class,
-	.main_clk	= "dss1_fck",
+	.main_clk	= "dss_54m_fck",
 	.prcm		= {
 		.omap2 = {
 			.prcm_reg_id = 1,
-- 
1.7.4.1

[PATCHv2 2/5] OMAP3: HWMOD: fix DSS opt clocks

[Tomi Valkeinen]

Set HWMOD_CONTROL_OPT_CLKS_IN_RESET for dss_core to allow DSS reset
properly.

Add missing dss_96m_fck, which is used by venc on OMAP3430.

Add missing ick and sys_clk for dsi.

Add missing ick for rfbi.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_3xxx_data.c |   35 ++++++++++++++++++++++++---
 1 files changed, 31 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 25bf43b..4a02cc3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -1365,13 +1365,19 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = {
 };
 
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
-	{ .role = "tv_clk", .clk = "dss_tv_fck" },
-	{ .role = "video_clk", .clk = "dss_96m_fck" },
+	/*
+	 * The DSS HW needs all DSS clocks enabled during reset. The dss_core
+	 * driver does not use these clocks.
+	 */
 	{ .role = "sys_clk", .clk = "dss2_alwon_fck" },
+	{ .role = "tv_clk", .clk = "dss_tv_fck" },
+	/* required only on OMAP3430 */
+	{ .role = "tv_dac_clk", .clk = "dss_96m_fck" },
 };
 
 static struct omap_hwmod omap3430es1_dss_core_hwmod = {
 	.name		= "dss_core",
+	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 	.class		= &omap2_dss_hwmod_class,
 	.main_clk	= "dss1_alwon_fck", /* instead of dss_fck */
 	.sdma_reqs	= omap3xxx_dss_sdma_chs,
@@ -1396,6 +1402,7 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
 
 static struct omap_hwmod omap3xxx_dss_core_hwmod = {
 	.name		= "dss_core",
+	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 	.class		= &omap2_dss_hwmod_class,
 	.main_clk	= "dss1_alwon_fck", /* instead of dss_fck */
 	.sdma_reqs	= omap3xxx_dss_sdma_chs,
@@ -1488,6 +1495,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = {
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = {
 	.master		= &omap3xxx_l4_core_hwmod,
 	.slave		= &omap3xxx_dss_dsi1_hwmod,
+	.clk		= "dss_ick",
 	.addr		= omap3xxx_dss_dsi1_addrs,
 	.fw = {
 		.omap2 = {
@@ -1504,6 +1512,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dsi1_slaves[] = {
 	&omap3xxx_l4_core__dss_dsi1,
 };
 
+static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = {
+	{ .role = "sys_clk", .clk = "dss2_alwon_fck" },
+};
+
 static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
 	.name		= "dss_dsi1",
 	.class		= &omap3xxx_dsi_hwmod_class,
@@ -1516,6 +1528,8 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
 			.module_offs = OMAP3430_DSS_MOD,
 		},
 	},
+	.opt_clks	= dss_dsi1_opt_clks,
+	.opt_clks_cnt	= ARRAY_SIZE(dss_dsi1_opt_clks),
 	.slaves		= omap3xxx_dss_dsi1_slaves,
 	.slaves_cnt	= ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
@@ -1545,6 +1559,10 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = {
 	&omap3xxx_l4_core__dss_rfbi,
 };
 
+static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {
+	{ .role = "ick", .clk = "dss_ick" },
+};
+
 static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
 	.name		= "dss_rfbi",
 	.class		= &omap2_rfbi_hwmod_class,
@@ -1556,6 +1574,8 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
 			.module_offs = OMAP3430_DSS_MOD,
 		},
 	},
+	.opt_clks	= dss_rfbi_opt_clks,
+	.opt_clks_cnt	= ARRAY_SIZE(dss_rfbi_opt_clks),
 	.slaves		= omap3xxx_dss_rfbi_slaves,
 	.slaves_cnt	= ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
@@ -1568,7 +1588,7 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
 	.master		= &omap3xxx_l4_core_hwmod,
 	.slave		= &omap3xxx_dss_venc_hwmod,
-	.clk		= "dss_tv_fck",
+	.clk		= "dss_ick",
 	.addr		= omap2_dss_venc_addrs,
 	.fw = {
 		.omap2 = {
@@ -1586,10 +1606,15 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = {
 	&omap3xxx_l4_core__dss_venc,
 };
 
+static struct omap_hwmod_opt_clk dss_venc_opt_clks[] = {
+	/* required only on OMAP3430 */
+	{ .role = "tv_dac_clk", .clk = "dss_96m_fck" },
+};
+
 static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
 	.name		= "dss_venc",
 	.class		= &omap2_venc_hwmod_class,
-	.main_clk	= "dss1_alwon_fck",
+	.main_clk	= "dss_tv_fck",
 	.prcm		= {
 		.omap2 = {
 			.prcm_reg_id = 1,
@@ -1597,6 +1622,8 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
 			.module_offs = OMAP3430_DSS_MOD,
 		},
 	},
+	.opt_clks	= dss_venc_opt_clks,
+	.opt_clks_cnt	= ARRAY_SIZE(dss_venc_opt_clks),
 	.slaves		= omap3xxx_dss_venc_slaves,
 	.slaves_cnt	= ARRAY_SIZE(omap3xxx_dss_venc_slaves),
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
-- 
1.7.4.1

[PATCHv2 3/5] OMAP4: HWMOD: fix DSS opt clocks

[Tomi Valkeinen]

Remove the extra dss_dss_clk from dss_core's opt-clocks. dss_dss_clk is
the fck, and thus not an opt-clock.

Add HWMOD_CONTROL_OPT_CLKS_IN_RESET for dss_core so that dss_core's
reset can finish.

Remove the opt clocks for dispc, as they are not needed.

Change the main_clk for hdmi and venc to dss_48mhz_clk and dss_tv_clk,
respectively.

Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c |   16 ++++------------
 1 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 6201422..8b74058 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -1257,12 +1257,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = {
 static struct omap_hwmod_opt_clk dss_opt_clks[] = {
 	{ .role = "sys_clk", .clk = "dss_sys_clk" },
 	{ .role = "tv_clk", .clk = "dss_tv_clk" },
-	{ .role = "dss_clk", .clk = "dss_dss_clk" },
-	{ .role = "video_clk", .clk = "dss_48mhz_clk" },
+	{ .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
 };
 
 static struct omap_hwmod omap44xx_dss_hwmod = {
 	.name		= "dss_core",
+	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,
 	.class		= &omap44xx_dss_hwmod_class,
 	.clkdm_name	= "l3_dss_clkdm",
 	.main_clk	= "dss_dss_clk",
@@ -1358,12 +1358,6 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
 	&omap44xx_l4_per__dss_dispc,
 };
 
-static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {
-	{ .role = "sys_clk", .clk = "dss_sys_clk" },
-	{ .role = "tv_clk", .clk = "dss_tv_clk" },
-	{ .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
-};
-
 static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
 	.name		= "dss_dispc",
 	.class		= &omap44xx_dispc_hwmod_class,
@@ -1377,8 +1371,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
 			.context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
 		},
 	},
-	.opt_clks	= dss_dispc_opt_clks,
-	.opt_clks_cnt	= ARRAY_SIZE(dss_dispc_opt_clks),
 	.slaves		= omap44xx_dss_dispc_slaves,
 	.slaves_cnt	= ARRAY_SIZE(omap44xx_dss_dispc_slaves),
 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -1645,7 +1637,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
 	.clkdm_name	= "l3_dss_clkdm",
 	.mpu_irqs	= omap44xx_dss_hdmi_irqs,
 	.sdma_reqs	= omap44xx_dss_hdmi_sdma_reqs,
-	.main_clk	= "dss_dss_clk",
+	.main_clk	= "dss_48mhz_clk",
 	.prcm = {
 		.omap4 = {
 			.clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
@@ -1808,7 +1800,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
 	.name		= "dss_venc",
 	.class		= &omap44xx_venc_hwmod_class,
 	.clkdm_name	= "l3_dss_clkdm",
-	.main_clk	= "dss_dss_clk",
+	.main_clk	= "dss_tv_clk",
 	.prcm = {
 		.omap4 = {
 			.clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
-- 
1.7.4.1

Re: [PATCHv2 3/5] OMAP4: HWMOD: fix DSS opt clocks

[Cousson, Benoit]

On 8/8/2011 11:15 AM, Valkeinen, Tomi wrote:
> Remove the extra dss_dss_clk from dss_core's opt-clocks. dss_dss_clk is
> the fck, and thus not an opt-clock.
>
> Add HWMOD_CONTROL_OPT_CLKS_IN_RESET for dss_core so that dss_core's
> reset can finish.
>
> Remove the opt clocks for dispc, as they are not needed.
>
> Change the main_clk for hdmi and venc to dss_48mhz_clk and dss_tv_clk,
> respectively.
>
> Cc: Benoit Cousson<b-cousson@ti.com>
> Signed-off-by: Tomi Valkeinen<tomi.valkeinen@ti.com>

Acked-by: Benoit Cousson <b-cousson@ti.com>

> ---
>   arch/arm/mach-omap2/omap_hwmod_44xx_data.c |   16 ++++------------
>   1 files changed, 4 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> index 6201422..8b74058 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> @@ -1257,12 +1257,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = {
>   static struct omap_hwmod_opt_clk dss_opt_clks[] = {
>   	{ .role = "sys_clk", .clk = "dss_sys_clk" },
>   	{ .role = "tv_clk", .clk = "dss_tv_clk" },
> -	{ .role = "dss_clk", .clk = "dss_dss_clk" },
> -	{ .role = "video_clk", .clk = "dss_48mhz_clk" },
> +	{ .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
>   };
>
>   static struct omap_hwmod omap44xx_dss_hwmod = {
>   	.name		= "dss_core",
> +	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,
>   	.class		=&omap44xx_dss_hwmod_class,
>   	.clkdm_name	= "l3_dss_clkdm",
>   	.main_clk	= "dss_dss_clk",
> @@ -1358,12 +1358,6 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
>   	&omap44xx_l4_per__dss_dispc,
>   };
>
> -static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {
> -	{ .role = "sys_clk", .clk = "dss_sys_clk" },
> -	{ .role = "tv_clk", .clk = "dss_tv_clk" },
> -	{ .role = "hdmi_clk", .clk = "dss_48mhz_clk" },
> -};
> -
>   static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
>   	.name		= "dss_dispc",
>   	.class		=&omap44xx_dispc_hwmod_class,
> @@ -1377,8 +1371,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
>   			.context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET,
>   		},
>   	},
> -	.opt_clks	= dss_dispc_opt_clks,
> -	.opt_clks_cnt	= ARRAY_SIZE(dss_dispc_opt_clks),
>   	.slaves		= omap44xx_dss_dispc_slaves,
>   	.slaves_cnt	= ARRAY_SIZE(omap44xx_dss_dispc_slaves),
>   	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> @@ -1645,7 +1637,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
>   	.clkdm_name	= "l3_dss_clkdm",
>   	.mpu_irqs	= omap44xx_dss_hdmi_irqs,
>   	.sdma_reqs	= omap44xx_dss_hdmi_sdma_reqs,
> -	.main_clk	= "dss_dss_clk",
> +	.main_clk	= "dss_48mhz_clk",
>   	.prcm = {
>   		.omap4 = {
>   			.clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,
> @@ -1808,7 +1800,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
>   	.name		= "dss_venc",
>   	.class		=&omap44xx_venc_hwmod_class,
>   	.clkdm_name	= "l3_dss_clkdm",
> -	.main_clk	= "dss_dss_clk",
> +	.main_clk	= "dss_tv_clk",
>   	.prcm = {
>   		.omap4 = {
>   			.clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET,

[PATCHv2 4/5] OMAP2/3: HWMOD: Add SYSS_HAS_RESET_STATUS for dss

[Tomi Valkeinen]

OMAP2/3 dss_core has a reset status flag in sysstatus register. Add
SYSS_HAS_RESET_STATUS flag to HWMOD data so it can be used.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
 .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index c451729..d78c132 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -43,7 +43,8 @@ static struct omap_hwmod_class_sysconfig omap2_dss_sysc = {
 	.rev_offs	= 0x0000,
 	.sysc_offs	= 0x0010,
 	.syss_offs	= 0x0014,
-	.sysc_flags	= (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
+	.sysc_flags	= (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE |
+			   SYSS_HAS_RESET_STATUS),
 	.sysc_fields	= &omap_hwmod_sysc_type1,
 };
 
-- 
1.7.4.1

[PATCHv2 5/5] OMAP: HWMOD: Unify DSS resets for all OMAPs

[Tomi Valkeinen]

This patch adds a custom DSS reset function used on all OMAP's.

The function doesn't actually do a reset, it only waits for the reset to
complete. The reason for this is that on OMAP4 there is no possibility
to do a SW reset, and on OMAP2/3 doing a SW reset for dss_core resets
all the other DSS modules also, thus breaking the HWMOD model where
every DSS module is independent.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
 arch/arm/mach-omap2/common-board-devices.h         |    4 ++
 arch/arm/mach-omap2/display.c                      |   35 ++++++++++++++++++++
 .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c |    2 +
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c         |    2 +
 4 files changed, 43 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h
index a0b4a428..0aeb74f 100644
--- a/arch/arm/mach-omap2/common-board-devices.h
+++ b/arch/arm/mach-omap2/common-board-devices.h
@@ -5,6 +5,8 @@
 
 #define NAND_BLOCK_SIZE	SZ_128K
 
+struct omap_hwmod;
+
 struct mtd_partition;
 struct ads7846_platform_data;
 
@@ -12,4 +14,6 @@ void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
 		       struct ads7846_platform_data *board_pdata);
 void omap_nand_flash_init(int opts, struct mtd_partition *parts, int n_parts);
 
+int omap_dss_reset(struct omap_hwmod *);
+
 #endif /* __OMAP_COMMON_BOARD_DEVICES__ */
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index a5b7a23..cdb675a 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -26,6 +26,7 @@
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
 #include <plat/omap-pm.h>
+#include <plat/common.h>
 
 static struct platform_device omap_display_device = {
 	.name          = "omapdss",
@@ -126,3 +127,37 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
 
 	return r;
 }
+
+#define MAX_MODULE_SOFTRESET_WAIT	10000
+int omap_dss_reset(struct omap_hwmod *oh)
+{
+	struct omap_hwmod_opt_clk *oc;
+	int c = 0;
+	int i, r;
+
+	if (!(oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)) {
+		pr_err("dss_core: hwmod data doesn't contain reset data\n");
+		return -EINVAL;
+	}
+
+	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+		if (oc->_clk)
+			clk_enable(oc->_clk);
+
+	omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
+				& SYSS_RESETDONE_MASK),
+			MAX_MODULE_SOFTRESET_WAIT, c);
+
+	if (c == MAX_MODULE_SOFTRESET_WAIT)
+		pr_warning("dss_core: waiting for reset to finish failed\n");
+	else
+		pr_debug("dss_core: softreset done\n");
+
+	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+		if (oc->_clk)
+			clk_disable(oc->_clk);
+
+	r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+
+	return r;
+}
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index d78c132..c696420 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -15,6 +15,7 @@
 #include <mach/irqs.h>
 
 #include "omap_hwmod_common_data.h"
+#include "common-board-devices.h"
 
 /* UART */
 
@@ -51,6 +52,7 @@ static struct omap_hwmod_class_sysconfig omap2_dss_sysc = {
 struct omap_hwmod_class omap2_dss_hwmod_class = {
 	.name	= "dss",
 	.sysc	= &omap2_dss_sysc,
+	.reset	= omap_dss_reset,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 8b74058..27969e6 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -37,6 +37,7 @@
 #include "prm44xx.h"
 #include "prm-regbits-44xx.h"
 #include "wd_timer.h"
+#include "common-board-devices.h"
 
 /* Base offset for all OMAP4 interrupts external to MPUSS */
 #define OMAP44XX_IRQ_GIC_START	32
@@ -1204,6 +1205,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_dss_sysc = {
 static struct omap_hwmod_class omap44xx_dss_hwmod_class = {
 	.name	= "dss",
 	.sysc	= &omap44xx_dss_sysc,
+	.reset	= omap_dss_reset,
 };
 
 /* dss */
-- 
1.7.4.1

Re: [PATCHv2 5/5] OMAP: HWMOD: Unify DSS resets for all OMAPs

[Paul Walmsley]

Hi Tomi,

On Mon, 8 Aug 2011, Tomi Valkeinen wrote:

> This patch adds a custom DSS reset function used on all OMAP's.
> 
> The function doesn't actually do a reset, it only waits for the reset to
> complete. The reason for this is that on OMAP4 there is no possibility
> to do a SW reset, and on OMAP2/3 doing a SW reset for dss_core resets
> all the other DSS modules also, thus breaking the HWMOD model where
> every DSS module is independent.
> 
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

This one doesn't build when !CONFIG_OMAP2_DSS - the following is the 
updated patch.


- Paul

From: Tomi Valkeinen <tomi.valkeinen@ti.com>
Date: Fri, 19 Aug 2011 17:00:46 -0600
Subject: [PATCH] OMAP: HWMOD: Unify DSS resets for all OMAPs

This patch adds a custom DSS reset function used on all OMAP's.

The function doesn't actually do a reset, it only waits for the reset to
complete. The reason for this is that on OMAP4 there is no possibility
to do a SW reset, and on OMAP2/3 doing a SW reset for dss_core resets
all the other DSS modules also, thus breaking the HWMOD model where
every DSS module is independent.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[paul@pwsan.com: modified to build arch/arm/mach-omap2/display.o
 unconditionally to avoid an error when !CONFIG_OMAP2_DSS]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
 arch/arm/mach-omap2/Makefile                       |    5 +--
 arch/arm/mach-omap2/common-board-devices.h         |    4 ++
 arch/arm/mach-omap2/display.c                      |   35 ++++++++++++++++++++
 .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c |    2 +
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c         |    2 +
 include/video/omapdss.h                            |    7 ----
 6 files changed, 44 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f343365..bf85539 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,7 @@
 
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
-	 common.o gpio.o dma.o wd_timer.o
+	 common.o gpio.o dma.o wd_timer.o display.o
 
 omap-2-3-common				= irq.o sdrc.o
 hwmod-common				= omap_hwmod.o \
@@ -276,7 +276,4 @@ smsc911x-$(CONFIG_SMSC911X)		:= gpmc-smsc911x.o
 obj-y					+= $(smsc911x-m) $(smsc911x-y)
 obj-$(CONFIG_ARCH_OMAP4)		+= hwspinlock.o
 
-disp-$(CONFIG_OMAP2_DSS)		:= display.o
-obj-y					+= $(disp-m) $(disp-y)
-
 obj-y					+= common-board-devices.o twl-common.o
diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h
index a0b4a428..0aeb74f 100644
--- a/arch/arm/mach-omap2/common-board-devices.h
+++ b/arch/arm/mach-omap2/common-board-devices.h
@@ -5,6 +5,8 @@
 
 #define NAND_BLOCK_SIZE	SZ_128K
 
+struct omap_hwmod;
+
 struct mtd_partition;
 struct ads7846_platform_data;
 
@@ -12,4 +14,6 @@ void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
 		       struct ads7846_platform_data *board_pdata);
 void omap_nand_flash_init(int opts, struct mtd_partition *parts, int n_parts);
 
+int omap_dss_reset(struct omap_hwmod *);
+
 #endif /* __OMAP_COMMON_BOARD_DEVICES__ */
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index a5b7a23..cdb675a 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -26,6 +26,7 @@
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
 #include <plat/omap-pm.h>
+#include <plat/common.h>
 
 static struct platform_device omap_display_device = {
 	.name          = "omapdss",
@@ -126,3 +127,37 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
 
 	return r;
 }
+
+#define MAX_MODULE_SOFTRESET_WAIT	10000
+int omap_dss_reset(struct omap_hwmod *oh)
+{
+	struct omap_hwmod_opt_clk *oc;
+	int c = 0;
+	int i, r;
+
+	if (!(oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)) {
+		pr_err("dss_core: hwmod data doesn't contain reset data\n");
+		return -EINVAL;
+	}
+
+	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+		if (oc->_clk)
+			clk_enable(oc->_clk);
+
+	omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
+				& SYSS_RESETDONE_MASK),
+			MAX_MODULE_SOFTRESET_WAIT, c);
+
+	if (c == MAX_MODULE_SOFTRESET_WAIT)
+		pr_warning("dss_core: waiting for reset to finish failed\n");
+	else
+		pr_debug("dss_core: softreset done\n");
+
+	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+		if (oc->_clk)
+			clk_disable(oc->_clk);
+
+	r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+
+	return r;
+}
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index d78c132..c696420 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -15,6 +15,7 @@
 #include <mach/irqs.h>
 
 #include "omap_hwmod_common_data.h"
+#include "common-board-devices.h"
 
 /* UART */
 
@@ -51,6 +52,7 @@ static struct omap_hwmod_class_sysconfig omap2_dss_sysc = {
 struct omap_hwmod_class omap2_dss_hwmod_class = {
 	.name	= "dss",
 	.sysc	= &omap2_dss_sysc,
+	.reset	= omap_dss_reset,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 8b74058..27969e6 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -37,6 +37,7 @@
 #include "prm44xx.h"
 #include "prm-regbits-44xx.h"
 #include "wd_timer.h"
+#include "common-board-devices.h"
 
 /* Base offset for all OMAP4 interrupts external to MPUSS */
 #define OMAP44XX_IRQ_GIC_START	32
@@ -1204,6 +1205,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_dss_sysc = {
 static struct omap_hwmod_class omap44xx_dss_hwmod_class = {
 	.name	= "dss",
 	.sysc	= &omap44xx_dss_sysc,
+	.reset	= omap_dss_reset,
 };
 
 /* dss */
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 3b55ef2..105b05d 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -245,15 +245,8 @@ struct omap_dss_board_info {
 	void (*dsi_mux_pads)(bool enable);
 };
 
-#if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
 /* Init with the board info */
 extern int omap_display_init(struct omap_dss_board_info *board_data);
-#else
-static inline int omap_display_init(struct omap_dss_board_info *board_data)
-{
-	return 0;
-}
-#endif
 
 struct omap_display_platform_data {
 	struct omap_dss_board_info *board_data;
-- 
1.7.5.4

Re: [PATCHv2 5/5] OMAP: HWMOD: Unify DSS resets for all OMAPs

[Paul Walmsley]

On Fri, 19 Aug 2011, Paul Walmsley wrote:

> This one doesn't build when !CONFIG_OMAP2_DSS - the following is the 
> updated patch.

Looks like my previous update missed a warning.  This also moves the 
omap_dss_reset() prototype from arch/arm/mach-omap2/common-board-devices.h 
to arch/arm/plat-omap/include/plat/common.h.


- Paul

From: Tomi Valkeinen <tomi.valkeinen@ti.com>
Date: Fri, 19 Aug 2011 17:00:46 -0600
Subject: [PATCH] OMAP: HWMOD: Unify DSS resets for all OMAPs

This patch adds a custom DSS reset function used on all OMAP's.

The function doesn't actually do a reset, it only waits for the reset to
complete. The reason for this is that on OMAP4 there is no possibility
to do a SW reset, and on OMAP2/3 doing a SW reset for dss_core resets
all the other DSS modules also, thus breaking the HWMOD model where
every DSS module is independent.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[paul@pwsan.com: modified to build arch/arm/mach-omap2/display.o
 unconditionally to avoid an error when !CONFIG_OMAP2_DSS]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
 arch/arm/mach-omap2/Makefile                       |    5 +--
 arch/arm/mach-omap2/display.c                      |   35 ++++++++++++++++++++
 .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c |    2 +
 arch/arm/mach-omap2/omap_hwmod_44xx_data.c         |    3 ++
 arch/arm/plat-omap/include/plat/common.h           |    3 ++
 include/video/omapdss.h                            |    7 ----
 6 files changed, 44 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f343365..bf85539 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -4,7 +4,7 @@
 
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
-	 common.o gpio.o dma.o wd_timer.o
+	 common.o gpio.o dma.o wd_timer.o display.o
 
 omap-2-3-common				= irq.o sdrc.o
 hwmod-common				= omap_hwmod.o \
@@ -276,7 +276,4 @@ smsc911x-$(CONFIG_SMSC911X)		:= gpmc-smsc911x.o
 obj-y					+= $(smsc911x-m) $(smsc911x-y)
 obj-$(CONFIG_ARCH_OMAP4)		+= hwspinlock.o
 
-disp-$(CONFIG_OMAP2_DSS)		:= display.o
-obj-y					+= $(disp-m) $(disp-y)
-
 obj-y					+= common-board-devices.o twl-common.o
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index a5b7a23..cdb675a 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -26,6 +26,7 @@
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
 #include <plat/omap-pm.h>
+#include <plat/common.h>
 
 static struct platform_device omap_display_device = {
 	.name          = "omapdss",
@@ -126,3 +127,37 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
 
 	return r;
 }
+
+#define MAX_MODULE_SOFTRESET_WAIT	10000
+int omap_dss_reset(struct omap_hwmod *oh)
+{
+	struct omap_hwmod_opt_clk *oc;
+	int c = 0;
+	int i, r;
+
+	if (!(oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)) {
+		pr_err("dss_core: hwmod data doesn't contain reset data\n");
+		return -EINVAL;
+	}
+
+	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+		if (oc->_clk)
+			clk_enable(oc->_clk);
+
+	omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
+				& SYSS_RESETDONE_MASK),
+			MAX_MODULE_SOFTRESET_WAIT, c);
+
+	if (c == MAX_MODULE_SOFTRESET_WAIT)
+		pr_warning("dss_core: waiting for reset to finish failed\n");
+	else
+		pr_debug("dss_core: softreset done\n");
+
+	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
+		if (oc->_clk)
+			clk_disable(oc->_clk);
+
+	r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
+
+	return r;
+}
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index d78c132..c11273d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -11,6 +11,7 @@
 #include <plat/omap_hwmod.h>
 #include <plat/serial.h>
 #include <plat/dma.h>
+#include <plat/common.h>
 
 #include <mach/irqs.h>
 
@@ -51,6 +52,7 @@ static struct omap_hwmod_class_sysconfig omap2_dss_sysc = {
 struct omap_hwmod_class omap2_dss_hwmod_class = {
 	.name	= "dss",
 	.sysc	= &omap2_dss_sysc,
+	.reset	= omap_dss_reset,
 };
 
 /*
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 8b74058..3b80f82 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -29,6 +29,7 @@
 #include <plat/mcbsp.h>
 #include <plat/mmc.h>
 #include <plat/i2c.h>
+#include <plat/common.h>
 
 #include "omap_hwmod_common_data.h"
 
@@ -37,6 +38,7 @@
 #include "prm44xx.h"
 #include "prm-regbits-44xx.h"
 #include "wd_timer.h"
+#include "common-board-devices.h"
 
 /* Base offset for all OMAP4 interrupts external to MPUSS */
 #define OMAP44XX_IRQ_GIC_START	32
@@ -1204,6 +1206,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_dss_sysc = {
 static struct omap_hwmod_class omap44xx_dss_hwmod_class = {
 	.name	= "dss",
 	.sysc	= &omap44xx_dss_sysc,
+	.reset	= omap_dss_reset,
 };
 
 /* dss */
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 4564cc6..a822685 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -30,6 +30,7 @@
 #include <linux/delay.h>
 
 #include <plat/i2c.h>
+#include <plat/omap_hwmod.h>
 
 struct sys_timer;
 
@@ -45,6 +46,8 @@ extern unsigned long long notrace omap_32k_sched_clock(void);
 
 extern void omap_reserve(void);
 
+extern int omap_dss_reset(struct omap_hwmod *);
+
 /*
  * IO bases for various OMAP processors
  * Except the tap base, rest all the io bases
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 3b55ef2..105b05d 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -245,15 +245,8 @@ struct omap_dss_board_info {
 	void (*dsi_mux_pads)(bool enable);
 };
 
-#if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
 /* Init with the board info */
 extern int omap_display_init(struct omap_dss_board_info *board_data);
-#else
-static inline int omap_display_init(struct omap_dss_board_info *board_data)
-{
-	return 0;
-}
-#endif
 
 struct omap_display_platform_data {
 	struct omap_dss_board_info *board_data;
-- 
1.7.5.4

Re: [PATCHv2 5/5] OMAP: HWMOD: Unify DSS resets for all OMAPs

[Tomi Valkeinen]

Hi Paul,

On Sat, 2011-08-20 at 00:26 -0600, Paul Walmsley wrote:
> On Fri, 19 Aug 2011, Paul Walmsley wrote:
> 
> > This one doesn't build when !CONFIG_OMAP2_DSS - the following is the 
> > updated patch.
> 
> Looks like my previous update missed a warning.  This also moves the 
> omap_dss_reset() prototype from arch/arm/mach-omap2/common-board-devices.h 
> to arch/arm/plat-omap/include/plat/common.h.

Related to this, there's also omap_display_init() function in display.c,
called by the board files, which I would like to move elsewhere from
include/video/omapdss.h.

I was thinking of moving it to
arch/arm/mach-omap2/common-board-devices.h but should I move it to
arch/arm/plat-omap/include/plat/common.h so that it's in the same place
with omap_dss_reset() (also from display.c)?

 Tomi

Re: [PATCHv2 5/5] OMAP: HWMOD: Unify DSS resets for all OMAPs

[Paul Walmsley]

Hello Tomi,

On Mon, 22 Aug 2011, Tomi Valkeinen wrote:

> On Sat, 2011-08-20 at 00:26 -0600, Paul Walmsley wrote:
> > On Fri, 19 Aug 2011, Paul Walmsley wrote:
> > 
> > > This one doesn't build when !CONFIG_OMAP2_DSS - the following is the 
> > > updated patch.
> > 
> > Looks like my previous update missed a warning.  This also moves the 
> > omap_dss_reset() prototype from arch/arm/mach-omap2/common-board-devices.h 
> > to arch/arm/plat-omap/include/plat/common.h.
> 
> Related to this, there's also omap_display_init() function in display.c,
> called by the board files, which I would like to move elsewhere from
> include/video/omapdss.h.
> 
> I was thinking of moving it to
> arch/arm/mach-omap2/common-board-devices.h but should I move it to
> arch/arm/plat-omap/include/plat/common.h so that it's in the same place
> with omap_dss_reset() (also from display.c)?

In the long run, it seems good to get rid of 
arch/arm/plat-omap/include/plat/common.h.  What I'd suggest is to move all 
of the OMAP2+-specific integration structures and macros into 
arch/arm/mach-omap2/omapdss.h or something similar.  I would have done 
this in the 3.1-rc patch, but the change seemed too intrusive for the -rc 
series.


- Paul

Re: [PATCHv2 0/5] OMAP DSS HWMOD fixes

[Archit Taneja]

Hi,

On Monday 08 August 2011 02:45 PM, Valkeinen, Tomi wrote:
> Second try with the DSS HWMODs
>
> This set fixes the DSS clocks in HWMOD data, and implements a new reset
> mechanism for dss_core.
>
> The new dss_reset function doesn't actually do a reset, it just enables all DSS
> clocks and waits for the reset to complete. This should be better approach than
> actually doing a reset, because:
>
> OMAP4 - dss_core HW doesn't contain a SW reset bit so doing a reset is
> impossible. But after power-on we need to enable all DSS clocks and wait for
> the power-on reset to complete.
>
> OMAP2/3 - dss_core does have a SW reset bit, but resetting dss_core also resets
> all the other DSS modules. This means that the other modules could be left
> uninitialized, as the hwmod code handles all modules independently, and in this
> case initializes only dss_core's registers. Thus dss_core's reset shouldn't be
> used, and we should only verify that the power-on reset has completed.

If the bootloader enables DSS, we need to do a reset so that DSS2 driver 
can start with DSS HW in a clean state. With this patch set, how do we 
take care of such a scenario?

Archit

>
> Tested on OMAP4 and OMAP3.
>
> The first two HWMOD patches (for OMAP2/3) are not changed since v1.
>
>   Tomi
>
> Tomi Valkeinen (5):
>    OMAP2xxx: HWMOD: fix DSS opt clocks
>    OMAP3: HWMOD: fix DSS opt clocks
>    OMAP4: HWMOD: fix DSS opt clocks
>    OMAP2/3: HWMOD: Add SYSS_HAS_RESET_STATUS for dss
>    OMAP: HWMOD: Unify DSS resets for all OMAPs
>
>   arch/arm/mach-omap2/common-board-devices.h         |    4 ++
>   arch/arm/mach-omap2/display.c                      |   35 ++++++++++++++++++++
>   arch/arm/mach-omap2/omap_hwmod_2420_data.c         |   15 +++++++-
>   arch/arm/mach-omap2/omap_hwmod_2430_data.c         |   15 +++++++-
>   .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c |    5 ++-
>   arch/arm/mach-omap2/omap_hwmod_3xxx_data.c         |   35 +++++++++++++++++--
>   arch/arm/mach-omap2/omap_hwmod_44xx_data.c         |   18 +++-------
>   7 files changed, 106 insertions(+), 21 deletions(-)
>

Re: [PATCHv2 0/5] OMAP DSS HWMOD fixes

[Tomi Valkeinen]

On Mon, 2011-08-08 at 17:13 +0530, Archit Taneja wrote:
> Hi,
> 
> On Monday 08 August 2011 02:45 PM, Valkeinen, Tomi wrote:
> > Second try with the DSS HWMODs
> >
> > This set fixes the DSS clocks in HWMOD data, and implements a new reset
> > mechanism for dss_core.
> >
> > The new dss_reset function doesn't actually do a reset, it just enables all DSS
> > clocks and waits for the reset to complete. This should be better approach than
> > actually doing a reset, because:
> >
> > OMAP4 - dss_core HW doesn't contain a SW reset bit so doing a reset is
> > impossible. But after power-on we need to enable all DSS clocks and wait for
> > the power-on reset to complete.
> >
> > OMAP2/3 - dss_core does have a SW reset bit, but resetting dss_core also resets
> > all the other DSS modules. This means that the other modules could be left
> > uninitialized, as the hwmod code handles all modules independently, and in this
> > case initializes only dss_core's registers. Thus dss_core's reset shouldn't be
> > used, and we should only verify that the power-on reset has completed.
> 
> If the bootloader enables DSS, we need to do a reset so that DSS2 driver 
> can start with DSS HW in a clean state. With this patch set, how do we 
> take care of such a scenario?

We don't. That should be done in a future patch.

I think we should extend this reset function, and disable the LCD
outputs and reset the clock switches there.

I didn't want to do that yet as I wanted to fix the current problem with
the reset first and I don't have an environment where to test it. I hope
you can help here =).

 Tomi

Re: [PATCHv2 0/5] OMAP DSS HWMOD fixes

[Archit Taneja]

Hi,

On Monday 08 August 2011 05:33 PM, Valkeinen, Tomi wrote:
> On Mon, 2011-08-08 at 17:13 +0530, Archit Taneja wrote:
>> Hi,
>>
>> On Monday 08 August 2011 02:45 PM, Valkeinen, Tomi wrote:
>>> Second try with the DSS HWMODs
>>>
>>> This set fixes the DSS clocks in HWMOD data, and implements a new reset
>>> mechanism for dss_core.
>>>
>>> The new dss_reset function doesn't actually do a reset, it just enables all DSS
>>> clocks and waits for the reset to complete. This should be better approach than
>>> actually doing a reset, because:
>>>
>>> OMAP4 - dss_core HW doesn't contain a SW reset bit so doing a reset is
>>> impossible. But after power-on we need to enable all DSS clocks and wait for
>>> the power-on reset to complete.
>>>
>>> OMAP2/3 - dss_core does have a SW reset bit, but resetting dss_core also resets
>>> all the other DSS modules. This means that the other modules could be left
>>> uninitialized, as the hwmod code handles all modules independently, and in this
>>> case initializes only dss_core's registers. Thus dss_core's reset shouldn't be
>>> used, and we should only verify that the power-on reset has completed.
>>
>> If the bootloader enables DSS, we need to do a reset so that DSS2 driver
>> can start with DSS HW in a clean state. With this patch set, how do we
>> take care of such a scenario?
>
> We don't. That should be done in a future patch.
>
> I think we should extend this reset function, and disable the LCD
> outputs and reset the clock switches there.
>
> I didn't want to do that yet as I wanted to fix the current problem with
> the reset first and I don't have an environment where to test it. I hope
> you can help here =).

Yes, we can extend over this. But we would still access DISPC registers 
in the dss_core's custom reset function. Wouldn't this break the "HWMOD 
model where every DSS module is independent"?

Archit

>
>   Tomi
>
>

Re: [PATCHv2 0/5] OMAP DSS HWMOD fixes

[Tomi Valkeinen]

On Mon, 2011-08-08 at 17:51 +0530, Archit Taneja wrote:
> Hi,
> 
> On Monday 08 August 2011 05:33 PM, Valkeinen, Tomi wrote:
> > On Mon, 2011-08-08 at 17:13 +0530, Archit Taneja wrote:
> >> Hi,
> >>
> >> On Monday 08 August 2011 02:45 PM, Valkeinen, Tomi wrote:
> >>> Second try with the DSS HWMODs
> >>>
> >>> This set fixes the DSS clocks in HWMOD data, and implements a new reset
> >>> mechanism for dss_core.
> >>>
> >>> The new dss_reset function doesn't actually do a reset, it just enables all DSS
> >>> clocks and waits for the reset to complete. This should be better approach than
> >>> actually doing a reset, because:
> >>>
> >>> OMAP4 - dss_core HW doesn't contain a SW reset bit so doing a reset is
> >>> impossible. But after power-on we need to enable all DSS clocks and wait for
> >>> the power-on reset to complete.
> >>>
> >>> OMAP2/3 - dss_core does have a SW reset bit, but resetting dss_core also resets
> >>> all the other DSS modules. This means that the other modules could be left
> >>> uninitialized, as the hwmod code handles all modules independently, and in this
> >>> case initializes only dss_core's registers. Thus dss_core's reset shouldn't be
> >>> used, and we should only verify that the power-on reset has completed.
> >>
> >> If the bootloader enables DSS, we need to do a reset so that DSS2 driver
> >> can start with DSS HW in a clean state. With this patch set, how do we
> >> take care of such a scenario?
> >
> > We don't. That should be done in a future patch.
> >
> > I think we should extend this reset function, and disable the LCD
> > outputs and reset the clock switches there.
> >
> > I didn't want to do that yet as I wanted to fix the current problem with
> > the reset first and I don't have an environment where to test it. I hope
> > you can help here =).
> 
> Yes, we can extend over this. But we would still access DISPC registers 
> in the dss_core's custom reset function. Wouldn't this break the "HWMOD 
> model where every DSS module is independent"?

Yes, it won't be as neat as I'd like to, but it shouldn't break
functionally anything.

I thought of adding a new reset function for dss_dispc, but I don't
think that would work, as we need to reset the clock switches (in
dss_core). And if we'd reset the clock switches while dispc output is
enabled, things could again break.

So only solution I can think of is to have dss_core do all those things.
Well, another solution would be to skip the DSS resets totally if DSS
output is enabled. I'm not sure if that's a good solution, though.

 Tomi

Re: [PATCHv2 0/5] OMAP DSS HWMOD fixes

[Tomi Valkeinen]

Hi Paul,

Did you get a chance to look at this series? These fixes will allow us
to remove the temporary hacks from the DSS driver.

 Tomi

On Mon, 2011-08-08 at 12:15 +0300, Tomi Valkeinen wrote:
> Second try with the DSS HWMODs
> 
> This set fixes the DSS clocks in HWMOD data, and implements a new reset
> mechanism for dss_core.
> 
> The new dss_reset function doesn't actually do a reset, it just enables all DSS
> clocks and waits for the reset to complete. This should be better approach than
> actually doing a reset, because:
> 
> OMAP4 - dss_core HW doesn't contain a SW reset bit so doing a reset is
> impossible. But after power-on we need to enable all DSS clocks and wait for
> the power-on reset to complete.
> 
> OMAP2/3 - dss_core does have a SW reset bit, but resetting dss_core also resets
> all the other DSS modules. This means that the other modules could be left
> uninitialized, as the hwmod code handles all modules independently, and in this
> case initializes only dss_core's registers. Thus dss_core's reset shouldn't be
> used, and we should only verify that the power-on reset has completed.
> 
> Tested on OMAP4 and OMAP3.
> 
> The first two HWMOD patches (for OMAP2/3) are not changed since v1.
> 
>  Tomi
> 
> Tomi Valkeinen (5):
>   OMAP2xxx: HWMOD: fix DSS opt clocks
>   OMAP3: HWMOD: fix DSS opt clocks
>   OMAP4: HWMOD: fix DSS opt clocks
>   OMAP2/3: HWMOD: Add SYSS_HAS_RESET_STATUS for dss
>   OMAP: HWMOD: Unify DSS resets for all OMAPs
> 
>  arch/arm/mach-omap2/common-board-devices.h         |    4 ++
>  arch/arm/mach-omap2/display.c                      |   35 ++++++++++++++++++++
>  arch/arm/mach-omap2/omap_hwmod_2420_data.c         |   15 +++++++-
>  arch/arm/mach-omap2/omap_hwmod_2430_data.c         |   15 +++++++-
>  .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c |    5 ++-
>  arch/arm/mach-omap2/omap_hwmod_3xxx_data.c         |   35 +++++++++++++++++--
>  arch/arm/mach-omap2/omap_hwmod_44xx_data.c         |   18 +++-------
>  7 files changed, 106 insertions(+), 21 deletions(-)
> 

Re: [PATCHv2 0/5] OMAP DSS HWMOD fixes

[Paul Walmsley]

On Thu, 18 Aug 2011, Tomi Valkeinen wrote:

> Did you get a chance to look at this series? These fixes will allow us
> to remove the temporary hacks from the DSS driver.

These have been queued for the 3.1-rc fixes series.  Thanks for the 
reminder,

- Paul

Re: [PATCHv2 0/5] OMAP DSS HWMOD fixes

[Tomi Valkeinen]

On Sun, 2011-08-21 at 00:03 -0600, Paul Walmsley wrote:
> On Thu, 18 Aug 2011, Tomi Valkeinen wrote:
> 
> > Did you get a chance to look at this series? These fixes will allow us
> > to remove the temporary hacks from the DSS driver.
> 
> These have been queued for the 3.1-rc fixes series.  Thanks for the 
> reminder,

Thanks. The !CONFIG_OMAP2_DSS fix looks fine to me.

 Tomi