[PATCH v2 0/5] spi/omap: Adaptation to Device Tree

[PATCH v2 0/5] spi/omap: Adaptation to Device Tree

[Benoit Cousson]

Hi Grant,

Here are a couple of SPI patches + the addition of a SPI ethernet device
needed for sdp4430 board.

This update, compared to [1], is adding an extra cleanup to avoid relying
on bus_number in the code.
I changed as well the node name in the DTS  to spi@address to be compliant
with DT conventions.

If you are fine with that I'll send you a pull request for the spi driver
code only and I'll send the DTS stuff through Tony to avoid any conflicts.

This series is based on 3.3-rc4.

This series is available here for reference:
  git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git for_3.4/dt_spi_eth

Regards,
Benoit

[1] http://www.spinics.net/lists/linux-omap/msg64701.html


Benoit Cousson (5):
  spi/omap: Remove bus_num usage for instance index
  spi/omap: Add DT support to McSPI driver
  arm/dts: OMAP4: Add SPI controller nodes
  arm/dts: OMAP3: Add SPI controller nodes
  arm/dts: omap4-sdp: Add ks8851 ethernet SPI device

 Documentation/devicetree/bindings/spi/omap-spi.txt |   20 +++
 arch/arm/boot/dts/omap3.dtsi                       |   32 +++++
 arch/arm/boot/dts/omap4-sdp.dts                    |   30 ++++--
 arch/arm/boot/dts/omap4.dtsi                       |   32 +++++
 arch/arm/mach-omap2/devices.c                      |    4 +-
 drivers/spi/spi-omap2-mcspi.c                      |  127 +++++++++++++-------
 6 files changed, 189 insertions(+), 56 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/omap-spi.txt

[PATCH v2 1/5] spi/omap: Remove bus_num usage for instance index

[Benoit Cousson]

bus_num was used to reference the mcspi controller instance in a fixed array.
Remove this array and store this information directly inside drvdata structure.

bus_num is now just set if the pdev->id is present or with -1 for dynamic
allocation by SPI core, but the driver does not access it anymore.

Clean some bad comments format, and remove un-needed space.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
---
 drivers/spi/spi-omap2-mcspi.c |   72 +++++++++++++++++++---------------------
 1 files changed, 34 insertions(+), 38 deletions(-)

diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index 0b0dfb7..e034164 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -109,6 +109,16 @@ struct omap2_mcspi_dma {
 #define DMA_MIN_BYTES			160
 
 
+/*
+ * Used for context save and restore, structure members to be updated whenever
+ * corresponding registers are modified.
+ */
+struct omap2_mcspi_regs {
+	u32 modulctrl;
+	u32 wakeupenable;
+	struct list_head cs;
+};
+
 struct omap2_mcspi {
 	struct work_struct	work;
 	/* lock protects queue and registers */
@@ -120,8 +130,9 @@ struct omap2_mcspi {
 	unsigned long		phys;
 	/* SPI1 has 4 channels, while SPI2 has 2 */
 	struct omap2_mcspi_dma	*dma_channels;
-	struct  device		*dev;
+	struct device		*dev;
 	struct workqueue_struct *wq;
+	struct omap2_mcspi_regs ctx;
 };
 
 struct omap2_mcspi_cs {
@@ -133,17 +144,6 @@ struct omap2_mcspi_cs {
 	u32			chconf0;
 };
 
-/* used for context save and restore, structure members to be updated whenever
- * corresponding registers are modified.
- */
-struct omap2_mcspi_regs {
-	u32 modulctrl;
-	u32 wakeupenable;
-	struct list_head cs;
-};
-
-static struct omap2_mcspi_regs omap2_mcspi_ctx[OMAP2_MCSPI_MAX_CTRL];
-
 #define MOD_REG_BIT(val, mask, set) do { \
 	if (set) \
 		val |= mask; \
@@ -234,9 +234,12 @@ static void omap2_mcspi_force_cs(struct spi_device *spi, int cs_active)
 
 static void omap2_mcspi_set_master_mode(struct spi_master *master)
 {
+	struct omap2_mcspi	*mcspi = spi_master_get_devdata(master);
+	struct omap2_mcspi_regs	*ctx = &mcspi->ctx;
 	u32 l;
 
-	/* setup when switching from (reset default) slave mode
+	/*
+	 * Setup when switching from (reset default) slave mode
 	 * to single-channel master mode
 	 */
 	l = mcspi_read_reg(master, OMAP2_MCSPI_MODULCTRL);
@@ -245,24 +248,20 @@ static void omap2_mcspi_set_master_mode(struct spi_master *master)
 	MOD_REG_BIT(l, OMAP2_MCSPI_MODULCTRL_SINGLE, 1);
 	mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, l);
 
-	omap2_mcspi_ctx[master->bus_num - 1].modulctrl = l;
+	ctx->modulctrl = l;
 }
 
 static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
 {
-	struct spi_master *spi_cntrl;
-	struct omap2_mcspi_cs *cs;
-	spi_cntrl = mcspi->master;
+	struct spi_master	*spi_cntrl = mcspi->master;
+	struct omap2_mcspi_regs	*ctx = &mcspi->ctx;
+	struct omap2_mcspi_cs	*cs;
 
 	/* McSPI: context restore */
-	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_MODULCTRL,
-			omap2_mcspi_ctx[spi_cntrl->bus_num - 1].modulctrl);
-
-	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE,
-			omap2_mcspi_ctx[spi_cntrl->bus_num - 1].wakeupenable);
+	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_MODULCTRL, ctx->modulctrl);
+	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE, ctx->wakeupenable);
 
-	list_for_each_entry(cs, &omap2_mcspi_ctx[spi_cntrl->bus_num - 1].cs,
-			node)
+	list_for_each_entry(cs, &ctx->cs, node)
 		__raw_writel(cs->chconf0, cs->base + OMAP2_MCSPI_CHCONF0);
 }
 static void omap2_mcspi_disable_clocks(struct omap2_mcspi *mcspi)
@@ -775,7 +774,8 @@ static int omap2_mcspi_request_dma(struct spi_device *spi)
 static int omap2_mcspi_setup(struct spi_device *spi)
 {
 	int			ret;
-	struct omap2_mcspi	*mcspi;
+	struct omap2_mcspi	*mcspi = spi_master_get_devdata(spi->master);
+	struct omap2_mcspi_regs	*ctx = &mcspi->ctx;
 	struct omap2_mcspi_dma	*mcspi_dma;
 	struct omap2_mcspi_cs	*cs = spi->controller_state;
 
@@ -785,7 +785,6 @@ static int omap2_mcspi_setup(struct spi_device *spi)
 		return -EINVAL;
 	}
 
-	mcspi = spi_master_get_devdata(spi->master);
 	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
 
 	if (!cs) {
@@ -797,8 +796,7 @@ static int omap2_mcspi_setup(struct spi_device *spi)
 		cs->chconf0 = 0;
 		spi->controller_state = cs;
 		/* Link this to context save list */
-		list_add_tail(&cs->node,
-			&omap2_mcspi_ctx[mcspi->master->bus_num - 1].cs);
+		list_add_tail(&cs->node, &ctx->cs);
 	}
 
 	if (mcspi_dma->dma_rx_channel == -1
@@ -1051,8 +1049,9 @@ static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m)
 static int __init omap2_mcspi_master_setup(struct omap2_mcspi *mcspi)
 {
 	struct spi_master	*master = mcspi->master;
+	struct omap2_mcspi_regs	*ctx = &mcspi->ctx;
 	u32			tmp;
-	int ret = 0;
+	int			ret = 0;
 
 	ret = omap2_mcspi_enable_clocks(mcspi);
 	if (ret < 0)
@@ -1060,7 +1059,7 @@ static int __init omap2_mcspi_master_setup(struct omap2_mcspi *mcspi)
 
 	tmp = OMAP2_MCSPI_WAKEUPENABLE_WKEN;
 	mcspi_write_reg(master, OMAP2_MCSPI_WAKEUPENABLE, tmp);
-	omap2_mcspi_ctx[master->bus_num - 1].wakeupenable = tmp;
+	ctx->wakeupenable = tmp;
 
 	omap2_mcspi_set_master_mode(master);
 	omap2_mcspi_disable_clocks(mcspi);
@@ -1087,7 +1086,6 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
 	struct omap2_mcspi	*mcspi;
 	struct resource		*r;
 	int			status = 0, i;
-	char			wq_name[20];
 
 	master = spi_alloc_master(&pdev->dev, sizeof *mcspi);
 	if (master == NULL) {
@@ -1111,8 +1109,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
 	mcspi = spi_master_get_devdata(master);
 	mcspi->master = master;
 
-	sprintf(wq_name, "omap2_mcspi/%d", master->bus_num);
-	mcspi->wq = alloc_workqueue(wq_name, WQ_MEM_RECLAIM, 1);
+	mcspi->wq = alloc_workqueue(dev_name(&pdev->dev), WQ_MEM_RECLAIM, 1);
 	if (mcspi->wq == NULL) {
 		status = -ENOMEM;
 		goto free_master;
@@ -1145,7 +1142,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
 
 	spin_lock_init(&mcspi->lock);
 	INIT_LIST_HEAD(&mcspi->msg_queue);
-	INIT_LIST_HEAD(&omap2_mcspi_ctx[master->bus_num - 1].cs);
+	INIT_LIST_HEAD(&mcspi->ctx.cs);
 
 	mcspi->dma_channels = kcalloc(master->num_chipselect,
 			sizeof(struct omap2_mcspi_dma),
@@ -1252,13 +1249,12 @@ static int omap2_mcspi_resume(struct device *dev)
 {
 	struct spi_master	*master = dev_get_drvdata(dev);
 	struct omap2_mcspi	*mcspi = spi_master_get_devdata(master);
-	struct omap2_mcspi_cs *cs;
+	struct omap2_mcspi_regs	*ctx = &mcspi->ctx;
+	struct omap2_mcspi_cs	*cs;
 
 	omap2_mcspi_enable_clocks(mcspi);
-	list_for_each_entry(cs, &omap2_mcspi_ctx[master->bus_num - 1].cs,
-			    node) {
+	list_for_each_entry(cs, &ctx->cs, node) {
 		if ((cs->chconf0 & OMAP2_MCSPI_CHCONF_FORCE) == 0) {
-
 			/*
 			 * We need to toggle CS state for OMAP take this
 			 * change in account.
-- 
1.7.0.4

[PATCH v2 2/5] spi/omap: Add DT support to McSPI driver

[Benoit Cousson]

Add device tree support to the OMAP2+ McSPI driver.
Add the bindings documentation.

Based on original code from Rajendra.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rajendra Nayak <rnayak@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
---
 Documentation/devicetree/bindings/spi/omap-spi.txt |   20 +++++++
 drivers/spi/spi-omap2-mcspi.c                      |   55 +++++++++++++++++---
 2 files changed, 67 insertions(+), 8 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/omap-spi.txt

diff --git a/Documentation/devicetree/bindings/spi/omap-spi.txt b/Documentation/devicetree/bindings/spi/omap-spi.txt
new file mode 100644
index 0000000..81df374
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/omap-spi.txt
@@ -0,0 +1,20 @@
+OMAP2+ McSPI device
+
+Required properties:
+- compatible :
+  - "ti,omap2-spi" for OMAP2 & OMAP3.
+  - "ti,omap4-spi" for OMAP4+.
+- ti,spi-num-cs : Number of chipselect supported  by the instance.
+- ti,hwmods: Name of the hwmod associated to the McSPI
+
+
+Example:
+
+mcspi1: mcspi@1 {
+    #address-cells = <1>;
+    #size-cells = <0>;
+    compatible = "ti,omap4-mcspi";
+    ti,hwmods = "mcspi1";
+    ti,spi-num-cs = <4>;
+};
+
diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
index e034164..d1eb26c 100644
--- a/drivers/spi/spi-omap2-mcspi.c
+++ b/drivers/spi/spi-omap2-mcspi.c
@@ -34,6 +34,8 @@
 #include <linux/io.h>
 #include <linux/slab.h>
 #include <linux/pm_runtime.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
 
 #include <linux/spi/spi.h>
 
@@ -1078,14 +1080,37 @@ static int omap_mcspi_runtime_resume(struct device *dev)
 	return 0;
 }
 
+static struct omap2_mcspi_platform_config omap2_pdata = {
+	.regs_offset = 0,
+};
+
+static struct omap2_mcspi_platform_config omap4_pdata = {
+	.regs_offset = OMAP4_MCSPI_REG_OFFSET,
+};
+
+static const struct of_device_id omap_mcspi_of_match[] = {
+	{
+		.compatible = "ti,omap2-mcspi",
+		.data = &omap2_pdata,
+	},
+	{
+		.compatible = "ti,omap4-mcspi",
+		.data = &omap4_pdata,
+	},
+	{ },
+};
+MODULE_DEVICE_TABLE(of, omap_mcspi_of_match);
 
 static int __init omap2_mcspi_probe(struct platform_device *pdev)
 {
 	struct spi_master	*master;
-	struct omap2_mcspi_platform_config *pdata = pdev->dev.platform_data;
+	struct omap2_mcspi_platform_config *pdata;
 	struct omap2_mcspi	*mcspi;
 	struct resource		*r;
 	int			status = 0, i;
+	u32			regs_offset = 0;
+	struct device_node	*node = pdev->dev.of_node;
+	const struct of_device_id *match;
 
 	master = spi_alloc_master(&pdev->dev, sizeof *mcspi);
 	if (master == NULL) {
@@ -1096,13 +1121,26 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
 	/* the spi->mode bits understood by this driver: */
 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
 
-	if (pdev->id != -1)
-		master->bus_num = pdev->id;
-
 	master->setup = omap2_mcspi_setup;
 	master->transfer = omap2_mcspi_transfer;
 	master->cleanup = omap2_mcspi_cleanup;
-	master->num_chipselect = pdata->num_cs;
+	master->dev.of_node = node;
+
+	match = of_match_device(omap_mcspi_of_match, &pdev->dev);
+	if (match) {
+		u32 num_cs = 1; /* default number of chipselect */
+		pdata = match->data;
+
+		of_property_read_u32(node, "ti,spi-num-cs", &num_cs);
+		master->num_chipselect = num_cs;
+		master->bus_num = -1; /* Allocate bus number dynamically */
+	} else {
+		pdata = pdev->dev.platform_data;
+		master->num_chipselect = pdata->num_cs;
+		if (pdev->id != -1)
+			master->bus_num = pdev->id;
+	}
+	regs_offset = pdata->regs_offset;
 
 	dev_set_drvdata(&pdev->dev, master);
 
@@ -1121,8 +1159,8 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
 		goto free_master;
 	}
 
-	r->start += pdata->regs_offset;
-	r->end += pdata->regs_offset;
+	r->start += regs_offset;
+	r->end += regs_offset;
 	mcspi->phys = r->start;
 	if (!request_mem_region(r->start, resource_size(r),
 				dev_name(&pdev->dev))) {
@@ -1281,7 +1319,8 @@ static struct platform_driver omap2_mcspi_driver = {
 	.driver = {
 		.name =		"omap2_mcspi",
 		.owner =	THIS_MODULE,
-		.pm =		&omap2_mcspi_pm_ops
+		.pm =		&omap2_mcspi_pm_ops,
+		.of_match_table = omap_mcspi_of_match,
 	},
 	.remove =	__exit_p(omap2_mcspi_remove),
 };
-- 
1.7.0.4

[PATCH v2 3/5] arm/dts: OMAP4: Add SPI controller nodes

[Benoit Cousson]

Add the 4 McSPI controller nodes present in an OMAP4 device.

Remove SPI static device initialisation if DT is populated.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
---
 arch/arm/boot/dts/omap4.dtsi  |   32 ++++++++++++++++++++++++++++++++
 arch/arm/mach-omap2/devices.c |    4 +++-
 2 files changed, 35 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index e8fe75f..82830f5 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -127,5 +127,37 @@
 			ti,hwmods = "uart4";
 			clock-frequency = <48000000>;
 		};
+
+		mcspi1: spi@48098000 {
+			compatible = "ti,omap4-mcspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			ti,hwmods = "mcspi1";
+			ti,spi-num-cs = <4>;
+		};
+
+		mcspi2: spi@4809a000 {
+			compatible = "ti,omap4-mcspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			ti,hwmods = "mcspi2";
+			ti,spi-num-cs = <2>;
+		};
+
+		mcspi3: spi@480b8000 {
+			compatible = "ti,omap4-mcspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			ti,hwmods = "mcspi3";
+			ti,spi-num-cs = <2>;
+		};
+
+		mcspi4: spi@480ba000 {
+			compatible = "ti,omap4-mcspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			ti,hwmods = "mcspi4";
+			ti,spi-num-cs = <1>;
+		};
 	};
 };
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 283d11e..8a489ba 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -725,7 +725,9 @@ static int __init omap2_init_devices(void)
 	omap_init_dmic();
 	omap_init_camera();
 	omap_init_mbox();
-	omap_init_mcspi();
+	/* If dtb is there, the devices will be created dynamically */
+	if (!of_have_populated_dt())
+		omap_init_mcspi();
 	omap_init_pmu();
 	omap_hdq_init();
 	omap_init_sti();
-- 
1.7.0.4

[PATCH v2 4/5] arm/dts: OMAP3: Add SPI controller nodes

[Benoit Cousson]

Add the 4 McSPI controller nodes present in an OMAP3 device.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
---
 arch/arm/boot/dts/omap3.dtsi |   32 ++++++++++++++++++++++++++++++++
 1 files changed, 32 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 216c331..c47cd59 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -90,5 +90,37 @@
 			ti,hwmods = "uart4";
 			clock-frequency = <48000000>;
 		};
+
+		mcspi1: spi@48098000 {
+			compatible = "ti,omap2-mcspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			ti,hwmods = "mcspi1";
+			ti,spi-num-cs = <4>;
+		};
+
+		mcspi2: spi@4809a000 {
+			compatible = "ti,omap2-mcspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			ti,hwmods = "mcspi2";
+			ti,spi-num-cs = <2>;
+		};
+
+		mcspi3: spi@480b8000 {
+			compatible = "ti,omap2-mcspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			ti,hwmods = "mcspi3";
+			ti,spi-num-cs = <2>;
+		};
+
+		mcspi4: spi@480ba000 {
+			compatible = "ti,omap2-mcspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			ti,hwmods = "mcspi4";
+			ti,spi-num-cs = <1>;
+		};
 	};
 };
-- 
1.7.0.4

[PATCH v2 5/5] arm/dts: omap4-sdp: Add ks8851 ethernet SPI device

[Benoit Cousson]

Add an ethernet SPI chip in the OMAP4 SDP/Blaze board DTS file.

Add a fixed regulator node controlled by a GPIO line to supply
the ethernet chip.

Based on original code from Rajendra.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
---
 arch/arm/boot/dts/omap4-sdp.dts |   30 +++++++++++++++++++++---------
 1 files changed, 21 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 066e28c..6584109 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -13,17 +13,29 @@
 	model = "TI OMAP4 SDP board";
 	compatible = "ti,omap4-sdp", "ti,omap4430", "ti,omap4";
 
-	/*
-	 * Since the initial device tree board file does not create any
-	 * devices (MMC, network...), the only way to boot is to provide a
-	 * ramdisk.
-	 */
-	chosen {
-		bootargs = "root=/dev/ram0 rw console=ttyO2,115200n8 initrd=0x81600000,20M ramdisk_size=20480 no_console_suspend debug";
-	};
-
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x40000000>; /* 1 GB */
 	};
+
+	vdd_eth: fixedregulator@0 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDD_ETH";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio2 16 0>;  /* gpio line 48 */
+		enable-active-high;
+		regulator-boot-on;
+	};
+};
+
+&mcspi1 {
+	eth@0 {
+		compatible = "ks8851";
+		spi-max-frequency = <24000000>;
+		reg = <0>;
+		interrupt-parent = <&gpio2>;
+		interrupts = <2>; /* gpio line 34 */
+		vdd-supply = <&vdd_eth>;
+	};
 };
-- 
1.7.0.4

Re: [PATCH v2 1/5] spi/omap: Remove bus_num usage for instance index

[Shubhrajyoti]

On Wednesday 29 February 2012 03:49 AM, Benoit Cousson wrote:
> bus_num was used to reference the mcspi controller instance in a fixed array.
> Remove this array and store this information directly inside drvdata structure.
>
Good change thanks.
If you want add my Reviewed-by
> bus_num is now just set if the pdev->id is present or with -1 for dynamic
> allocation by SPI core, but the driver does not access it anymore.
>
> Clean some bad comments format, and remove un-needed space.
>
> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
> ---
>  drivers/spi/spi-omap2-mcspi.c |   72 +++++++++++++++++++---------------------
>  1 files changed, 34 insertions(+), 38 deletions(-)
>
> diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
> index 0b0dfb7..e034164 100644
> --- a/drivers/spi/spi-omap2-mcspi.c
> +++ b/drivers/spi/spi-omap2-mcspi.c
> @@ -109,6 +109,16 @@ struct omap2_mcspi_dma {
>  #define DMA_MIN_BYTES			160
>  
>  
> +/*
> + * Used for context save and restore, structure members to be updated whenever
> + * corresponding registers are modified.
> + */
> +struct omap2_mcspi_regs {
> +	u32 modulctrl;
> +	u32 wakeupenable;
> +	struct list_head cs;
> +};
> +
>  struct omap2_mcspi {
>  	struct work_struct	work;
>  	/* lock protects queue and registers */
> @@ -120,8 +130,9 @@ struct omap2_mcspi {
>  	unsigned long		phys;
>  	/* SPI1 has 4 channels, while SPI2 has 2 */
>  	struct omap2_mcspi_dma	*dma_channels;
> -	struct  device		*dev;
> +	struct device		*dev;
>  	struct workqueue_struct *wq;
> +	struct omap2_mcspi_regs ctx;
>  };
>  
>  struct omap2_mcspi_cs {
> @@ -133,17 +144,6 @@ struct omap2_mcspi_cs {
>  	u32			chconf0;
>  };
>  
> -/* used for context save and restore, structure members to be updated whenever
> - * corresponding registers are modified.
> - */
> -struct omap2_mcspi_regs {
> -	u32 modulctrl;
> -	u32 wakeupenable;
> -	struct list_head cs;
> -};
> -
> -static struct omap2_mcspi_regs omap2_mcspi_ctx[OMAP2_MCSPI_MAX_CTRL];
> -
>  #define MOD_REG_BIT(val, mask, set) do { \
>  	if (set) \
>  		val |= mask; \
> @@ -234,9 +234,12 @@ static void omap2_mcspi_force_cs(struct spi_device *spi, int cs_active)
>  
>  static void omap2_mcspi_set_master_mode(struct spi_master *master)
>  {
> +	struct omap2_mcspi	*mcspi = spi_master_get_devdata(master);
> +	struct omap2_mcspi_regs	*ctx = &mcspi->ctx;
>  	u32 l;
>  
> -	/* setup when switching from (reset default) slave mode
> +	/*
> +	 * Setup when switching from (reset default) slave mode
>  	 * to single-channel master mode
>  	 */
>  	l = mcspi_read_reg(master, OMAP2_MCSPI_MODULCTRL);
> @@ -245,24 +248,20 @@ static void omap2_mcspi_set_master_mode(struct spi_master *master)
>  	MOD_REG_BIT(l, OMAP2_MCSPI_MODULCTRL_SINGLE, 1);
>  	mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, l);
>  
> -	omap2_mcspi_ctx[master->bus_num - 1].modulctrl = l;
> +	ctx->modulctrl = l;
>  }
>  
>  static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
>  {
> -	struct spi_master *spi_cntrl;
> -	struct omap2_mcspi_cs *cs;
> -	spi_cntrl = mcspi->master;
> +	struct spi_master	*spi_cntrl = mcspi->master;
> +	struct omap2_mcspi_regs	*ctx = &mcspi->ctx;
> +	struct omap2_mcspi_cs	*cs;
>  
>  	/* McSPI: context restore */
> -	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_MODULCTRL,
> -			omap2_mcspi_ctx[spi_cntrl->bus_num - 1].modulctrl);
> -
> -	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE,
> -			omap2_mcspi_ctx[spi_cntrl->bus_num - 1].wakeupenable);
> +	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_MODULCTRL, ctx->modulctrl);
> +	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE, ctx->wakeupenable);
>  
> -	list_for_each_entry(cs, &omap2_mcspi_ctx[spi_cntrl->bus_num - 1].cs,
> -			node)
> +	list_for_each_entry(cs, &ctx->cs, node)
>  		__raw_writel(cs->chconf0, cs->base + OMAP2_MCSPI_CHCONF0);
>  }
>  static void omap2_mcspi_disable_clocks(struct omap2_mcspi *mcspi)
> @@ -775,7 +774,8 @@ static int omap2_mcspi_request_dma(struct spi_device *spi)
>  static int omap2_mcspi_setup(struct spi_device *spi)
>  {
>  	int			ret;
> -	struct omap2_mcspi	*mcspi;
> +	struct omap2_mcspi	*mcspi = spi_master_get_devdata(spi->master);
> +	struct omap2_mcspi_regs	*ctx = &mcspi->ctx;
>  	struct omap2_mcspi_dma	*mcspi_dma;
>  	struct omap2_mcspi_cs	*cs = spi->controller_state;
>  
> @@ -785,7 +785,6 @@ static int omap2_mcspi_setup(struct spi_device *spi)
>  		return -EINVAL;
>  	}
>  
> -	mcspi = spi_master_get_devdata(spi->master);
>  	mcspi_dma = &mcspi->dma_channels[spi->chip_select];
>  
>  	if (!cs) {
> @@ -797,8 +796,7 @@ static int omap2_mcspi_setup(struct spi_device *spi)
>  		cs->chconf0 = 0;
>  		spi->controller_state = cs;
>  		/* Link this to context save list */
> -		list_add_tail(&cs->node,
> -			&omap2_mcspi_ctx[mcspi->master->bus_num - 1].cs);
> +		list_add_tail(&cs->node, &ctx->cs);
>  	}
>  
>  	if (mcspi_dma->dma_rx_channel == -1
> @@ -1051,8 +1049,9 @@ static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m)
>  static int __init omap2_mcspi_master_setup(struct omap2_mcspi *mcspi)
>  {
>  	struct spi_master	*master = mcspi->master;
> +	struct omap2_mcspi_regs	*ctx = &mcspi->ctx;
>  	u32			tmp;
> -	int ret = 0;
> +	int			ret = 0;
>  
>  	ret = omap2_mcspi_enable_clocks(mcspi);
>  	if (ret < 0)
> @@ -1060,7 +1059,7 @@ static int __init omap2_mcspi_master_setup(struct omap2_mcspi *mcspi)
>  
>  	tmp = OMAP2_MCSPI_WAKEUPENABLE_WKEN;
>  	mcspi_write_reg(master, OMAP2_MCSPI_WAKEUPENABLE, tmp);
> -	omap2_mcspi_ctx[master->bus_num - 1].wakeupenable = tmp;
> +	ctx->wakeupenable = tmp;
>  
>  	omap2_mcspi_set_master_mode(master);
>  	omap2_mcspi_disable_clocks(mcspi);
> @@ -1087,7 +1086,6 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
>  	struct omap2_mcspi	*mcspi;
>  	struct resource		*r;
>  	int			status = 0, i;
> -	char			wq_name[20];
>  
>  	master = spi_alloc_master(&pdev->dev, sizeof *mcspi);
>  	if (master == NULL) {
> @@ -1111,8 +1109,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
>  	mcspi = spi_master_get_devdata(master);
>  	mcspi->master = master;
>  
> -	sprintf(wq_name, "omap2_mcspi/%d", master->bus_num);
> -	mcspi->wq = alloc_workqueue(wq_name, WQ_MEM_RECLAIM, 1);
> +	mcspi->wq = alloc_workqueue(dev_name(&pdev->dev), WQ_MEM_RECLAIM, 1);
>  	if (mcspi->wq == NULL) {
>  		status = -ENOMEM;
>  		goto free_master;
> @@ -1145,7 +1142,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
>  
>  	spin_lock_init(&mcspi->lock);
>  	INIT_LIST_HEAD(&mcspi->msg_queue);
> -	INIT_LIST_HEAD(&omap2_mcspi_ctx[master->bus_num - 1].cs);
> +	INIT_LIST_HEAD(&mcspi->ctx.cs);
>  
>  	mcspi->dma_channels = kcalloc(master->num_chipselect,
>  			sizeof(struct omap2_mcspi_dma),
> @@ -1252,13 +1249,12 @@ static int omap2_mcspi_resume(struct device *dev)
>  {
>  	struct spi_master	*master = dev_get_drvdata(dev);
>  	struct omap2_mcspi	*mcspi = spi_master_get_devdata(master);
> -	struct omap2_mcspi_cs *cs;
> +	struct omap2_mcspi_regs	*ctx = &mcspi->ctx;
> +	struct omap2_mcspi_cs	*cs;
>  
>  	omap2_mcspi_enable_clocks(mcspi);
> -	list_for_each_entry(cs, &omap2_mcspi_ctx[master->bus_num - 1].cs,
> -			    node) {
> +	list_for_each_entry(cs, &ctx->cs, node) {
>  		if ((cs->chconf0 & OMAP2_MCSPI_CHCONF_FORCE) == 0) {
> -
>  			/*
>  			 * We need to toggle CS state for OMAP take this
>  			 * change in account.

Re: [PATCH v2 1/5] spi/omap: Remove bus_num usage for instance index

[Cousson, Benoit]

On 2/29/2012 1:35 PM, Shubhrajyoti wrote:
> On Wednesday 29 February 2012 03:49 AM, Benoit Cousson wrote:
>> bus_num was used to reference the mcspi controller instance in a fixed array.
>> Remove this array and store this information directly inside drvdata structure.
>>
> Good change thanks.
> If you want add my Reviewed-by

Thanks for the review Shubhro.

Regards,
Benoit

>> bus_num is now just set if the pdev->id is present or with -1 for dynamic
>> allocation by SPI core, but the driver does not access it anymore.
>>
>> Clean some bad comments format, and remove un-needed space.
>>
>> Signed-off-by: Benoit Cousson<b-cousson@ti.com>
>> ---
>>   drivers/spi/spi-omap2-mcspi.c |   72 +++++++++++++++++++---------------------
>>   1 files changed, 34 insertions(+), 38 deletions(-)
>>
>> diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
>> index 0b0dfb7..e034164 100644
>> --- a/drivers/spi/spi-omap2-mcspi.c
>> +++ b/drivers/spi/spi-omap2-mcspi.c
>> @@ -109,6 +109,16 @@ struct omap2_mcspi_dma {
>>   #define DMA_MIN_BYTES			160
>>
>>
>> +/*
>> + * Used for context save and restore, structure members to be updated whenever
>> + * corresponding registers are modified.
>> + */
>> +struct omap2_mcspi_regs {
>> +	u32 modulctrl;
>> +	u32 wakeupenable;
>> +	struct list_head cs;
>> +};
>> +
>>   struct omap2_mcspi {
>>   	struct work_struct	work;
>>   	/* lock protects queue and registers */
>> @@ -120,8 +130,9 @@ struct omap2_mcspi {
>>   	unsigned long		phys;
>>   	/* SPI1 has 4 channels, while SPI2 has 2 */
>>   	struct omap2_mcspi_dma	*dma_channels;
>> -	struct  device		*dev;
>> +	struct device		*dev;
>>   	struct workqueue_struct *wq;
>> +	struct omap2_mcspi_regs ctx;
>>   };
>>
>>   struct omap2_mcspi_cs {
>> @@ -133,17 +144,6 @@ struct omap2_mcspi_cs {
>>   	u32			chconf0;
>>   };
>>
>> -/* used for context save and restore, structure members to be updated whenever
>> - * corresponding registers are modified.
>> - */
>> -struct omap2_mcspi_regs {
>> -	u32 modulctrl;
>> -	u32 wakeupenable;
>> -	struct list_head cs;
>> -};
>> -
>> -static struct omap2_mcspi_regs omap2_mcspi_ctx[OMAP2_MCSPI_MAX_CTRL];
>> -
>>   #define MOD_REG_BIT(val, mask, set) do { \
>>   	if (set) \
>>   		val |= mask; \
>> @@ -234,9 +234,12 @@ static void omap2_mcspi_force_cs(struct spi_device *spi, int cs_active)
>>
>>   static void omap2_mcspi_set_master_mode(struct spi_master *master)
>>   {
>> +	struct omap2_mcspi	*mcspi = spi_master_get_devdata(master);
>> +	struct omap2_mcspi_regs	*ctx =&mcspi->ctx;
>>   	u32 l;
>>
>> -	/* setup when switching from (reset default) slave mode
>> +	/*
>> +	 * Setup when switching from (reset default) slave mode
>>   	 * to single-channel master mode
>>   	 */
>>   	l = mcspi_read_reg(master, OMAP2_MCSPI_MODULCTRL);
>> @@ -245,24 +248,20 @@ static void omap2_mcspi_set_master_mode(struct spi_master *master)
>>   	MOD_REG_BIT(l, OMAP2_MCSPI_MODULCTRL_SINGLE, 1);
>>   	mcspi_write_reg(master, OMAP2_MCSPI_MODULCTRL, l);
>>
>> -	omap2_mcspi_ctx[master->bus_num - 1].modulctrl = l;
>> +	ctx->modulctrl = l;
>>   }
>>
>>   static void omap2_mcspi_restore_ctx(struct omap2_mcspi *mcspi)
>>   {
>> -	struct spi_master *spi_cntrl;
>> -	struct omap2_mcspi_cs *cs;
>> -	spi_cntrl = mcspi->master;
>> +	struct spi_master	*spi_cntrl = mcspi->master;
>> +	struct omap2_mcspi_regs	*ctx =&mcspi->ctx;
>> +	struct omap2_mcspi_cs	*cs;
>>
>>   	/* McSPI: context restore */
>> -	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_MODULCTRL,
>> -			omap2_mcspi_ctx[spi_cntrl->bus_num - 1].modulctrl);
>> -
>> -	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE,
>> -			omap2_mcspi_ctx[spi_cntrl->bus_num - 1].wakeupenable);
>> +	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_MODULCTRL, ctx->modulctrl);
>> +	mcspi_write_reg(spi_cntrl, OMAP2_MCSPI_WAKEUPENABLE, ctx->wakeupenable);
>>
>> -	list_for_each_entry(cs,&omap2_mcspi_ctx[spi_cntrl->bus_num - 1].cs,
>> -			node)
>> +	list_for_each_entry(cs,&ctx->cs, node)
>>   		__raw_writel(cs->chconf0, cs->base + OMAP2_MCSPI_CHCONF0);
>>   }
>>   static void omap2_mcspi_disable_clocks(struct omap2_mcspi *mcspi)
>> @@ -775,7 +774,8 @@ static int omap2_mcspi_request_dma(struct spi_device *spi)
>>   static int omap2_mcspi_setup(struct spi_device *spi)
>>   {
>>   	int			ret;
>> -	struct omap2_mcspi	*mcspi;
>> +	struct omap2_mcspi	*mcspi = spi_master_get_devdata(spi->master);
>> +	struct omap2_mcspi_regs	*ctx =&mcspi->ctx;
>>   	struct omap2_mcspi_dma	*mcspi_dma;
>>   	struct omap2_mcspi_cs	*cs = spi->controller_state;
>>
>> @@ -785,7 +785,6 @@ static int omap2_mcspi_setup(struct spi_device *spi)
>>   		return -EINVAL;
>>   	}
>>
>> -	mcspi = spi_master_get_devdata(spi->master);
>>   	mcspi_dma =&mcspi->dma_channels[spi->chip_select];
>>
>>   	if (!cs) {
>> @@ -797,8 +796,7 @@ static int omap2_mcspi_setup(struct spi_device *spi)
>>   		cs->chconf0 = 0;
>>   		spi->controller_state = cs;
>>   		/* Link this to context save list */
>> -		list_add_tail(&cs->node,
>> -			&omap2_mcspi_ctx[mcspi->master->bus_num - 1].cs);
>> +		list_add_tail(&cs->node,&ctx->cs);
>>   	}
>>
>>   	if (mcspi_dma->dma_rx_channel == -1
>> @@ -1051,8 +1049,9 @@ static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m)
>>   static int __init omap2_mcspi_master_setup(struct omap2_mcspi *mcspi)
>>   {
>>   	struct spi_master	*master = mcspi->master;
>> +	struct omap2_mcspi_regs	*ctx =&mcspi->ctx;
>>   	u32			tmp;
>> -	int ret = 0;
>> +	int			ret = 0;
>>
>>   	ret = omap2_mcspi_enable_clocks(mcspi);
>>   	if (ret<  0)
>> @@ -1060,7 +1059,7 @@ static int __init omap2_mcspi_master_setup(struct omap2_mcspi *mcspi)
>>
>>   	tmp = OMAP2_MCSPI_WAKEUPENABLE_WKEN;
>>   	mcspi_write_reg(master, OMAP2_MCSPI_WAKEUPENABLE, tmp);
>> -	omap2_mcspi_ctx[master->bus_num - 1].wakeupenable = tmp;
>> +	ctx->wakeupenable = tmp;
>>
>>   	omap2_mcspi_set_master_mode(master);
>>   	omap2_mcspi_disable_clocks(mcspi);
>> @@ -1087,7 +1086,6 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
>>   	struct omap2_mcspi	*mcspi;
>>   	struct resource		*r;
>>   	int			status = 0, i;
>> -	char			wq_name[20];
>>
>>   	master = spi_alloc_master(&pdev->dev, sizeof *mcspi);
>>   	if (master == NULL) {
>> @@ -1111,8 +1109,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
>>   	mcspi = spi_master_get_devdata(master);
>>   	mcspi->master = master;
>>
>> -	sprintf(wq_name, "omap2_mcspi/%d", master->bus_num);
>> -	mcspi->wq = alloc_workqueue(wq_name, WQ_MEM_RECLAIM, 1);
>> +	mcspi->wq = alloc_workqueue(dev_name(&pdev->dev), WQ_MEM_RECLAIM, 1);
>>   	if (mcspi->wq == NULL) {
>>   		status = -ENOMEM;
>>   		goto free_master;
>> @@ -1145,7 +1142,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
>>
>>   	spin_lock_init(&mcspi->lock);
>>   	INIT_LIST_HEAD(&mcspi->msg_queue);
>> -	INIT_LIST_HEAD(&omap2_mcspi_ctx[master->bus_num - 1].cs);
>> +	INIT_LIST_HEAD(&mcspi->ctx.cs);
>>
>>   	mcspi->dma_channels = kcalloc(master->num_chipselect,
>>   			sizeof(struct omap2_mcspi_dma),
>> @@ -1252,13 +1249,12 @@ static int omap2_mcspi_resume(struct device *dev)
>>   {
>>   	struct spi_master	*master = dev_get_drvdata(dev);
>>   	struct omap2_mcspi	*mcspi = spi_master_get_devdata(master);
>> -	struct omap2_mcspi_cs *cs;
>> +	struct omap2_mcspi_regs	*ctx =&mcspi->ctx;
>> +	struct omap2_mcspi_cs	*cs;
>>
>>   	omap2_mcspi_enable_clocks(mcspi);
>> -	list_for_each_entry(cs,&omap2_mcspi_ctx[master->bus_num - 1].cs,
>> -			    node) {
>> +	list_for_each_entry(cs,&ctx->cs, node) {
>>   		if ((cs->chconf0&  OMAP2_MCSPI_CHCONF_FORCE) == 0) {
>> -
>>   			/*
>>   			 * We need to toggle CS state for OMAP take this
>>   			 * change in account.
>