From: Tero Kristo <t-kristo@ti.com>
To: Jean Pihet <jean.pihet@newoldbits.com>
Cc: linux-omap@vger.kernel.org, khilman@ti.com, paul@pwsan.com,
tony@atomide.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCHv3 03/20] ARM: OMAP4: PM: add support for device off
Date: Thu, 14 Jun 2012 12:18:42 +0300 [thread overview]
Message-ID: <1339665522.2091.164.camel@sokoban> (raw)
In-Reply-To: <CAORVsuUJOpQu1qE7qmK9PS79JZJ065egqcpfgmsWNHwnhLUdvw@mail.gmail.com>
On Wed, 2012-06-13 at 17:21 +0200, Jean Pihet wrote:
> Hi Tero,
>
> I have a few remarks regarding the genericity of this code. I think it
> is better if the code in powerdomain.c stays generic and that the
> platform specific checks and operations be moved in the specific
> functions (via the pwrdm_ops struct).
Well, I was thinking about this, however it looks like I need to copy
over most of the implementation of omap_set_pwrdm_state and
get_next_achievable_state if I want to do that, or alternatively
overload the underlying omap4 pwrdm code which does not seem that good
solution either.
>
> On Tue, Jun 12, 2012 at 5:31 PM, Tero Kristo <t-kristo@ti.com> wrote:
> > On OMAP4+, device wide off-mode has its own enable mechanism in addition
> > to powerdomain target states. This patch adds support for this on top
> > of functional power states by overloading the OFF state for core pwrdm.
> > On pwrdm level, the deepest power state supported by core pwrdm is OSWR.
> > When user (e.g. suspend) programs core pwrdm target as OFF, the functional
> > power state for the domain will be OSWR with the additional device off
> > enabled. Previous power state information will reflect this also.
> >
> > Signed-off-by: Tero Kristo <t-kristo@ti.com>
> > ---
> > arch/arm/mach-omap2/powerdomain.c | 17 +++++++++
> > arch/arm/mach-omap2/powerdomain.h | 13 +++++++-
> > arch/arm/mach-omap2/powerdomain44xx.c | 48 +++++++++++++++++++++++++++
> > arch/arm/mach-omap2/powerdomains44xx_data.c | 3 +-
> > 4 files changed, 79 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
> > index ac63f86..78a9308 100644
> > --- a/arch/arm/mach-omap2/powerdomain.c
> > +++ b/arch/arm/mach-omap2/powerdomain.c
> > @@ -677,6 +677,8 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 func_pwrst)
> > int sleep_switch = -1, ret = 0, hwsup = 0;
> > int new_func_pwrst, next_func_pwrst, pwrst, logic;
> > u8 curr_pwrst;
> > + bool extra_off_enable = false;
> > + bool has_extra_off = false;
> >
> > if (!pwrdm || IS_ERR(pwrdm)) {
> > pr_debug("%s: invalid params: pwrdm=%p\n", __func__, pwrdm);
> > @@ -687,6 +689,13 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 func_pwrst)
> >
> > mutex_lock(&pwrdm->lock);
> >
> > + /* Check if powerdomain has extra off mode handling */
> > + if (pwrdm->flags & PWRDM_HAS_EXTRA_OFF_ENABLE) {
> > + has_extra_off = true;
> > + if (func_pwrst == PWRDM_FUNC_PWRST_OFF)
> > + extra_off_enable = true;
> > + }
> Could those checks be moved in the OMAP4 specific functions, so that
> the power domain code stays generic?
I'll try to do that and see what happens. The problem I tried to tackle
with this implementation is that even when core next state is programmed
to func OFF, we must program the powerdomain itself to OSWR, which the
current functional pwrst framework does not support too well.... or as
you say, I need to re-write the omap4 pwrdm state handling code itself
which kind of eats the benefit of the functional power states away.
>
> > +
> > new_func_pwrst = pwrdm_get_achievable_func_pwrst(pwrdm, func_pwrst);
> > pwrst = pwrdm_func_to_pwrst(pwrdm, new_func_pwrst);
> > logic = pwrdm_func_to_logic_pwrst(pwrdm, new_func_pwrst);
> > @@ -741,6 +750,9 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 func_pwrst)
> > break;
> > }
> >
> > + if (has_extra_off && arch_pwrdm->pwrdm_enable_off)
> > + arch_pwrdm->pwrdm_enable_off(pwrdm, extra_off_enable);
> > +
> > out:
> > mutex_unlock(&pwrdm->lock);
> > return ret;
> > @@ -810,6 +822,11 @@ int pwrdm_read_next_func_pwrst(struct powerdomain *pwrdm)
> > int next_pwrst = pwrdm_read_next_pwrst(pwrdm);
> > int next_logic = pwrdm_read_logic_retst(pwrdm);
> >
> > + if (pwrdm->flags & PWRDM_HAS_EXTRA_OFF_ENABLE &&
> > + arch_pwrdm->pwrdm_read_next_off &&
> > + arch_pwrdm->pwrdm_read_next_off(pwrdm))
> > + return PWRDM_FUNC_PWRST_OFF;
> > +
> Same comment here. The OMAP4 specific function for
> pwrdm_read_next_pwrst could return PWRDM_FUNC_PWRST_OFF.
Same issue.
Anyway, I'll try to fiddle with the code bit more and see what happens.
-Tero
next prev parent reply other threads:[~2012-06-14 9:18 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-12 15:31 [PATCHv3 00/20] ARM: OMAP4: device off support Tero Kristo
2012-06-12 15:31 ` [PATCHv3 01/20] ARM: OMAP4: PM: powerdomain: Add HWSAR flag to L3INIT Tero Kristo
2012-06-12 15:31 ` [PATCHv3 02/20] ARM: OMAP4: powerdomain: update mpu / core off counters during device off Tero Kristo
2012-06-12 15:31 ` [PATCHv3 03/20] ARM: OMAP4: PM: add support for " Tero Kristo
2012-06-13 15:21 ` Jean Pihet
2012-06-14 9:18 ` Tero Kristo [this message]
2012-06-14 13:53 ` Tero Kristo
2012-06-12 15:31 ` [PATCHv3 04/20] ARM: OMAP4: PM: update ROM return address for OSWR and OFF Tero Kristo
2012-06-12 15:31 ` [PATCHv3 05/20] OMAP4: PM: clockdomain: workaround for l4_secure_clkdm HWSUP Tero Kristo
2012-06-12 15:31 ` [PATCHv3 06/20] ARM: OMAP4: secure: move GIC / wakeupgen save restore to secure CPU PM notifier Tero Kristo
2012-06-12 15:31 ` [PATCHv3 07/20] ARM: OMAP4: secure: add support for device off Tero Kristo
2012-06-12 15:31 ` [PATCHv3 08/20] ARM: OMAP4: PM: add MPUSS power domain device off support Tero Kristo
2012-06-12 15:31 ` [PATCHv3 09/20] ARM: OMAP4: PM: save/restore all DPLL settings in OFF mode Tero Kristo
2012-06-12 15:31 ` [PATCHv3 10/20] ARM: OMAP4: PM: save/restore all CM1/2 " Tero Kristo
2012-06-12 15:31 ` [PATCHv3 11/20] ARM: OMAP4: PM: Add SAR backup support towards device OFF Tero Kristo
2012-06-12 15:31 ` [PATCHv3 12/20] ARM: OMAP4: PM: Work-around for ROM code BUG of IVAHD/TESLA Tero Kristo
2012-06-12 15:31 ` [PATCHv3 13/20] ARM: OMAP4: PM: save/restore CM L3INSTR registers when MPU hits OSWR/OFF mode Tero Kristo
2012-06-12 15:31 ` [PATCHv3 14/20] ARM: OMAP4: PM: Mark the PPI and SPI interrupts as non-secure for GP Tero Kristo
2012-06-12 15:31 ` [PATCHv3 15/20] ARM: OMAP4430: PM: workaround for DDR corruption on second CS Tero Kristo
2012-06-12 15:31 ` [PATCHv3 16/20] TEMP: ARM: OMAP4: prevent voltage transitions Tero Kristo
2012-06-12 15:31 ` [PATCHv3 17/20] ARM: OMAP4: put cpu1 back to sleep if no wake request Tero Kristo
2012-06-12 15:31 ` [PATCHv3 18/20] ARM: OMAP4460: wakeupgen: set GIC_CPU0 backup status flag always Tero Kristo
2012-06-12 15:31 ` [PATCHv3 19/20] ARM: OMAP4: PM: enable off mode by default Tero Kristo
2012-06-12 15:41 ` [PATCHv3 20/20] ARM: OMAP4430: PM: errata i625, WUGEN lost for GP devices after OFF mode Tero Kristo
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