[PATCH 0/2] ARM: OMAP2+: GPMC: Show correct frequency for OneNAND devices using async mode

[PATCH 0/2] ARM: OMAP2+: GPMC: Show correct frequency for OneNAND devices using async mode

[Jon Hunter]

Boards that have OneNAND devices but only support the async read and write modes
show that the OneNAND operating frequency is 0 MHz on boot. For example, the
OMAP3430 SDP shows the following:

omap2-onenand: initializing on CS2, phys base 0x20000000, virtual base c88c0000, freq 0 MHz

This series corrects this and cleans up the code that is determining the OneNAND
frequency. This series is based upon Afzal's prep-gpmc branch [1] and has been
tested on an OMAP3430 SDP.

[1] http://gitorious.org/x0148406-public/linux-kernel/trees/gpmc-prep

Jon Hunter (2):
  ARM: OMAP2+: GPMC: Remove unused OneNAND get_freq() platform function
  ARM: OMAP2+: GPMC: Show correct frequency for OneNAND devices using
    async mode

 arch/arm/mach-omap2/gpmc-onenand.c        |   53 +++++------------------------
 arch/arm/plat-omap/include/plat/onenand.h |    8 -----
 2 files changed, 9 insertions(+), 52 deletions(-)

-- 
1.7.9.5

[PATCH 1/2] ARM: OMAP2+: GPMC: Remove unused OneNAND get_freq() platform function

[Jon Hunter]

A platform function pointer for getting the frequency of a OneNAND device
was added so that a platform could specify a custom function for returning
the frequency and not just rely on the OneNAND version to determine the
frequency. However, this platform function pointer is not currently being
used and I am not sure if it ever has.

OneNAND devices are not so common these days and as far as I know not being
used with new devices. Therefore, it is most likely that this get_freq()
function pointer will not be used and so remove it.

Given that the get_freq() function pointer is not used, neither is the
clk_dep variable and so all references to it can also be removed.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
---
 arch/arm/mach-omap2/gpmc-onenand.c        |   39 ++++-------------------------
 arch/arm/plat-omap/include/plat/onenand.h |    8 ------
 2 files changed, 5 insertions(+), 42 deletions(-)

diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c
index c8a9487..0f3b5b9 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -139,21 +139,10 @@ static void set_onenand_cfg(void __iomem *onenand_base)
 }
 
 static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg,
-				  void __iomem *onenand_base, bool *clk_dep)
+				  void __iomem *onenand_base)
 {
 	u16 ver = readw(onenand_base + ONENAND_REG_VERSION_ID);
-	int freq = 0;
-
-	if (cfg->get_freq) {
-		struct onenand_freq_info fi;
-
-		fi.maf_id = readw(onenand_base + ONENAND_REG_MANUFACTURER_ID);
-		fi.dev_id = readw(onenand_base + ONENAND_REG_DEVICE_ID);
-		fi.ver_id = ver;
-		freq = cfg->get_freq(&fi, clk_dep);
-		if (freq)
-			return freq;
-	}
+	int freq;
 
 	switch ((ver >> 4) & 0xf) {
 	case 0:
@@ -181,7 +170,7 @@ static int omap2_onenand_get_freq(struct omap_onenand_platform_data *cfg,
 
 static struct gpmc_timings
 omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg,
-						int freq, bool clk_dep)
+						int freq)
 {
 	struct gpmc_timings t;
 	const int t_cer  = 15;
@@ -259,22 +248,6 @@ omap2_onenand_calc_sync_timings(struct omap_onenand_platform_data *cfg,
 	else
 		latency = 4;
 
-	if (clk_dep) {
-		if (gpmc_clk_ns < 12) { /* >83Mhz */
-			t_ces   = 3;
-			t_avds  = 4;
-		} else if (gpmc_clk_ns < 15) { /* >66Mhz */
-			t_ces   = 5;
-			t_avds  = 4;
-		} else if (gpmc_clk_ns < 25) { /* >40Mhz */
-			t_ces   = 6;
-			t_avds  = 5;
-		} else {
-			t_ces   = 7;
-			t_avds  = 7;
-		}
-	}
-
 	/* Set synchronous read timings */
 	memset(&t, 0, sizeof(t));
 
@@ -379,16 +352,14 @@ static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr)
 {
 	int ret, freq = *freq_ptr;
 	struct gpmc_timings t;
-	bool clk_dep = false;
 
 	if (!freq) {
 		/* Very first call freq is not known */
-		freq = omap2_onenand_get_freq(gpmc_onenand_data,
-						onenand_base, &clk_dep);
+		freq = omap2_onenand_get_freq(gpmc_onenand_data, onenand_base);
 		set_onenand_cfg(onenand_base);
 	}
 
-	t = omap2_onenand_calc_sync_timings(gpmc_onenand_data, freq, clk_dep);
+	t = omap2_onenand_calc_sync_timings(gpmc_onenand_data, freq);
 
 	ret = gpmc_set_sync_mode(gpmc_onenand_data->cs, &t);
 	if (IS_ERR_VALUE(ret))
diff --git a/arch/arm/plat-omap/include/plat/onenand.h b/arch/arm/plat-omap/include/plat/onenand.h
index 2858667..21bb0ff 100644
--- a/arch/arm/plat-omap/include/plat/onenand.h
+++ b/arch/arm/plat-omap/include/plat/onenand.h
@@ -15,20 +15,12 @@
 #define ONENAND_SYNC_READ	(1 << 0)
 #define ONENAND_SYNC_READWRITE	(1 << 1)
 
-struct onenand_freq_info {
-	u16			maf_id;
-	u16			dev_id;
-	u16			ver_id;
-};
-
 struct omap_onenand_platform_data {
 	int			cs;
 	int			gpio_irq;
 	struct mtd_partition	*parts;
 	int			nr_parts;
 	int			(*onenand_setup)(void __iomem *, int *freq_ptr);
-	int		(*get_freq)(const struct onenand_freq_info *freq_info,
-				    bool *clk_dep);
 	int			dma_channel;
 	u8			flags;
 	u8			regulator_can_sleep;
-- 
1.7.9.5

[PATCH 2/2] ARM: OMAP2+: GPMC: Show correct frequency for OneNAND devices using async mode

[Jon Hunter]

Boards that have OneNAND devices but only support the async read and write modes
show that the OneNAND operating frequency is 0 MHz on boot. For example, the
OMAP3430 SDP shows the following:

omap2-onenand: initializing on CS2, phys base 0x20000000, virtual base c88c0000, freq 0 MHz

This is because the frequency is only queried when setting up synchronous
timings for boards using sync read and/or write modes. This is purely a cosmetic
fix to show the correct frequency on boot because currently the async timing are
set independently of the OneNAND frequency. However, this would need to be
changed to support different OneNAND devices using different async timings.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
---
 arch/arm/mach-omap2/gpmc-onenand.c |   16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c
index 0f3b5b9..62cfc93 100644
--- a/arch/arm/mach-omap2/gpmc-onenand.c
+++ b/arch/arm/mach-omap2/gpmc-onenand.c
@@ -348,17 +348,11 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base)
 	return 0;
 }
 
-static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr)
+static int omap2_onenand_setup_sync(void __iomem *onenand_base, int freq)
 {
-	int ret, freq = *freq_ptr;
+	int ret;
 	struct gpmc_timings t;
 
-	if (!freq) {
-		/* Very first call freq is not known */
-		freq = omap2_onenand_get_freq(gpmc_onenand_data, onenand_base);
-		set_onenand_cfg(onenand_base);
-	}
-
 	t = omap2_onenand_calc_sync_timings(gpmc_onenand_data, freq);
 
 	ret = gpmc_set_sync_mode(gpmc_onenand_data->cs, &t);
@@ -367,8 +361,6 @@ static int omap2_onenand_setup_sync(void __iomem *onenand_base, int *freq_ptr)
 
 	set_onenand_cfg(onenand_base);
 
-	*freq_ptr = freq;
-
 	return 0;
 }
 
@@ -384,10 +376,12 @@ static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
 		return ret;
 	}
 
+	*freq_ptr = omap2_onenand_get_freq(gpmc_onenand_data, onenand_base);
+
 	if (!(gpmc_onenand_data->flags & l))
 		return 0;
 
-	ret = omap2_onenand_setup_sync(onenand_base, freq_ptr);
+	ret = omap2_onenand_setup_sync(onenand_base, *freq_ptr);
 	if (ret)
 		dev_err(dev, "unable to set to sync mode\n");
 	return ret;
-- 
1.7.9.5