From: Rajendra Nayak <rnayak@ti.com>
To: linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: tony@atomide.com, paul@pwsan.com, khilman@linaro.org,
benoit.cousson@gmail.com, r.sricharan@ti.com, ambresh@ti.com,
Tero Kristo <t-kristo@ti.com>, Rajendra Nayak <rnayak@ti.com>
Subject: [PATCH 04/12] ARM: DRA7: PRCM: Add DRA7XX local MPU PRCM regsiters
Date: Tue, 9 Jul 2013 13:02:11 +0530 [thread overview]
Message-ID: <1373355139-12487-5-git-send-email-rnayak@ti.com> (raw)
In-Reply-To: <1373355139-12487-1-git-send-email-rnayak@ti.com>
From: Ambresh K <ambresh@ti.com>
Add the PRCM MPU registers for DRA7XX platforms
Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
---
arch/arm/mach-omap2/prcm44xx.h | 5 +++
arch/arm/mach-omap2/prcm_mpu7xx.h | 77 +++++++++++++++++++++++++++++++++++++
2 files changed, 82 insertions(+)
create mode 100644 arch/arm/mach-omap2/prcm_mpu7xx.h
diff --git a/arch/arm/mach-omap2/prcm44xx.h b/arch/arm/mach-omap2/prcm44xx.h
index f429cdd..4fea2cf 100644
--- a/arch/arm/mach-omap2/prcm44xx.h
+++ b/arch/arm/mach-omap2/prcm44xx.h
@@ -38,6 +38,11 @@
#define OMAP54XX_SCRM_PARTITION 4
#define OMAP54XX_PRCM_MPU_PARTITION 5
+#define DRA7XX_PRM_PARTITION 1
+#define DRA7XX_CM_CORE_AON_PARTITION 2
+#define DRA7XX_CM_CORE_PARTITION 3
+#define DRA7XX_MPU_PRCM_PARTITION 5
+
/*
* OMAP4_MAX_PRCM_PARTITIONS: set to the highest value of the PRCM partition
* IDs, plus one
diff --git a/arch/arm/mach-omap2/prcm_mpu7xx.h b/arch/arm/mach-omap2/prcm_mpu7xx.h
new file mode 100644
index 0000000..67c4b6b
--- /dev/null
+++ b/arch/arm/mach-omap2/prcm_mpu7xx.h
@@ -0,0 +1,77 @@
+/*
+ * DRA7xx PRCM MPU instance offset macros
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
+ *
+ * Paul Walmsley (paul@pwsan.com)
+ * Rajendra Nayak (rnayak@ti.com)
+ * Benoit Cousson (b-cousson@ti.com)
+ *
+ * This file is automatically generated from the OMAP hardware databases.
+ * We respectfully ask that any modifications to this file be coordinated
+ * with the public linux-omap@vger.kernel.org mailing list and the
+ * authors above to ensure that the autogeneration scripts are kept
+ * up-to-date with the file contents.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2_PRCM_MPU7XX_H
+#define __ARCH_ARM_MACH_OMAP2_PRCM_MPU7XX_H
+
+#include "prcm_mpu_44xx_54xx.h"
+
+#define DRA7XX_PRCM_MPU_BASE 0x48243000
+
+#define DRA7XX_PRCM_MPU_REGADDR(inst, reg) \
+ OMAP2_L4_IO_ADDRESS(DRA7XX_PRCM_MPU_BASE + (inst) + (reg))
+
+/* MPU_PRCM instances */
+#define DRA7XX_MPU_PRCM_OCP_SOCKET_INST 0x0000
+#define DRA7XX_MPU_PRCM_DEVICE_INST 0x0200
+#define DRA7XX_MPU_PRCM_PRM_C0_INST 0x0400
+#define DRA7XX_MPU_PRCM_CM_C0_INST 0x0600
+#define DRA7XX_MPU_PRCM_PRM_C1_INST 0x0800
+#define DRA7XX_MPU_PRCM_CM_C1_INST 0x0a00
+
+/* PRCM_MPU clockdomain register offsets (from instance start) */
+#define DRA7XX_MPU_PRCM_CM_C0_CPU0_CDOFFS 0x0000
+#define DRA7XX_MPU_PRCM_CM_C1_CPU1_CDOFFS 0x0000
+
+
+/* MPU_PRCM */
+
+/* MPU_PRCM.PRCM_MPU_OCP_SOCKET register offsets */
+#define DRA7XX_REVISION_PRCM_MPU_OFFSET 0x0000
+
+/* MPU_PRCM.PRCM_MPU_DEVICE register offsets */
+#define DRA7XX_PRM_FRAC_INCREMENTER_NUMERATOR_OFFSET 0x0010
+#define DRA7XX_PRM_FRAC_INCREMENTER_DENUMERATOR_RELOAD_OFFSET 0x0014
+
+/* MPU_PRCM.PRCM_MPU_PRM_C0 register offsets */
+#define DRA7XX_PM_CPU0_PWRSTCTRL_OFFSET 0x0000
+#define DRA7XX_PM_CPU0_PWRSTST_OFFSET 0x0004
+#define DRA7XX_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x0010
+#define DRA7XX_RM_CPU0_CPU0_RSTST_OFFSET 0x0014
+#define DRA7XX_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0024
+
+/* MPU_PRCM.PRCM_MPU_CM_C0 register offsets */
+#define DRA7XX_CM_CPU0_CLKSTCTRL_OFFSET 0x0000
+#define DRA7XX_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0020
+#define DRA7XX_CM_CPU0_CPU0_CLKCTRL DRA7XX_MPU_PRCM_REGADDR(DRA7XX_MPU_PRCM_CM_C0_INST, 0x0020)
+
+/* MPU_PRCM.PRCM_MPU_PRM_C1 register offsets */
+#define DRA7XX_PM_CPU1_PWRSTCTRL_OFFSET 0x0000
+#define DRA7XX_PM_CPU1_PWRSTST_OFFSET 0x0004
+#define DRA7XX_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x0010
+#define DRA7XX_RM_CPU1_CPU1_RSTST_OFFSET 0x0014
+#define DRA7XX_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0024
+
+/* MPU_PRCM.PRCM_MPU_CM_C1 register offsets */
+#define DRA7XX_CM_CPU1_CLKSTCTRL_OFFSET 0x0000
+#define DRA7XX_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0020
+#define DRA7XX_CM_CPU1_CPU1_CLKCTRL DRA7XX_MPU_PRCM_REGADDR(DRA7XX_MPU_PRCM_CM_C1_INST, 0x0020)
+
+#endif
--
1.7.9.5
next prev parent reply other threads:[~2013-07-09 7:33 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-09 7:32 [PATCH 00/12] DRA7xx PRCM, hwmod and DT data Rajendra Nayak
2013-07-09 7:32 ` [PATCH 01/12] ARM: DRA7: PRM: Add DRA7XX register definitions Rajendra Nayak
2013-07-09 7:32 ` [PATCH 02/12] ARM: DRA7: CM: Add DRA7XX register defines Rajendra Nayak
2013-07-09 7:32 ` [PATCH 03/12] ARM: DRA7: CM: Add minimal regbit shifts Rajendra Nayak
2013-07-09 7:32 ` Rajendra Nayak [this message]
2013-07-09 7:32 ` [PATCH 05/12] ARM: DRA7: clockdomain: Add DRA7XX data and update header Rajendra Nayak
2013-07-09 7:32 ` [PATCH 06/12] ARM: DRA7: powerdomain: " Rajendra Nayak
2013-07-09 7:32 ` [PATCH 07/12] ARM: DRA7: powerdomain: Handle missing vc/vp Rajendra Nayak
2013-07-09 7:32 ` [PATCH 08/12] ARM: DRA7: Reuse the omap44xx_restart and fix the device instance Rajendra Nayak
2013-07-14 12:12 ` Kevin Hilman
2013-07-09 7:32 ` [PATCH 09/12] ARM: DRA7: hwmod: Create initial DRA7XX SoC data Rajendra Nayak
2013-07-09 8:31 ` Tony Lindgren
2013-07-09 10:14 ` Rajendra Nayak
2013-07-09 11:36 ` Tony Lindgren
2013-07-15 9:22 ` Rajendra Nayak
2013-07-09 7:32 ` [PATCH 10/12] ARM: DRA7: Enable PM framework initializations Rajendra Nayak
2013-07-09 7:32 ` [PATCH 11/12] ARM: DRA7: Add the build support in omap2plus Rajendra Nayak
2013-07-09 7:32 ` [PATCH 12/12] ARM: DRA7: dts: Add the dts files for dra7 SoC and dra7-evm board Rajendra Nayak
2013-08-21 2:10 ` [PATCH 00/12] DRA7xx PRCM, hwmod and DT data Paul Walmsley
2013-08-21 8:55 ` Paul Walmsley
2013-08-21 9:16 ` Rajendra Nayak
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