* [PATCH 1/3] omap2: add SDRC register defines
2007-05-17 0:05 [PATCH 0/3] Clean up SDRC usage; create sdrc.h Paul Walmsley
@ 2007-05-17 0:05 ` Paul Walmsley
2007-05-17 0:05 ` [PATCH 2/3] omap2: convert existing SDRC register users to use sdrc.h Paul Walmsley
2007-05-17 0:05 ` [PATCH 3/3] omap2: remove SDRC register defines from prcm-regs.h Paul Walmsley
2 siblings, 0 replies; 5+ messages in thread
From: Paul Walmsley @ 2007-05-17 0:05 UTC (permalink / raw)
To: linux-omap-open-source
[-- Attachment #1: 0001-omap2-add-SDRC-register-defines.patch --]
[-- Type: text/plain, Size: 1795 bytes --]
Create sdrc.h, containing symbolic constants for SDRC registers and
sdrc_{read,write}_reg() to read and write those registers.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/sdrc.h | 49 ++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 49 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-omap2/sdrc.h
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
new file mode 100644
index 0000000..4becc5f
--- /dev/null
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -0,0 +1,49 @@
+#ifndef __ARCH_ARM_MACH_OMAP2_SDRC_H
+#define __ARCH_ARM_MACH_OMAP2_SDRC_H
+
+/*
+ * OMAP2 SDRC register definitions
+ *
+ * Copyright (C) 2007 Texas Instruments, Inc.
+ * Copyright (C) 2007 Nokia Corporation
+ *
+ * Written by Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <asm/arch/io.h>
+
+
+#define OMAP_SDRC_REGADDR(reg) (void __iomem *)IO_ADDRESS(SDRC_BASE + reg)
+
+/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
+
+#define SDRC_SYSCONFIG 0x010
+#define SDRC_DLLA_CTRL 0x060
+#define SDRC_DLLA_STATUS 0x064
+#define SDRC_DLLB_CTRL 0x068
+#define SDRC_DLLB_STATUS 0x06C
+#define SDRC_POWER 0x070
+#define SDRC_MR_0 0x084
+
+
+/* SDRC global register get/set */
+
+static void __attribute__((unused)) sdrc_write_reg(u32 val, u16 reg)
+{
+ pr_debug("sdrc_write_reg: writing 0x%0x to 0x%0x\n", val,
+ (u32)OMAP_SDRC_REGADDR(reg));
+
+ __raw_writel(val, OMAP_SDRC_REGADDR(reg));
+}
+
+static u32 __attribute__((unused)) sdrc_read_reg(u16 reg)
+{
+ return __raw_readl(OMAP_SDRC_REGADDR(reg));
+}
+
+#endif
--
1.5.1.3
--
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/3] omap2: convert existing SDRC register users to use sdrc.h
2007-05-17 0:05 [PATCH 0/3] Clean up SDRC usage; create sdrc.h Paul Walmsley
2007-05-17 0:05 ` [PATCH 1/3] omap2: add SDRC register defines Paul Walmsley
@ 2007-05-17 0:05 ` Paul Walmsley
2007-05-17 0:05 ` [PATCH 3/3] omap2: remove SDRC register defines from prcm-regs.h Paul Walmsley
2 siblings, 0 replies; 5+ messages in thread
From: Paul Walmsley @ 2007-05-17 0:05 UTC (permalink / raw)
To: linux-omap-open-source
[-- Attachment #1: 0002-omap2-convert-existing-SDRC-register-users-to-use-s.patch --]
[-- Type: text/plain, Size: 3942 bytes --]
Convert files that use SDRC registers in mach-omap2/ to use sdrc.h
symbolic constants and sdrc_{read,write}_reg().
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/clock.c | 4 +++-
arch/arm/mach-omap2/memory.c | 21 +++++++++++----------
arch/arm/mach-omap2/pm.c | 7 ++++---
3 files changed, 18 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index d60d171..1d02406 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -32,6 +32,7 @@
#include "prcm-regs.h"
#include "memory.h"
#include "clock.h"
+#include "sdrc.h"
#undef DEBUG
@@ -447,7 +448,8 @@ static long omap2_clk_round_rate(struct clk *clk, unsigned long rate)
*/
static u32 omap2_dll_force_needed(void)
{
- u32 dll_state = SDRC_DLLA_CTRL; /* dlla and dllb are a set */
+ /* dlla and dllb are a set */
+ u32 dll_state = sdrc_read_reg(SDRC_DLLA_CTRL);
if ((dll_state & (1 << 2)) == (1 << 2))
return 1;
diff --git a/arch/arm/mach-omap2/memory.c b/arch/arm/mach-omap2/memory.c
index 3e5d8cd..7b44a96 100644
--- a/arch/arm/mach-omap2/memory.c
+++ b/arch/arm/mach-omap2/memory.c
@@ -27,9 +27,10 @@
#include <asm/arch/clock.h>
#include <asm/arch/sram.h>
-#include "prcm-regs.h"
#include "memory.h"
+#include "sdrc.h"
+#define SMS_SYSCONFIG (SMS_BASE + 0x010)
static struct memory_timings mem_timings;
@@ -53,7 +54,7 @@ void omap2_init_memory_params(u32 force_lock_to_unlock_mode)
unsigned long dll_cnt;
u32 fast_dll = 0;
- mem_timings.m_type = !((SDRC_MR_0 & 0x3) == 0x1); /* DDR = 1, SDR = 0 */
+ mem_timings.m_type = !((sdrc_read_reg(SDRC_MR_0) & 0x3) == 0x1); /* DDR = 1, SDR = 0 */
/* 2422 es2.05 and beyond has a single SIP DDR instead of 2 like others.
* In the case of 2422, its ok to use CS1 instead of CS0.
@@ -73,11 +74,11 @@ void omap2_init_memory_params(u32 force_lock_to_unlock_mode)
mem_timings.dll_mode = M_LOCK;
if (mem_timings.base_cs == 0) {
- fast_dll = SDRC_DLLA_CTRL;
- dll_cnt = SDRC_DLLA_STATUS & 0xff00;
+ fast_dll = sdrc_read_reg(SDRC_DLLA_CTRL);
+ dll_cnt = sdrc_read_reg(SDRC_DLLA_STATUS) & 0xff00;
} else {
- fast_dll = SDRC_DLLB_CTRL;
- dll_cnt = SDRC_DLLB_STATUS & 0xff00;
+ fast_dll = sdrc_read_reg(SDRC_DLLB_CTRL);
+ dll_cnt = sdrc_read_reg(SDRC_DLLB_STATUS) & 0xff00;
}
if (force_lock_to_unlock_mode) {
fast_dll &= ~0xff00;
@@ -106,14 +107,14 @@ void __init omap2_init_memory(void)
{
u32 l;
- l = SMS_SYSCONFIG;
+ l = omap_readl(SMS_SYSCONFIG);
l &= ~(0x3 << 3);
l |= (0x2 << 3);
- SMS_SYSCONFIG = l;
+ omap_writel(l, SMS_SYSCONFIG);
- l = SDRC_SYSCONFIG;
+ l = sdrc_read_reg(SDRC_SYSCONFIG);
l &= ~(0x3 << 3);
l |= (0x2 << 3);
- SDRC_SYSCONFIG = l;
+ sdrc_write_reg(l, SDRC_SYSCONFIG);
}
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index 887c95d..931ad86 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -46,6 +46,8 @@
#include <asm/arch/board.h>
#include <asm/arch/gpio.h>
+#include "sdrc.h"
+
#define PRCM_REVISION 0x000
#define PRCM_SYSCONFIG 0x010
#define PRCM_IRQSTATUS_MPU 0x018
@@ -141,7 +143,7 @@
#define PM_PWSTST_DSP 0x8e4
static void (*omap2_sram_idle)(void);
-static void (*omap2_sram_suspend)(int dllctrl);
+static void (*omap2_sram_suspend)(void __iomem *dllctrl);
static void (*saved_idle)(void);
static u32 prcm_base = IO_ADDRESS(PRCM_BASE);
@@ -438,7 +440,6 @@ static struct subsys_attribute sleep_while_idle_attr = {
static struct clk *osc_ck, *emul_ck;
#define CONTROL_DEVCONF __REG32(0x48000274)
-#define SDRC_DLLA_CTRL __REG32(0x68009060)
static int omap2_fclks_active(void)
{
@@ -516,7 +517,7 @@ static void omap2_enter_full_retention(void)
serial_console_sleep(1);
/* Jump to SRAM suspend code */
- omap2_sram_suspend(SDRC_DLLA_CTRL);
+ omap2_sram_suspend(OMAP_SDRC_REGADDR(SDRC_DLLA_CTRL));
no_sleep:
serial_console_sleep(0);
--
1.5.1.3
--
^ permalink raw reply related [flat|nested] 5+ messages in thread