public inbox for linux-omap@vger.kernel.org
 help / color / mirror / Atom feed
* dss2 dvfs fix.
@ 2007-06-21  1:48 Woodruff, Richard
  2007-06-21 11:47 ` Tony Lindgren
  0 siblings, 1 reply; 2+ messages in thread
From: Woodruff, Richard @ 2007-06-21  1:48 UTC (permalink / raw)
  To: linux-omap-open-source

Hi,

While testing low power refresh I noticed the DSS2 clock setting wasn't
being perserved across DVFS changes.  The below makes sure to not change
the source for DSS2.

Signed-off-by: Richard Woodruff  <r-woodruff2@ti.com>

diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index f6da2bd..a7792d3 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -995,7 +995,7 @@ static int omap2_clk_set_parent(struct clk *clk,
struct clk *new_parent)
 /* Sets basic clocks based on the specified rate */
 static int omap2_select_table_rate(struct clk * clk, unsigned long
rate)
 {
-	u32 flags, cur_rate, done_rate, bypass = 0;
+	u32 flags, cur_rate, done_rate, bypass = 0, tmp;
 	u8 cpu_mask = 0;
 	struct prcm_config *prcm;
 	unsigned long found_speed = 0;
@@ -1056,7 +1056,8 @@ static int omap2_select_table_rate(struct clk *
clk, unsigned long rate)
 		cm_write_mod_reg(prcm->cm_clksel_gfx, GFX_MOD,
CM_CLKSEL);
 
 		/* Major subsystem dividers */
-		cm_write_mod_reg(prcm->cm_clksel1_core, CORE_MOD,
CM_CLKSEL1);
+		tmp = cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) & 0x2000;
+		cm_write_mod_reg(prcm->cm_clksel1_core | tmp, CORE_MOD,
CM_CLKSEL1);
 		if (cpu_is_omap2430())
 			cm_write_mod_reg(prcm->cm_clksel_mdm,
 					 OMAP2430_MDM_MOD, CM_CLKSEL);


Regards,
Richard W.

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: dss2 dvfs fix.
  2007-06-21  1:48 dss2 dvfs fix Woodruff, Richard
@ 2007-06-21 11:47 ` Tony Lindgren
  0 siblings, 0 replies; 2+ messages in thread
From: Tony Lindgren @ 2007-06-21 11:47 UTC (permalink / raw)
  To: Woodruff, Richard; +Cc: linux-omap-open-source

* Woodruff, Richard <r-woodruff2@ti.com> [070620 18:49]:
> Hi,
> 
> While testing low power refresh I noticed the DSS2 clock setting wasn't
> being perserved across DVFS changes.  The below makes sure to not change
> the source for DSS2.
> 
> Signed-off-by: Richard Woodruff  <r-woodruff2@ti.com>
> 
> diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
> index f6da2bd..a7792d3 100644
> --- a/arch/arm/mach-omap2/clock.c
> +++ b/arch/arm/mach-omap2/clock.c
> @@ -995,7 +995,7 @@ static int omap2_clk_set_parent(struct clk *clk,
> struct clk *new_parent)
>  /* Sets basic clocks based on the specified rate */
>  static int omap2_select_table_rate(struct clk * clk, unsigned long
> rate)
>  {
> -	u32 flags, cur_rate, done_rate, bypass = 0;
> +	u32 flags, cur_rate, done_rate, bypass = 0, tmp;
>  	u8 cpu_mask = 0;
>  	struct prcm_config *prcm;
>  	unsigned long found_speed = 0;
> @@ -1056,7 +1056,8 @@ static int omap2_select_table_rate(struct clk *
> clk, unsigned long rate)
>  		cm_write_mod_reg(prcm->cm_clksel_gfx, GFX_MOD,
> CM_CLKSEL);
>  
>  		/* Major subsystem dividers */
> -		cm_write_mod_reg(prcm->cm_clksel1_core, CORE_MOD,
> CM_CLKSEL1);
> +		tmp = cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) & 0x2000;
> +		cm_write_mod_reg(prcm->cm_clksel1_core | tmp, CORE_MOD,
> CM_CLKSEL1);
>  		if (cpu_is_omap2430())
>  			cm_write_mod_reg(prcm->cm_clksel_mdm,
>  					 OMAP2430_MDM_MOD, CM_CLKSEL);

Thanks, pushing today. Patch was wrapped BTW...

Tony

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2007-06-21 11:47 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2007-06-21  1:48 dss2 dvfs fix Woodruff, Richard
2007-06-21 11:47 ` Tony Lindgren

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox