From: Paul Walmsley <paul@pwsan.com>
To: linux-omap-open-source@linux.omap.com
Subject: [PATCH 08/27] omap2 clock: convert omap2_clksel_to_divisor and omap2_divisor_to_clksel to use new clksel struct
Date: Mon, 27 Aug 2007 02:39:04 -0600 [thread overview]
Message-ID: <20070827084122.863067382@pwsan.com> (raw)
In-Reply-To: 20070827083856.549249288@pwsan.com
[-- Attachment #1: add_gcbp_convert_c2d_d2c.patch --]
[-- Type: text/plain, Size: 6446 bytes --]
Convert omap2_clksel_to_divisor() and omap2_divisor_to_clksel() to use
the new struct clksel and struct clksel_rate data. Add
omap2_get_clksel_by_parent() utility code, called by both functions,
to return the appropriate struct clksel for a given (struct clk, parent
struct clk) combination.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/clock.c | 132 +++++++++++++++++++++++++++++++++-----------
arch/arm/mach-omap2/clock.h | 3 -
2 files changed, 102 insertions(+), 33 deletions(-)
Index: linux-omap/arch/arm/mach-omap2/clock.c
===================================================================
--- linux-omap.orig/arch/arm/mach-omap2/clock.c 2007-08-27 02:19:29.000000000 -0600
+++ linux-omap/arch/arm/mach-omap2/clock.c 2007-08-27 02:19:30.000000000 -0600
@@ -498,6 +498,38 @@
return ~0; /* No acceptable divider */
}
+/**
+ * omap2_get_clksel_by_parent - return clksel struct for a given clk & parent
+ * @clk: OMAP struct clk ptr to inspect
+ * @src_clk: OMAP struct clk ptr of the parent clk to search for
+ *
+ * Scan the struct clksel array associated with the clock to find
+ * the element associated with the supplied parent clock address.
+ * Returns a pointer to the struct clksel on success or NULL on error.
+ */
+const static struct clksel *omap2_get_clksel_by_parent(struct clk *clk,
+ struct clk *src_clk)
+{
+ const struct clksel *clks;
+
+ if (!clk->clksel)
+ return NULL;
+
+ for (clks = clk->clksel; clks->parent; clks++) {
+ if (clks->parent == src_clk)
+ break; /* Found the requested parent */
+ }
+
+ if (!clks->parent) {
+ printk(KERN_ERR "clock: Could not find parent clock %s in "
+ "clksel array of clock %s\n", src_clk->name,
+ clk->name);
+ return NULL;
+ }
+
+ return clks;
+}
+
/*
* Find divisor for the given clock and target rate.
*
@@ -684,38 +716,74 @@
return highest_rate;
}
-/*
- * omap2_clksel_to_divisor() - turn field value into integer divider
+/**
+ * omap2_clksel_to_divisor() - turn clksel field value into integer divider
+ * @clk: OMAP struct clk to use
+ * @field_val: register field value to find
+ *
+ * Given a struct clk of a rate-selectable clksel clock, and a register field
+ * value to search for, find the corresponding clock divisor. The register
+ * field value should be pre-masked and shifted down so the LSB is at bit 0
+ * before calling. Returns 0 on error
*/
-static u32 omap2_clksel_to_divisor(u32 div_sel, u32 field_val)
+static u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val)
{
- u32 i;
+ const struct clksel *clks;
+ const struct clksel_rate *clkr;
- if ((div_sel & SRC_RATE_SEL_MASK) == CM_SYSCLKOUT_SEL1) {
- for (i = 0; i < ARRAY_SIZE(sysclkout_div); i++) {
- if (field_val == i)
- return sysclkout_div[i];
- }
+ clks = omap2_get_clksel_by_parent(clk, clk->parent);
+ if (clks == NULL)
return 0;
- } else
- return field_val;
+
+ for (clkr = clks->rates; clkr->div; clkr++) {
+ if ((clkr->flags & cpu_mask) && (clkr->val == field_val))
+ break;
+ }
+
+ if (!clkr->div) {
+ printk(KERN_ERR "clock: Could not find fieldval %d for "
+ "clock %s parent %s\n", field_val, clk->name,
+ clk->parent->name);
+ return 0;
+ }
+
+ return clkr->div;
}
-/*
- * omap2_divisor_to_clksel() - turn integer divider into field value
+/**
+ * omap2_divisor_to_clksel() - turn clksel integer divisor into a field value
+ * @clk: OMAP struct clk to use
+ * @div: integer divisor to search for
+ *
+ * Given a struct clk of a rate-selectable clksel clock, and a clock divisor,
+ * find the corresponding register field value. The return register value is
+ * the value before left-shifting. Returns 0xffffffff on error
*/
-static u32 omap2_divisor_to_clksel(u32 div_sel, u32 div)
+static u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
{
- u32 i;
+ const struct clksel *clks;
+ const struct clksel_rate *clkr;
+
+ /* should never happen */
+ WARN_ON(div == 0);
- if ((div_sel & SRC_RATE_SEL_MASK) == CM_SYSCLKOUT_SEL1) {
- for (i = 0; i < ARRAY_SIZE(sysclkout_div); i++) {
- if (div == sysclkout_div[i])
- return i;
- }
- return ~0;
- } else
- return div;
+ clks = omap2_get_clksel_by_parent(clk, clk->parent);
+ if (clks == NULL)
+ return 0;
+
+ for (clkr = clks->rates; clkr->div; clkr++) {
+ if ((clkr->flags & cpu_mask) && (clkr->div == div))
+ break;
+ }
+
+ if (!clkr->div) {
+ printk(KERN_ERR "clock: Could not find divisor %d for "
+ "clock %s parent %s\n", div, clk->name,
+ clk->parent->name);
+ return 0;
+ }
+
+ return clkr->val;
}
/*
@@ -801,13 +869,15 @@
}
-/*
- * Return divider to be applied to parent clock.
- * Return 0 on error.
+/**
+ * omap2_clksel_get_divisor - get current divider applied to parent clock.
+ * @clk: OMAP struct clk to use.
+ *
+ * Returns the integer divisor upon success or 0 on error.
*/
static u32 omap2_clksel_get_divisor(struct clk *clk)
{
- u32 div, field_mask, field_val;
+ u32 field_mask, field_val;
void __iomem *div_addr;
div_addr = omap2_get_clksel(&field_mask, clk);
@@ -815,11 +885,9 @@
return 0;
field_val = cm_read_reg(div_addr) & field_mask;
- field_val >>= clk->rate_offset;
-
- div = omap2_clksel_to_divisor(clk->flags, field_val);
+ field_val >>= mask_to_shift(field_mask);
- return div;
+ return omap2_clksel_to_divisor(clk, field_val);
}
/* Set the clock rate for a clock source */
@@ -845,7 +913,7 @@
if (div_addr == 0)
return ret;
- field_val = omap2_divisor_to_clksel(clk->flags, new_div);
+ field_val = omap2_divisor_to_clksel(clk, new_div);
if (field_val == ~0)
return ret;
Index: linux-omap/arch/arm/mach-omap2/clock.h
===================================================================
--- linux-omap.orig/arch/arm/mach-omap2/clock.h 2007-08-27 02:19:29.000000000 -0600
+++ linux-omap/arch/arm/mach-omap2/clock.h 2007-08-27 02:19:30.000000000 -0600
@@ -30,8 +30,9 @@
static void omap2_clk_disable(struct clk *clk);
static void omap2_sys_clk_recalc(struct clk * clk);
static void omap2_init_clksel_parent(struct clk *clk);
-static u32 omap2_clksel_to_divisor(u32 div_sel, u32 field_val);
static u32 omap2_clksel_get_divisor(struct clk *clk);
+static u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val);
+static u32 omap2_divisor_to_clksel(struct clk *clk, u32 div);
static void omap2_dpll_recalc(struct clk *clk);
static void omap2_fixed_divisor_recalc(struct clk *clk);
--
next prev parent reply other threads:[~2007-08-27 8:39 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-08-27 8:38 [PATCH 00/27] omap2 clock: resend: framework generalization, cleanup Paul Walmsley
2007-08-27 8:38 ` [PATCH 01/27] omap2 clock: dsp_ick parent is dsp_fck, not core_ck Paul Walmsley
2007-08-27 8:38 ` [PATCH 02/27] omap2 clock: generalize initial clock rate setup: recalculate_root_clocks() Paul Walmsley
2007-08-27 8:38 ` [PATCH 03/27] omap2 clock: mark onchip_clksas __initdata Paul Walmsley
2007-08-27 8:39 ` [PATCH 04/27] omap2 clock: remove superfluous omap2_propagate_rate() Paul Walmsley
2007-08-27 8:39 ` [PATCH 05/27] omap2 clock: rename, add comment to omap2_mpu_recalc() Paul Walmsley
2007-08-27 8:39 ` [PATCH 06/27] omap2 clock: add clksel and clksel_rate data Paul Walmsley
2007-08-27 8:39 ` [PATCH 07/27] omap2 clock: init clksel clock parents to hardware reality at clock init Paul Walmsley
2007-08-27 8:39 ` Paul Walmsley [this message]
2007-08-27 8:39 ` [PATCH 09/27] omap2 clock: convert omap2_clksel_round_rate to use new clksel struct Paul Walmsley
2007-08-27 8:39 ` [PATCH 10/27] omap2 clock: convert omap2_get_clksel " Paul Walmsley
2007-08-27 8:39 ` [PATCH 11/27] omap2 clock: convert omap2_clksel_get_src_field() " Paul Walmsley
2007-08-27 8:39 ` [PATCH 12/27] omap2 clock: stop using clk->src_offset in omap2_clk_set_rate() Paul Walmsley
2007-08-27 8:39 ` [PATCH 13/27] omap2 clock: stop using clk->src_offset in omap2_clk_set_parent() Paul Walmsley
2007-08-27 8:39 ` [PATCH 14/27] omap2 clock: clean out old code from omap2_clksel_recalc() Paul Walmsley
2007-08-27 8:39 ` [PATCH 15/27] omap2 clock: convert remaining clksel clocks to use omap2_clksel_recalc Paul Walmsley
2007-08-27 8:39 ` [PATCH 16/27] omap2 clock: remove all {src, rate}_offset fields from struct clk Paul Walmsley
2007-08-27 8:39 ` [PATCH 17/27] omap2 clock: use the struct clk round_rate field for clksel rate rounding code Paul Walmsley
2007-08-27 8:39 ` [PATCH 18/27] omap2 clock: separate clksel set_rate code into its own function Paul Walmsley
2007-08-27 8:39 ` [PATCH 19/27] omap2 clock: drop RATE_CKCTL from all OMAP2 clocks Paul Walmsley
2007-08-27 8:39 ` [PATCH 20/27] omap2 clock: remove *_SEL* clock flags Paul Walmsley
2007-08-27 8:39 ` [PATCH 21/27] omap2 clock: call clock-specific enable/disable functions if present Paul Walmsley
2007-08-27 8:39 ` [PATCH 22/27] omap2 clock: use custom osc_ck enable/disable routines Paul Walmsley
2007-08-27 8:39 ` [PATCH 23/27] omap2 clock: use standard clk->enable/disable for APLLs Paul Walmsley
2007-08-27 8:39 ` [PATCH 24/27] omap2 clock: replace omap2_get_crystal_rate() with clock-specific recalc code Paul Walmsley
2007-08-27 8:39 ` [PATCH 25/27] omap2 clock: Standardize DPLL rate recalculation with struct dpll_data Paul Walmsley
2007-08-27 8:39 ` [PATCH 26/27] omap2 clock: generalize clock enable upon framework initialization Paul Walmsley
2007-08-27 8:39 ` [PATCH 27/27] omap2 clock: add three missing clocks: gpmc_fck, sdma_{i, f}ck Paul Walmsley
2007-08-31 18:24 ` [PATCH 00/27] omap2 clock: resend: framework generalization, cleanup Tony Lindgren
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