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From: Tony Lindgren <tony@atomide.com>
To: "Woodruff, Richard" <r-woodruff2@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>, linux-omap-open-source@linux.omap.com
Subject: Re: [PATCH 0/5] SRAM patcher: patch register addresses in SRAM code atruntime
Date: Fri, 16 Nov 2007 14:35:20 -0800	[thread overview]
Message-ID: <20071116223519.GJ32675@atomide.com> (raw)
In-Reply-To: <3B6D69C3A9EBCA4BA5DA60D9130274290282B603@dlee13.ent.ti.com>

* Woodruff, Richard <r-woodruff2@ti.com> [071116 11:48]:
> Hi Paul,
> 
> > On Wed, 14 Nov 2007, Woodruff, Richard wrote:
> > 
> > > -*- This code as written today likely won't be used on OMAP3 anyway as
> > > the DVFS procedure will be different.  The SRAM code usage can be much
> > > smaller and should also be different.
> > > The aim of making it single kernel for OMAP2 to OMAP3 in this case is
> > > just using the SRAM function for pushing the correct SRAM routine.
> > 
> > Yeah, agreed.  The main motivation was to share 2420/2430 code here.  I'm
> > hoping that there may be some 3430 sharing that can be done also, perhaps
> > some of the SDRAM timing change code, but there's probably other code that
> > won't be sharable without contortions.
> 
> Yes it would work here.  However, like I was hinting there is another method which 2430's which have been characterized, could try.  But that is something else.
> 
> > > - Well that does look fine.  It kind of feels like a gratuitous cache
> > > range flush should be added.  But as its all data side patches it
> > > probably can live with out it.  The initial code copy should probably
> > > have this.  Caches are VIPT, which means you almost don't have to flush,
> > > but you still do, but it can be in a more optimal way at run time.
> > 
> > Want to do a patch for omap_sram_push()?  I suppose we're getting away
> > without it now because nothing is running from SRAM before
> > omap_sram_push(), and therefore isn't in I$?  sounds like it should be
> > there, though.
> 
> It probably needs to be there.  The reason for getting away is this is init time stuff not so dynamic, and VIPT means there is only a chance of a conflict.  On say an OMAP1 with a VIVT cache it would be a bigger possible problem.
> 
> I think in our older images it was non-cached also.  In current GIT its MT_MEMORY so it will be.
> 
> Its kind of low in things to do today but I might file it away to do.  Right now sram only has a push and no pop so its not so dynamic either.

Yeah and we may want to start using SRAM dynamically too at some
point. Pushing Paul's patches today.

Tony

  reply	other threads:[~2007-11-16 22:35 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-11-14  8:30 [PATCH 0/5] SRAM patcher: patch register addresses in SRAM code at runtime Paul Walmsley
2007-11-14  8:30 ` [PATCH 1/5] SRAM patcher: add SRAM virtual address patcher Paul Walmsley
2007-11-14  8:30 ` [PATCH 2/5] SRAM patcher: convert omap24xx_sram_suspend to use runtime SRAM patcher Paul Walmsley
2007-11-14  8:30 ` [PATCH 3/5] SRAM patcher: convert sram_ddr_init " Paul Walmsley
2007-11-14  8:30 ` [PATCH 4/5] SRAM patcher: convert sram_reprogram_sdrc " Paul Walmsley
2007-11-14  8:30 ` [PATCH 5/5] SRAM patcher: convert omap2_set_prcm " Paul Walmsley
2007-11-14 17:38 ` [PATCH 0/5] SRAM patcher: patch register addresses in SRAM code at runtime Kevin Hilman
2007-11-14 19:12 ` [PATCH 0/5] SRAM patcher: patch register addresses in SRAM code atruntime Woodruff, Richard
2007-11-16 19:33   ` Paul Walmsley
2007-11-16 19:42     ` Woodruff, Richard
2007-11-16 22:35       ` Tony Lindgren [this message]
2007-11-19 19:11       ` [PATCH] flush I-cache after omap_sram_push() Paul Walmsley
2007-11-20 16:14         ` Woodruff, Richard
2007-11-23 21:15           ` Tony Lindgren

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