* [PATCH 0/14] Omap patches for post 2.6.25 @ 2008-03-17 9:42 Tony Lindgren 2008-03-17 9:42 ` [PATCH 1/14] ARM: OMAP: Use gpiolib Tony Lindgren 0 siblings, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel; +Cc: linux-omap, Tony Lindgren Hi all, Attached are patches for common omap code and omap1 specific code for post 2.6.25 for review. The patches contain updates for gpiolib, timers and pin multiplexing. The patch for TPS65010 I2C driver is included in this series as it involves some board updates also. This has been discussed already on the I2C list, and it's OK with Jean [1]. I'm still working on patch set for arch/arm/mach-omap2, and will post it within next few days. Regards, Tony [1] http://lists.lm-sensors.org/pipermail/i2c/2008-March/003031.html ^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 1/14] ARM: OMAP: Use gpiolib 2008-03-17 9:42 [PATCH 0/14] Omap patches for post 2.6.25 Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 2008-03-17 9:42 ` [PATCH 2/14] ARM: OMAP: 5912 OSK GPIO updates Tony Lindgren 0 siblings, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel; +Cc: linux-omap, David Brownell, Tony Lindgren From: David Brownell <dbrownell@users.sourceforge.net> Update OMAP to use the new GPIO implementation framework. This is just a quick'n'dirty update ... more code could now be removed, ideally as part of cleaning up the entire OMAP GPIO infrastructure ... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/Kconfig | 1 + arch/arm/plat-omap/gpio.c | 107 +++++++++++++++++++++++++++++++------ include/asm-arm/arch-omap/gpio.h | 57 +++++--------------- 3 files changed, 105 insertions(+), 60 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4039a13..992028f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -468,6 +468,7 @@ config ARCH_DAVINCI config ARCH_OMAP bool "TI OMAP" select GENERIC_GPIO + select HAVE_GPIO_LIB select GENERIC_TIME select GENERIC_CLOCKEVENTS help diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 8c78e4e..56889fd 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -136,7 +136,6 @@ struct gpio_bank { u16 irq; u16 virtual_irq_start; int method; - u32 reserved_map; #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) u32 suspend_wakeup; u32 saved_wakeup; @@ -150,6 +149,7 @@ struct gpio_bank { u32 saved_risingdetect; #endif spinlock_t lock; + struct gpio_chip chip; }; #define METHOD_MPUIO 0 @@ -903,19 +903,17 @@ int omap_request_gpio(int gpio) { struct gpio_bank *bank; unsigned long flags; + int status; if (check_gpio(gpio) < 0) return -EINVAL; + status = gpio_request(gpio, NULL); + if (status < 0) + return status; + bank = get_gpio_bank(gpio); spin_lock_irqsave(&bank->lock, flags); - if (unlikely(bank->reserved_map & (1 << get_gpio_index(gpio)))) { - printk(KERN_ERR "omap-gpio: GPIO %d is already reserved!\n", gpio); - dump_stack(); - spin_unlock_irqrestore(&bank->lock, flags); - return -1; - } - bank->reserved_map |= (1 << get_gpio_index(gpio)); /* Set trigger to none. You need to enable the desired trigger with * request_irq() or set_irq_type(). @@ -945,10 +943,11 @@ void omap_free_gpio(int gpio) return; bank = get_gpio_bank(gpio); spin_lock_irqsave(&bank->lock, flags); - if (unlikely(!(bank->reserved_map & (1 << get_gpio_index(gpio))))) { + if (unlikely(!gpiochip_is_requested(&bank->chip, + get_gpio_index(gpio)))) { + spin_unlock_irqrestore(&bank->lock, flags); printk(KERN_ERR "omap-gpio: GPIO %d wasn't reserved!\n", gpio); dump_stack(); - spin_unlock_irqrestore(&bank->lock, flags); return; } #ifdef CONFIG_ARCH_OMAP16XX @@ -965,9 +964,9 @@ void omap_free_gpio(int gpio) __raw_writel(1 << get_gpio_index(gpio), reg); } #endif - bank->reserved_map &= ~(1 << get_gpio_index(gpio)); _reset_gpio(bank, gpio); spin_unlock_irqrestore(&bank->lock, flags); + gpio_free(gpio); } /* @@ -1266,6 +1265,53 @@ static inline void mpuio_init(void) {} /*---------------------------------------------------------------------*/ +/* REVISIT these are stupid implementations! replace by ones that + * don't switch on METHOD_* and which mostly avoid spinlocks + */ + +static int gpio_input(struct gpio_chip *chip, unsigned offset) +{ + struct gpio_bank *bank; + unsigned long flags; + + bank = container_of(chip, struct gpio_bank, chip); + spin_lock_irqsave(&bank->lock, flags); + _set_gpio_direction(bank, offset, 1); + spin_unlock_irqrestore(&bank->lock, flags); + return 0; +} + +static int gpio_get(struct gpio_chip *chip, unsigned offset) +{ + return omap_get_gpio_datain(chip->base + offset); +} + +static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) +{ + struct gpio_bank *bank; + unsigned long flags; + + bank = container_of(chip, struct gpio_bank, chip); + spin_lock_irqsave(&bank->lock, flags); + _set_gpio_dataout(bank, offset, value); + _set_gpio_direction(bank, offset, 0); + spin_unlock_irqrestore(&bank->lock, flags); + return 0; +} + +static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) +{ + struct gpio_bank *bank; + unsigned long flags; + + bank = container_of(chip, struct gpio_bank, chip); + spin_lock_irqsave(&bank->lock, flags); + _set_gpio_dataout(bank, offset, value); + spin_unlock_irqrestore(&bank->lock, flags); +} + +/*---------------------------------------------------------------------*/ + static int initialized; #if !defined(CONFIG_ARCH_OMAP3) static struct clk * gpio_ick; @@ -1293,6 +1339,7 @@ static struct lock_class_key gpio_lock_class; static int __init _omap_gpio_init(void) { int i; + int gpio = 0; struct gpio_bank *bank; #if defined(CONFIG_ARCH_OMAP3) char clk_name[11]; @@ -1423,7 +1470,6 @@ static int __init _omap_gpio_init(void) int j, gpio_count = 16; bank = &gpio_bank[i]; - bank->reserved_map = 0; bank->base = IO_ADDRESS(bank->base); spin_lock_init(&bank->lock); if (bank_is_mpuio(bank)) @@ -1461,6 +1507,26 @@ static int __init _omap_gpio_init(void) gpio_count = 32; } #endif + + /* REVISIT eventually switch from OMAP-specific gpio structs + * over to the generic ones + */ + bank->chip.direction_input = gpio_input; + bank->chip.get = gpio_get; + bank->chip.direction_output = gpio_output; + bank->chip.set = gpio_set; + if (bank_is_mpuio(bank)) { + bank->chip.label = "mpuio"; + bank->chip.base = OMAP_MPUIO(0); + } else { + bank->chip.label = "gpio"; + bank->chip.base = gpio; + gpio += gpio_count; + } + bank->chip.ngpio = gpio_count; + + gpiochip_add(&bank->chip); + for (j = bank->virtual_irq_start; j < bank->virtual_irq_start + gpio_count; j++) { lockdep_set_class(&irq_desc[j].lock, &gpio_lock_class); @@ -1757,8 +1823,10 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) { unsigned irq, value, is_in, irqstat; + const char *label; - if (!(bank->reserved_map & mask)) + label = gpiochip_is_requested(&bank->chip, j); + if (!label) continue; irq = bank->virtual_irq_start + j; @@ -1766,13 +1834,16 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) is_in = gpio_is_input(bank, mask); if (bank_is_mpuio(bank)) - seq_printf(s, "MPUIO %2d: ", j); + seq_printf(s, "MPUIO %2d ", j); else - seq_printf(s, "GPIO %3d: ", gpio); - seq_printf(s, "%s %s", + seq_printf(s, "GPIO %3d ", gpio); + seq_printf(s, "(%10s): %s %s", + label, is_in ? "in " : "out", value ? "hi" : "lo"); +/* FIXME for at least omap2, show pullup/pulldown state */ + irqstat = irq_desc[irq].status; if (is_in && ((bank->suspend_wakeup & mask) || irqstat & IRQ_TYPE_SENSE_MASK)) { @@ -1795,10 +1866,10 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) trigger = "high"; break; case IRQ_TYPE_NONE: - trigger = "(unspecified)"; + trigger = "(?)"; break; } - seq_printf(s, ", irq-%d %s%s", + seq_printf(s, ", irq-%d %-8s%s", irq, trigger, (bank->suspend_wakeup & mask) ? " wakeup" : ""); diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h index 164da09..86621a0 100644 --- a/include/asm-arm/arch-omap/gpio.h +++ b/include/asm-arm/arch-omap/gpio.h @@ -82,62 +82,35 @@ extern void omap_set_gpio_debounce_time(int gpio, int enable); /*-------------------------------------------------------------------------*/ -/* wrappers for "new style" GPIO calls. the old OMAP-specfic ones should - * eventually be removed (along with this errno.h inclusion), and maybe - * gpios should put MPUIOs last too. +/* Wrappers for "new style" GPIO calls, using the new infrastructure + * which lets us plug in FPGA, I2C, and other implementations. + * * + * The original OMAP-specfic calls should eventually be removed. */ -#include <asm/errno.h> - -static inline int gpio_request(unsigned gpio, const char *label) -{ - return omap_request_gpio(gpio); -} - -static inline void gpio_free(unsigned gpio) -{ - omap_free_gpio(gpio); -} - -static inline int __gpio_set_direction(unsigned gpio, int is_input) -{ - if (cpu_class_is_omap2()) { - if (gpio > OMAP_MAX_GPIO_LINES) - return -EINVAL; - } else { - if (gpio > (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)) - return -EINVAL; - } - omap_set_gpio_direction(gpio, is_input); - return 0; -} - -static inline int gpio_direction_input(unsigned gpio) -{ - return __gpio_set_direction(gpio, 1); -} - -static inline int gpio_direction_output(unsigned gpio, int value) -{ - omap_set_gpio_dataout(gpio, value); - return __gpio_set_direction(gpio, 0); -} +#include <linux/errno.h> +#include <asm-generic/gpio.h> static inline int gpio_get_value(unsigned gpio) { - return omap_get_gpio_datain(gpio); + return __gpio_get_value(gpio); } static inline void gpio_set_value(unsigned gpio, int value) { - omap_set_gpio_dataout(gpio, value); + __gpio_set_value(gpio, value); } -#include <asm-generic/gpio.h> /* cansleep wrappers */ +static inline int gpio_cansleep(unsigned gpio) +{ + return __gpio_cansleep(gpio); +} static inline int gpio_to_irq(unsigned gpio) { - return OMAP_GPIO_IRQ(gpio); + if (gpio < (OMAP_MAX_GPIO_LINES + 16)) + return OMAP_GPIO_IRQ(gpio); + return -EINVAL; } static inline int irq_to_gpio(unsigned irq) -- 1.5.3.6 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 2/14] ARM: OMAP: 5912 OSK GPIO updates 2008-03-17 9:42 ` [PATCH 1/14] ARM: OMAP: Use gpiolib Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 2008-03-17 9:42 ` [PATCH 3/14] ARM: OMAP: I2C: tps65010 driver converts to gpiolib Tony Lindgren 0 siblings, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel Cc: linux-omap, David Brownell, David Brownell, Tony Lindgren From: David Brownell <david-b@pacbell.net> Start cleaning up GPIO handling for OMAP5912 OSK board: - Initialize GPIOs using the cross-platform calls, not the old OMAP-private ones. - Move touchscreen setup out of ads7846 code into board-specfic setup code, where it belongs. This doesn't depend on the patches to update OMAP to use the gpiolib implementation framework. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/mach-omap1/board-osk.c | 30 ++++++++++++++----------- drivers/input/touchscreen/ads7846.c | 40 ----------------------------------- 2 files changed, 17 insertions(+), 53 deletions(-) diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 5279e35..dd9ece8 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -198,7 +198,7 @@ static struct i2c_board_info __initdata osk_i2c_board_info[] = { static void __init osk_init_smc91x(void) { - if ((omap_request_gpio(0)) < 0) { + if ((gpio_request(0, "smc_irq")) < 0) { printk("Error requesting gpio 0 for smc91x irq\n"); return; } @@ -210,7 +210,7 @@ static void __init osk_init_smc91x(void) static void __init osk_init_cf(void) { omap_cfg_reg(M7_1610_GPIO62); - if ((omap_request_gpio(62)) < 0) { + if ((gpio_request(62, "cf_irq")) < 0) { printk("Error requesting gpio 62 for CF irq\n"); return; } @@ -334,7 +334,7 @@ static struct platform_device *mistral_devices[] __initdata = { static int mistral_get_pendown_state(void) { - return !omap_get_gpio_datain(4); + return !gpio_get_value(4); } static const struct ads7846_platform_data mistral_ts_info = { @@ -396,25 +396,31 @@ static void __init osk_mistral_init(void) omap_cfg_reg(W14_1610_CCP_DATAP); /* CAM_PWDN */ - if (omap_request_gpio(11) == 0) { + if (gpio_request(11, "cam_pwdn") == 0) { omap_cfg_reg(N20_1610_GPIO11); - omap_set_gpio_direction(11, 0 /* out */); - omap_set_gpio_dataout(11, 0 /* off */); + gpio_direction_output(11, 0); } else pr_debug("OSK+Mistral: CAM_PWDN is awol\n"); /* omap_cfg_reg(P19_1610_GPIO6); */ /* BUSY */ + gpio_request(6, "ts_busy"); + gpio_direction_input(6); + omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */ + gpio_request(4, "ts_int"); + gpio_direction_input(4); set_irq_type(OMAP_GPIO_IRQ(4), IRQT_FALLING); + spi_register_board_info(mistral_boardinfo, ARRAY_SIZE(mistral_boardinfo)); /* the sideways button (SW1) is for use as a "wakeup" button */ omap_cfg_reg(N15_1610_MPUIO2); - if (omap_request_gpio(OMAP_MPUIO(2)) == 0) { + if (gpio_request(OMAP_MPUIO(2), "wakeup") == 0) { int ret = 0; - omap_set_gpio_direction(OMAP_MPUIO(2), 1); + + gpio_direction_input(OMAP_MPUIO(2)); set_irq_type(OMAP_GPIO_IRQ(OMAP_MPUIO(2)), IRQT_RISING); #ifdef CONFIG_PM /* share the IRQ in case someone wants to use the @@ -425,7 +431,7 @@ static void __init osk_mistral_init(void) IRQF_SHARED, "mistral_wakeup", &osk_mistral_wake_interrupt); if (ret != 0) { - omap_free_gpio(OMAP_MPUIO(2)); + gpio_free(OMAP_MPUIO(2)); printk(KERN_ERR "OSK+Mistral: no wakeup irq, %d?\n", ret); } else @@ -438,10 +444,8 @@ static void __init osk_mistral_init(void) * board, like the touchscreen, EEPROM, and wakeup (!) switch. */ omap_cfg_reg(PWL); - if (omap_request_gpio(2) == 0) { - omap_set_gpio_direction(2, 0 /* out */); - omap_set_gpio_dataout(2, 1 /* on */); - } + if (gpio_request(2, "lcd_pwr") == 0) + gpio_direction_output(2, 1); platform_add_devices(mistral_devices, ARRAY_SIZE(mistral_devices)); } diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c index 58934a4..7077090 100644 --- a/drivers/input/touchscreen/ads7846.c +++ b/drivers/input/touchscreen/ads7846.c @@ -28,13 +28,6 @@ #include <linux/spi/ads7846.h> #include <asm/irq.h> -#ifdef CONFIG_ARM -#include <asm/mach-types.h> -#ifdef CONFIG_ARCH_OMAP -#include <asm/arch/gpio.h> -#endif -#endif - /* * This code has been heavily tested on a Nokia 770, and lightly @@ -1174,31 +1167,6 @@ static struct spi_driver ads7846_driver = { static int __init ads7846_init(void) { - /* grr, board-specific init should stay out of drivers!! */ - -#ifdef CONFIG_ARCH_OMAP - if (machine_is_omap_osk()) { - /* GPIO4 = PENIRQ; GPIO6 = BUSY */ - omap_request_gpio(4); - omap_set_gpio_direction(4, 1); - omap_request_gpio(6); - omap_set_gpio_direction(6, 1); - } - // also TI 1510 Innovator, bitbanging through FPGA - // also Nokia 770 - // also Palm Tungsten T2 -#endif - - // PXA: - // also Dell Axim X50 - // also HP iPaq H191x/H192x/H415x/H435x - // also Intel Lubbock (additional to UCB1400; as temperature sensor) - // also Sharp Zaurus C7xx, C8xx (corgi/sheperd/husky) - - // Atmel at91sam9261-EK uses ads7843 - - // also various AMD Au1x00 devel boards - return spi_register_driver(&ads7846_driver); } module_init(ads7846_init); @@ -1206,14 +1174,6 @@ module_init(ads7846_init); static void __exit ads7846_exit(void) { spi_unregister_driver(&ads7846_driver); - -#ifdef CONFIG_ARCH_OMAP - if (machine_is_omap_osk()) { - omap_free_gpio(4); - omap_free_gpio(6); - } -#endif - } module_exit(ads7846_exit); -- 1.5.3.6 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 3/14] ARM: OMAP: I2C: tps65010 driver converts to gpiolib 2008-03-17 9:42 ` [PATCH 2/14] ARM: OMAP: 5912 OSK GPIO updates Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 2008-03-17 9:42 ` [PATCH 4/14] ARM: OMAP: Use gpiolib with tps65010 for OSK 5912 Tony Lindgren 0 siblings, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel Cc: linux-omap, David Brownell, David Brownell, i2c, Tony Lindgren From: David Brownell <david-b@pacbell.net> Make the tps65010 driver use gpiolib to expose its GPIOs. Note: This patch will get merged via omap tree instead of I2C as it will cause some board updates. This has been discussed at on the I2C list: http://lists.lm-sensors.org/pipermail/i2c/2008-March/003031.html Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Cc: i2c@lm-sensors.org Signed-off-by: Tony Lindgren <tony@atomide.com> --- drivers/i2c/chips/Kconfig | 1 + drivers/i2c/chips/tps65010.c | 101 +++++++++++++++++++++++++++++++++++++++++- include/linux/i2c/tps65010.h | 30 ++++++++++++ 3 files changed, 131 insertions(+), 1 deletions(-) diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig index b21593f..2da2edf 100644 --- a/drivers/i2c/chips/Kconfig +++ b/drivers/i2c/chips/Kconfig @@ -93,6 +93,7 @@ config ISP1301_OMAP config TPS65010 tristate "TPS6501x Power Management chips" + depends on HAVE_GPIO_LIB default y if MACH_OMAP_H2 || MACH_OMAP_H3 || MACH_OMAP_OSK help If you say yes here you get support for the TPS6501x series of diff --git a/drivers/i2c/chips/tps65010.c b/drivers/i2c/chips/tps65010.c index 4154a91..b67f69c 100644 --- a/drivers/i2c/chips/tps65010.c +++ b/drivers/i2c/chips/tps65010.c @@ -30,9 +30,13 @@ #include <linux/debugfs.h> #include <linux/seq_file.h> #include <linux/mutex.h> +#include <linux/platform_device.h> #include <linux/i2c/tps65010.h> +#include <asm/gpio.h> + + /*-------------------------------------------------------------------------*/ #define DRIVER_VERSION "2 May 2005" @@ -84,7 +88,9 @@ struct tps65010 { u8 chgstatus, regstatus, chgconf; u8 nmask1, nmask2; - /* not currently tracking GPIO state */ + u8 outmask; + struct gpio_chip chip; + struct platform_device *leds; }; #define POWER_POLL_DELAY msecs_to_jiffies(5000) @@ -449,12 +455,72 @@ static irqreturn_t tps65010_irq(int irq, void *_tps) /*-------------------------------------------------------------------------*/ +/* offsets 0..3 == GPIO1..GPIO4 + * offsets 4..5 == LED1/nPG, LED2 (we set one of the non-BLINK modes) + */ +static void +tps65010_gpio_set(struct gpio_chip *chip, unsigned offset, int value) +{ + if (offset < 4) + tps65010_set_gpio_out_value(offset + 1, value); + else + tps65010_set_led(offset - 3, value ? ON : OFF); +} + +static int +tps65010_output(struct gpio_chip *chip, unsigned offset, int value) +{ + /* GPIOs may be input-only */ + if (offset < 4) { + struct tps65010 *tps; + + tps = container_of(chip, struct tps65010, chip); + if (!(tps->outmask & (1 << offset))) + return -EINVAL; + tps65010_set_gpio_out_value(offset + 1, value); + } else + tps65010_set_led(offset - 3, value ? ON : OFF); + + return 0; +} + +static int tps65010_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + int value; + struct tps65010 *tps; + + tps = container_of(chip, struct tps65010, chip); + + if (offset < 4) { + value = i2c_smbus_read_byte_data(tps->client, TPS_DEFGPIO); + if (value < 0) + return 0; + if (value & (1 << (offset + 4))) /* output */ + return !(value & (1 << offset)); + else /* input */ + return (value & (1 << offset)); + } + + /* REVISIT we *could* report LED1/nPG and LED2 state ... */ + return 0; +} + + +/*-------------------------------------------------------------------------*/ + static struct tps65010 *the_tps; static int __exit tps65010_remove(struct i2c_client *client) { struct tps65010 *tps = i2c_get_clientdata(client); + struct tps65010_board *board = client->dev.platform_data; + if (board && board->teardown) { + int status = board->teardown(client, board->context); + if (status < 0) + dev_dbg(&client->dev, "board %s %s err %d\n", + "teardown", client->name, status); + } if (client->irq > 0) free_irq(client->irq, tps); cancel_delayed_work(&tps->work); @@ -469,6 +535,7 @@ static int tps65010_probe(struct i2c_client *client) { struct tps65010 *tps; int status; + struct tps65010_board *board = client->dev.platform_data; if (the_tps) { dev_dbg(&client->dev, "only one tps6501x chip allowed\n"); @@ -577,6 +644,38 @@ static int tps65010_probe(struct i2c_client *client) tps->file = debugfs_create_file(DRIVER_NAME, S_IRUGO, NULL, tps, DEBUG_FOPS); + + /* optionally register GPIOs */ + if (board && board->base > 0) { + tps->outmask = board->outmask; + + tps->chip.label = client->name; + + tps->chip.set = tps65010_gpio_set; + tps->chip.direction_output = tps65010_output; + + /* NOTE: only partial support for inputs; nyet IRQs */ + tps->chip.get = tps65010_gpio_get; + + tps->chip.base = board->base; + tps->chip.ngpio = 6; + tps->chip.can_sleep = 1; + + status = gpiochip_add(&tps->chip); + if (status < 0) + dev_err(&client->dev, "can't add gpiochip, err %d\n", + status); + else if (board->setup) { + status = board->setup(client, board->context); + if (status < 0) { + dev_dbg(&client->dev, + "board %s %s err %d\n", + "setup", client->name, status); + status = 0; + } + } + } + return 0; fail1: kfree(tps); diff --git a/include/linux/i2c/tps65010.h b/include/linux/i2c/tps65010.h index 7021635..918c535 100644 --- a/include/linux/i2c/tps65010.h +++ b/include/linux/i2c/tps65010.h @@ -152,5 +152,35 @@ extern int tps65010_config_vregs1(unsigned value); */ extern int tps65013_set_low_pwr(unsigned mode); + +struct i2c_client; + +/** + * struct tps65010_board - packages GPIO and LED lines + * @base: the GPIO number to assign to GPIO-1 + * @outmask: bit (N-1) is set to allow GPIO-N to be used as an + * (open drain) output + * @setup: optional callback issued once the GPIOs are valid + * @teardown: optional callback issued before the GPIOs are invalidated + * @context: optional parameter passed to setup() and teardown() + * + * Board data may be used to package the GPIO (and LED) lines for use + * in by the generic GPIO and LED frameworks. The first four GPIOs + * starting at gpio_base are GPIO1..GPIO4. The next two are LED1/nPG + * and LED2 (with hardware blinking capability, not currently exposed). + * + * The @setup callback may be used with the kind of board-specific glue + * which hands the (now-valid) GPIOs to other drivers, or which puts + * devices in their initial states using these GPIOs. + */ +struct tps65010_board { + int base; + unsigned outmask; + + int (*setup)(struct i2c_client *client, void *context); + int (*teardown)(struct i2c_client *client, void *context); + void *context; +}; + #endif /* __LINUX_I2C_TPS65010_H */ -- 1.5.3.6 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 4/14] ARM: OMAP: Use gpiolib with tps65010 for OSK 5912 2008-03-17 9:42 ` [PATCH 3/14] ARM: OMAP: I2C: tps65010 driver converts to gpiolib Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 2008-03-17 9:42 ` [PATCH 5/14] ARM: OMAP: Clear level-triggered GPIO interrupts in unmask hook Tony Lindgren 0 siblings, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel Cc: linux-omap, David Brownell, David Brownell, Tony Lindgren From: David Brownell <david-b@pacbell.net> Convert OSK board to use new tps65010 gpiolib support. This includes moving its LED support from leds-osk to gpio-leds, giving more trigger options and a net platform code shrink. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/mach-omap1/board-osk.c | 108 +++++++++++++++++++++------------ arch/arm/mach-omap1/leds-osk.c | 80 +------------------------ include/asm-arm/arch-omap/board-osk.h | 11 +++ 3 files changed, 82 insertions(+), 117 deletions(-) diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index dd9ece8..4f9baba 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c @@ -32,6 +32,7 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/i2c.h> +#include <linux/leds.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> @@ -183,11 +184,80 @@ static struct platform_device *osk5912_devices[] __initdata = { &osk5912_mcbsp1_device, }; +static struct gpio_led tps_leds[] = { + /* NOTE: D9 and D2 have hardware blink support. + * Also, D9 requires non-battery power. + */ + { .gpio = OSK_TPS_GPIO_LED_D9, .name = "d9", }, + { .gpio = OSK_TPS_GPIO_LED_D2, .name = "d2", }, + { .gpio = OSK_TPS_GPIO_LED_D3, .name = "d3", .active_low = 1, + .default_trigger = "heartbeat", }, +}; + +static struct gpio_led_platform_data tps_leds_data = { + .num_leds = 3, + .leds = tps_leds, +}; + +static struct platform_device osk5912_tps_leds = { + .name = "leds-gpio", + .id = 0, + .dev.platform_data = &tps_leds_data, +}; + +static int osk_tps_setup(struct i2c_client *client, void *context) +{ + /* Set GPIO 1 HIGH to disable VBUS power supply; + * OHCI driver powers it up/down as needed. + */ + gpio_request(OSK_TPS_GPIO_USB_PWR_EN, "n_vbus_en"); + gpio_direction_output(OSK_TPS_GPIO_USB_PWR_EN, 1); + + /* Set GPIO 2 high so LED D3 is off by default */ + tps65010_set_gpio_out_value(GPIO2, HIGH); + + /* Set GPIO 3 low to take ethernet out of reset */ + gpio_request(OSK_TPS_GPIO_LAN_RESET, "smc_reset"); + gpio_direction_output(OSK_TPS_GPIO_LAN_RESET, 0); + + /* GPIO4 is VDD_DSP */ + gpio_request(OSK_TPS_GPIO_DSP_PWR_EN, "dsp_power"); + gpio_direction_output(OSK_TPS_GPIO_DSP_PWR_EN, 1); + /* REVISIT if DSP support isn't configured, power it off ... */ + + /* Let LED1 (D9) blink; leds-gpio may override it */ + tps65010_set_led(LED1, BLINK); + + /* Set LED2 off by default */ + tps65010_set_led(LED2, OFF); + + /* Enable LOW_PWR handshake */ + tps65010_set_low_pwr(ON); + + /* Switch VLDO2 to 3.0V for AIC23 */ + tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V + | TPS_LDO1_ENABLE); + + /* register these three LEDs */ + osk5912_tps_leds.dev.parent = &client->dev; + platform_device_register(&osk5912_tps_leds); + + return 0; +} + +static struct tps65010_board tps_board = { + .base = OSK_TPS_GPIO_BASE, + .outmask = 0x0f, + .setup = osk_tps_setup, +}; + static struct i2c_board_info __initdata osk_i2c_board_info[] = { { I2C_BOARD_INFO("tps65010", 0x48), .type = "tps65010", .irq = OMAP_GPIO_IRQ(OMAP_MPUIO(1)), + .platform_data = &tps_board, + }, /* TODO when driver support is ready: * - aic23 audio chip at 0x1a @@ -488,44 +558,6 @@ static void __init osk_map_io(void) omap1_map_common_io(); } -#ifdef CONFIG_TPS65010 -static int __init osk_tps_init(void) -{ - if (!machine_is_omap_osk()) - return 0; - - /* Let LED1 (D9) blink */ - tps65010_set_led(LED1, BLINK); - - /* Disable LED 2 (D2) */ - tps65010_set_led(LED2, OFF); - - /* Set GPIO 1 HIGH to disable VBUS power supply; - * OHCI driver powers it up/down as needed. - */ - tps65010_set_gpio_out_value(GPIO1, HIGH); - - /* Set GPIO 2 low to turn on LED D3 */ - tps65010_set_gpio_out_value(GPIO2, HIGH); - - /* Set GPIO 3 low to take ethernet out of reset */ - tps65010_set_gpio_out_value(GPIO3, LOW); - - /* gpio4 for VDD_DSP */ - /* FIXME send power to DSP iff it's configured */ - - /* Enable LOW_PWR */ - tps65010_set_low_pwr(ON); - - /* Switch VLDO2 to 3.0V for AIC23 */ - tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V - | TPS_LDO1_ENABLE); - - return 0; -} -fs_initcall(osk_tps_init); -#endif - MACHINE_START(OMAP_OSK, "TI-OSK") /* Maintainer: Dirk Behme <dirk.behme@de.bosch.com> */ .phys_io = 0xfff00000, diff --git a/arch/arm/mach-omap1/leds-osk.c b/arch/arm/mach-omap1/leds-osk.c index 026685e..754383d 100644 --- a/arch/arm/mach-omap1/leds-osk.c +++ b/arch/arm/mach-omap1/leds-osk.c @@ -1,11 +1,9 @@ /* * linux/arch/arm/mach-omap1/leds-osk.c * - * LED driver for OSK, and optionally Mistral QVGA, boards + * LED driver for OSK with optional Mistral QVGA board */ #include <linux/init.h> -#include <linux/workqueue.h> -#include <linux/i2c/tps65010.h> #include <asm/hardware.h> #include <asm/leds.h> @@ -20,49 +18,11 @@ #define LED_STATE_CLAIMED (1 << 1) static u8 led_state; -#define GREEN_LED (1 << 0) /* TPS65010 LED1 */ -#define AMBER_LED (1 << 1) /* TPS65010 LED2 */ -#define RED_LED (1 << 2) /* TPS65010 GPIO2 */ #define TIMER_LED (1 << 3) /* Mistral board */ #define IDLE_LED (1 << 4) /* Mistral board */ static u8 hw_led_state; -/* TPS65010 leds are changed using i2c -- from a task context. - * Using one of these for the "idle" LED would be impractical... - */ -#define TPS_LEDS (GREEN_LED | RED_LED | AMBER_LED) - -static u8 tps_leds_change; - -static void tps_work(struct work_struct *unused) -{ - for (;;) { - u8 leds; - - local_irq_disable(); - leds = tps_leds_change; - tps_leds_change = 0; - local_irq_enable(); - - if (!leds) - break; - - /* careful: the set_led() value is on/off/blink */ - if (leds & GREEN_LED) - tps65010_set_led(LED1, !!(hw_led_state & GREEN_LED)); - if (leds & AMBER_LED) - tps65010_set_led(LED2, !!(hw_led_state & AMBER_LED)); - - /* the gpio led doesn't have that issue */ - if (leds & RED_LED) - tps65010_set_gpio_out_value(GPIO2, - !(hw_led_state & RED_LED)); - } -} - -static DECLARE_WORK(work, tps_work); - #ifdef CONFIG_OMAP_OSK_MISTRAL /* For now, all system indicators require the Mistral board, since that @@ -112,7 +72,6 @@ void osk_leds_event(led_event_t evt) case led_stop: led_state &= ~LED_STATE_ENABLED; hw_led_state = 0; - /* NOTE: work may still be pending!! */ break; case led_claim: @@ -145,48 +104,11 @@ void osk_leds_event(led_event_t evt) #endif /* CONFIG_OMAP_OSK_MISTRAL */ - /* "green" == tps LED1 (leftmost, normally power-good) - * works only with DC adapter, not on battery power! - */ - case led_green_on: - if (led_state & LED_STATE_CLAIMED) - hw_led_state |= GREEN_LED; - break; - case led_green_off: - if (led_state & LED_STATE_CLAIMED) - hw_led_state &= ~GREEN_LED; - break; - - /* "amber" == tps LED2 (middle) */ - case led_amber_on: - if (led_state & LED_STATE_CLAIMED) - hw_led_state |= AMBER_LED; - break; - case led_amber_off: - if (led_state & LED_STATE_CLAIMED) - hw_led_state &= ~AMBER_LED; - break; - - /* "red" == LED on tps gpio3 (rightmost) */ - case led_red_on: - if (led_state & LED_STATE_CLAIMED) - hw_led_state |= RED_LED; - break; - case led_red_off: - if (led_state & LED_STATE_CLAIMED) - hw_led_state &= ~RED_LED; - break; - default: break; } leds ^= hw_led_state; - leds &= TPS_LEDS; - if (leds && (led_state & LED_STATE_CLAIMED)) { - tps_leds_change |= leds; - schedule_work(&work); - } done: local_irq_restore(flags); diff --git a/include/asm-arm/arch-omap/board-osk.h b/include/asm-arm/arch-omap/board-osk.h index 2b1a8a4..9492609 100644 --- a/include/asm-arm/arch-omap/board-osk.h +++ b/include/asm-arm/arch-omap/board-osk.h @@ -32,5 +32,16 @@ /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ #define OMAP_OSK_ETHR_START 0x04800300 +/* TPS65010 has four GPIOs. nPG and LED2 can be treated like GPIOs with + * alternate pin configurations for hardware-controlled blinking. + */ +#define OSK_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */) +# define OSK_TPS_GPIO_USB_PWR_EN (OSK_TPS_GPIO_BASE + 0) +# define OSK_TPS_GPIO_LED_D3 (OSK_TPS_GPIO_BASE + 1) +# define OSK_TPS_GPIO_LAN_RESET (OSK_TPS_GPIO_BASE + 2) +# define OSK_TPS_GPIO_DSP_PWR_EN (OSK_TPS_GPIO_BASE + 3) +# define OSK_TPS_GPIO_LED_D9 (OSK_TPS_GPIO_BASE + 4) +# define OSK_TPS_GPIO_LED_D2 (OSK_TPS_GPIO_BASE + 5) + #endif /* __ASM_ARCH_OMAP_OSK_H */ -- 1.5.3.6 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 5/14] ARM: OMAP: Clear level-triggered GPIO interrupts in unmask hook 2008-03-17 9:42 ` [PATCH 4/14] ARM: OMAP: Use gpiolib with tps65010 for OSK 5912 Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 2008-03-17 9:42 ` [PATCH 6/14] ARM: OMAP: use edge/level handlers from generic IRQ framework Tony Lindgren 0 siblings, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel; +Cc: linux-omap, Kevin Hilman, Tony Lindgren From: Kevin Hilman <khilman@mvista.com> The clearing was moved to the unmask hook because it is known to run after the interrupt handler has actually run. Before this patch, if interrupts are threaded, the clearing/unmasking of level triggered interrupts would be done before the threaded handler actually ran. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/plat-omap/gpio.c | 27 +++++++++++++-------------- 1 files changed, 13 insertions(+), 14 deletions(-) diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 56889fd..4f104e4 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -148,6 +148,7 @@ struct gpio_bank { u32 saved_fallingdetect; u32 saved_risingdetect; #endif + u32 level_mask; spinlock_t lock; struct gpio_chip chip; }; @@ -538,6 +539,9 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, bank->enabled_non_wakeup_gpios &= ~gpio_bit; } + bank->level_mask = + __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) | + __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); /* * FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only * level triggering requested. @@ -1021,12 +1025,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) isr &= 0x0000ffff; if (cpu_class_is_omap2()) { - level_mask = - __raw_readl(bank->base + - OMAP24XX_GPIO_LEVELDETECT0) | - __raw_readl(bank->base + - OMAP24XX_GPIO_LEVELDETECT1); - level_mask &= enabled; + level_mask = bank->level_mask & enabled; } /* clear edge sensitive interrupts before handler(s) are @@ -1088,14 +1087,6 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) retrigger |= irq_mask; } } - - if (cpu_class_is_omap2()) { - /* clear level sensitive interrupts after handler(s) */ - _enable_gpio_irqbank(bank, isr_saved & level_mask, 0); - _clear_gpio_irqbank(bank, isr_saved & level_mask); - _enable_gpio_irqbank(bank, isr_saved & level_mask, 1); - } - } /* if bank has any level sensitive GPIO pin interrupt configured, we must unmask the bank interrupt only after @@ -1134,6 +1125,14 @@ static void gpio_unmask_irq(unsigned int irq) { unsigned int gpio = irq - IH_GPIO_BASE; struct gpio_bank *bank = get_irq_chip_data(irq); + unsigned int irq_mask = 1 << get_gpio_index(gpio); + + /* For level-triggered GPIOs, the clearing must be done after + * the HW source is cleared, thus after the handler has run */ + if (bank->level_mask & irq_mask) { + _set_gpio_irqenable(bank, gpio, 0); + _clear_gpio_irqstatus(bank, gpio); + } _set_gpio_irqenable(bank, gpio, 1); } -- 1.5.3.6 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 6/14] ARM: OMAP: use edge/level handlers from generic IRQ framework 2008-03-17 9:42 ` [PATCH 5/14] ARM: OMAP: Clear level-triggered GPIO interrupts in unmask hook Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 2008-03-17 9:42 ` [PATCH 7/14] ARM: OMAP: Allow registering pin mux function Tony Lindgren 0 siblings, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel; +Cc: linux-omap, Kevin Hilman, Tony Lindgren From: Kevin Hilman <khilman@mvista.com> Currently, the GPIO interrupt handling is duplicating some of the work done by the generic IRQ handlers (handle_edge_irq, handle_level_irq) such as detecting nesting, handling re-triggers etc. Remove this duplication and use generic hooks based on IRQ type. Using generic IRQ handlers ensures correct behavior when using threaded interrupts introduced by the -rt patch. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/plat-omap/gpio.c | 42 +++++++----------------------------------- 1 files changed, 7 insertions(+), 35 deletions(-) diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 4f104e4..1903a34 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -542,10 +542,6 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, bank->level_mask = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) | __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); - /* - * FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only - * level triggering requested. - */ } #endif @@ -656,6 +652,12 @@ static int gpio_irq_type(unsigned irq, unsigned type) irq_desc[irq].status |= type; } spin_unlock_irqrestore(&bank->lock, flags); + + if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) + __set_irq_handler_unlocked(irq, handle_level_irq); + else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) + __set_irq_handler_unlocked(irq, handle_edge_irq); + return retval; } @@ -1050,42 +1052,12 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) gpio_irq = bank->virtual_irq_start; for (; isr != 0; isr >>= 1, gpio_irq++) { struct irq_desc *d; - int irq_mask; + if (!(isr & 1)) continue; d = irq_desc + gpio_irq; - /* Don't run the handler if it's already running - * or was disabled lazely. - */ - if (unlikely((d->depth || - (d->status & IRQ_INPROGRESS)))) { - irq_mask = 1 << - (gpio_irq - bank->virtual_irq_start); - /* The unmasking will be done by - * enable_irq in case it is disabled or - * after returning from the handler if - * it's already running. - */ - _enable_gpio_irqbank(bank, irq_mask, 0); - if (!d->depth) { - /* Level triggered interrupts - * won't ever be reentered - */ - BUG_ON(level_mask & irq_mask); - d->status |= IRQ_PENDING; - } - continue; - } desc_handle_irq(gpio_irq, d); - - if (unlikely((d->status & IRQ_PENDING) && !d->depth)) { - irq_mask = 1 << - (gpio_irq - bank->virtual_irq_start); - d->status &= ~IRQ_PENDING; - _enable_gpio_irqbank(bank, irq_mask, 1); - retrigger |= irq_mask; - } } } /* if bank has any level sensitive GPIO pin interrupt -- 1.5.3.6 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 7/14] ARM: OMAP: Allow registering pin mux function 2008-03-17 9:42 ` [PATCH 6/14] ARM: OMAP: use edge/level handlers from generic IRQ framework Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 2008-03-17 9:42 ` [PATCH 8/14] ARM: OMAP: Split omap_cfg_reg() into omap processor specific functions Tony Lindgren 0 siblings, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel; +Cc: linux-omap, Tony Lindgren This patch changes pin multiplexing init to allow registering custom function. The omap_cfg_reg() func will be split into omap processor specific functions in later patch. This is done to make adding omap3 pin multiplexing easier. Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/mach-omap1/mux.c | 21 ++++++++++++++++++--- arch/arm/mach-omap2/mux.c | 21 +++++++++++++++++++-- arch/arm/plat-omap/mux.c | 30 ++++++++++++++++-------------- include/asm-arm/arch-omap/mux.h | 8 +++++++- 4 files changed, 60 insertions(+), 20 deletions(-) diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 52c70e5..d74f679 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c @@ -32,6 +32,8 @@ #ifdef CONFIG_OMAP_MUX +static struct omap_mux_cfg arch_mux_cfg; + #ifdef CONFIG_ARCH_OMAP730 struct pin_config __initdata_or_module omap730_pins[] = { MUX_CFG_730("E2_730_KBR0", 12, 21, 0, 20, 1, 0) @@ -310,18 +312,31 @@ MUX_CFG("Y14_1610_CCP_DATAM", 9, 21, 6, 2, 3, 1, 2, 0, 0) }; #endif /* CONFIG_ARCH_OMAP15XX || CONFIG_ARCH_OMAP16XX */ +int __init_or_module omap1_cfg_reg(const struct pin_config *cfg) +{ + return 0; +} + int __init omap1_mux_init(void) { #ifdef CONFIG_ARCH_OMAP730 - omap_mux_register(omap730_pins, ARRAY_SIZE(omap730_pins)); + if (cpu_is_omap730()) { + arch_mux_cfg.pins = omap730_pins; + arch_mux_cfg.size = ARRAY_SIZE(omap730_pins); + arch_mux_cfg.cfg_reg = omap1_cfg_reg; + } #endif #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) - omap_mux_register(omap1xxx_pins, ARRAY_SIZE(omap1xxx_pins)); + if (cpu_is_omap15xx() || cpu_is_omap16xx()) { + arch_mux_cfg.pins = omap1xxx_pins; + arch_mux_cfg.size = ARRAY_SIZE(omap1xxx_pins); + arch_mux_cfg.cfg_reg = omap1_cfg_reg; + } #endif - return 0; + return omap_mux_register(&arch_mux_cfg); } #endif diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 0575097..351baab 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -32,6 +32,8 @@ #ifdef CONFIG_OMAP_MUX +static struct omap_mux_cfg arch_mux_cfg; + /* NOTE: See mux.h for the enumeration */ struct pin_config __initdata_or_module omap24xx_pins[] = { @@ -169,10 +171,25 @@ MUX_CFG_24XX("B13_24XX_KBC6", 0x110, 3, 0, 0, 1) }; -int __init omap2_mux_init(void) +#ifdef CONFIG_ARCH_OMAP24XX +int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg) { - omap_mux_register(omap24xx_pins, ARRAY_SIZE(omap24xx_pins)); return 0; } +#endif + +int __init omap2_mux_init(void) +{ + +#ifdef CONFIG_ARCH_OMAP24XX + if (cpu_is_omap24xx()) { + arch_mux_cfg.pins = omap24xx_pins; + arch_mux_cfg.size = ARRAY_SIZE(omap24xx_pins); + arch_mux_cfg.cfg_reg = omap24xx_cfg_reg; + } +#endif + + return omap_mux_register(&arch_mux_cfg); +} #endif diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c index 75211f2..d881379 100644 --- a/arch/arm/plat-omap/mux.c +++ b/arch/arm/plat-omap/mux.c @@ -36,17 +36,17 @@ #define OMAP24XX_PULL_ENA (1 << 3) #define OMAP24XX_PULL_UP (1 << 4) -static struct pin_config * pin_table; -static unsigned long pin_table_sz; +static struct omap_mux_cfg *mux_cfg; -extern struct pin_config * omap730_pins; -extern struct pin_config * omap1xxx_pins; -extern struct pin_config * omap24xx_pins; - -int __init omap_mux_register(struct pin_config * pins, unsigned long size) +int __init omap_mux_register(struct omap_mux_cfg *arch_mux_cfg) { - pin_table = pins; - pin_table_sz = size; + if (!arch_mux_cfg || !arch_mux_cfg->pins || arch_mux_cfg->size == 0 + || !arch_mux_cfg->cfg_reg) { + printk(KERN_ERR "Invalid pin table\n"); + return -EINVAL; + } + + mux_cfg = arch_mux_cfg; return 0; } @@ -64,17 +64,19 @@ int __init_or_module omap_cfg_reg(const unsigned long index) pull_orig = 0, pull = 0; unsigned int mask, warn = 0; - if (!pin_table) - BUG(); + if (mux_cfg == NULL) { + printk(KERN_ERR "Pin mux table not initialized\n"); + return -ENODEV; + } - if (index >= pin_table_sz) { + if (index >= mux_cfg->size) { printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n", - index, pin_table_sz); + index, mux_cfg->size); dump_stack(); return -ENODEV; } - cfg = (struct pin_config *)&pin_table[index]; + cfg = (struct pin_config *)&mux_cfg->pins[index]; if (cpu_is_omap24xx()) { u8 reg = 0; diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h index b8fff50..0edc6ce 100644 --- a/include/asm-arm/arch-omap/mux.h +++ b/include/asm-arm/arch-omap/mux.h @@ -559,11 +559,17 @@ enum omap24xx_index { B13_24XX_KBC6, }; +struct omap_mux_cfg { + struct pin_config *pins; + unsigned long size; + int (*cfg_reg)(const struct pin_config *cfg); +}; + #ifdef CONFIG_OMAP_MUX /* setup pin muxing in Linux */ extern int omap1_mux_init(void); extern int omap2_mux_init(void); -extern int omap_mux_register(struct pin_config * pins, unsigned long size); +extern int omap_mux_register(struct omap_mux_cfg *); extern int omap_cfg_reg(unsigned long reg_cfg); #else /* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */ -- 1.5.3.6 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 8/14] ARM: OMAP: Split omap_cfg_reg() into omap processor specific functions 2008-03-17 9:42 ` [PATCH 7/14] ARM: OMAP: Allow registering pin mux function Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 2008-03-17 9:42 ` [PATCH 9/14] ARM: OMAP: Timer32K: Re-organize duplicated 32k-timer code Tony Lindgren 0 siblings, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel; +Cc: linux-omap, Tony Lindgren Use omap processor specific function depending on system type. Based on an earlier patch by Klaus Pedersen <klaus.k.pedersen@nokia.com>. Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/mach-omap1/mux.c | 103 ++++++++++++++++++++++++++++++++ arch/arm/mach-omap2/mux.c | 31 ++++++++++ arch/arm/plat-omap/mux.c | 142 ++------------------------------------------- 3 files changed, 139 insertions(+), 137 deletions(-) diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index d74f679..cf3bdc0 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c @@ -314,7 +314,110 @@ MUX_CFG("Y14_1610_CCP_DATAM", 9, 21, 6, 2, 3, 1, 2, 0, 0) int __init_or_module omap1_cfg_reg(const struct pin_config *cfg) { + static DEFINE_SPINLOCK(mux_spin_lock); + unsigned long flags; + unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0, + pull_orig = 0, pull = 0; + unsigned int mask, warn = 0; + + /* Check the mux register in question */ + if (cfg->mux_reg) { + unsigned tmp1, tmp2; + + spin_lock_irqsave(&mux_spin_lock, flags); + reg_orig = omap_readl(cfg->mux_reg); + + /* The mux registers always seem to be 3 bits long */ + mask = (0x7 << cfg->mask_offset); + tmp1 = reg_orig & mask; + reg = reg_orig & ~mask; + + tmp2 = (cfg->mask << cfg->mask_offset); + reg |= tmp2; + + if (tmp1 != tmp2) + warn = 1; + + omap_writel(reg, cfg->mux_reg); + spin_unlock_irqrestore(&mux_spin_lock, flags); + } + + /* Check for pull up or pull down selection on 1610 */ + if (!cpu_is_omap15xx()) { + if (cfg->pu_pd_reg && cfg->pull_val) { + spin_lock_irqsave(&mux_spin_lock, flags); + pu_pd_orig = omap_readl(cfg->pu_pd_reg); + mask = 1 << cfg->pull_bit; + + if (cfg->pu_pd_val) { + if (!(pu_pd_orig & mask)) + warn = 1; + /* Use pull up */ + pu_pd = pu_pd_orig | mask; + } else { + if (pu_pd_orig & mask) + warn = 1; + /* Use pull down */ + pu_pd = pu_pd_orig & ~mask; + } + omap_writel(pu_pd, cfg->pu_pd_reg); + spin_unlock_irqrestore(&mux_spin_lock, flags); + } + } + + /* Check for an associated pull down register */ + if (cfg->pull_reg) { + spin_lock_irqsave(&mux_spin_lock, flags); + pull_orig = omap_readl(cfg->pull_reg); + mask = 1 << cfg->pull_bit; + + if (cfg->pull_val) { + if (pull_orig & mask) + warn = 1; + /* Low bit = pull enabled */ + pull = pull_orig & ~mask; + } else { + if (!(pull_orig & mask)) + warn = 1; + /* High bit = pull disabled */ + pull = pull_orig | mask; + } + + omap_writel(pull, cfg->pull_reg); + spin_unlock_irqrestore(&mux_spin_lock, flags); + } + + if (warn) { +#ifdef CONFIG_OMAP_MUX_WARNINGS + printk(KERN_WARNING "MUX: initialized %s\n", cfg->name); +#endif + } + +#ifdef CONFIG_OMAP_MUX_DEBUG + if (cfg->debug || warn) { + printk("MUX: Setting register %s\n", cfg->name); + printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", + cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); + + if (!cpu_is_omap15xx()) { + if (cfg->pu_pd_reg && cfg->pull_val) { + printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", + cfg->pu_pd_name, cfg->pu_pd_reg, + pu_pd_orig, pu_pd); + } + } + + if (cfg->pull_reg) + printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", + cfg->pull_name, cfg->pull_reg, pull_orig, pull); + } +#endif + +#ifdef CONFIG_OMAP_MUX_ERRORS + return warn ? -ETXTBSY : 0; +#else return 0; +#endif } int __init omap1_mux_init(void) diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 351baab..71cff46 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -172,8 +172,39 @@ MUX_CFG_24XX("B13_24XX_KBC6", 0x110, 3, 0, 0, 1) }; #ifdef CONFIG_ARCH_OMAP24XX + +#define OMAP24XX_L4_BASE 0x48000000 +#define OMAP24XX_PULL_ENA (1 << 3) +#define OMAP24XX_PULL_UP (1 << 4) + +/* REVISIT: Convert this code to use ctrl_{read,write}_reg */ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg) { + u8 reg = 0; + unsigned int warn = 0; + + reg |= cfg->mask & 0x7; + if (cfg->pull_val) + reg |= OMAP24XX_PULL_ENA; + if(cfg->pu_pd_val) + reg |= OMAP24XX_PULL_UP; +#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) + { + u8 orig = omap_readb(OMAP24XX_L4_BASE + cfg->mux_reg); + u8 debug = 0; + +#ifdef CONFIG_OMAP_MUX_DEBUG + debug = cfg->debug; +#endif + warn = (orig != reg); + if (debug || warn) + printk("MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n", + cfg->name, OMAP24XX_L4_BASE + cfg->mux_reg, + orig, reg); + } +#endif + omap_writeb(reg, OMAP24XX_L4_BASE + cfg->mux_reg); + return 0; } #endif diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c index d881379..4de18b9 100644 --- a/arch/arm/plat-omap/mux.c +++ b/arch/arm/plat-omap/mux.c @@ -32,10 +32,6 @@ #ifdef CONFIG_OMAP_MUX -#define OMAP24XX_L4_BASE 0x48000000 -#define OMAP24XX_PULL_ENA (1 << 3) -#define OMAP24XX_PULL_UP (1 << 4) - static struct omap_mux_cfg *mux_cfg; int __init omap_mux_register(struct omap_mux_cfg *arch_mux_cfg) @@ -56,13 +52,7 @@ int __init omap_mux_register(struct omap_mux_cfg *arch_mux_cfg) */ int __init_or_module omap_cfg_reg(const unsigned long index) { - static DEFINE_SPINLOCK(mux_spin_lock); - - unsigned long flags; - struct pin_config *cfg; - unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0, - pull_orig = 0, pull = 0; - unsigned int mask, warn = 0; + struct pin_config *reg; if (mux_cfg == NULL) { printk(KERN_ERR "Pin mux table not initialized\n"); @@ -76,134 +66,12 @@ int __init_or_module omap_cfg_reg(const unsigned long index) return -ENODEV; } - cfg = (struct pin_config *)&mux_cfg->pins[index]; - if (cpu_is_omap24xx()) { - u8 reg = 0; - - reg |= cfg->mask & 0x7; - if (cfg->pull_val) - reg |= OMAP24XX_PULL_ENA; - if(cfg->pu_pd_val) - reg |= OMAP24XX_PULL_UP; -#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) - { - u8 orig = omap_readb(OMAP24XX_L4_BASE + cfg->mux_reg); - u8 debug = 0; - -#ifdef CONFIG_OMAP_MUX_DEBUG - debug = cfg->debug; -#endif - warn = (orig != reg); - if (debug || warn) - printk("MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n", - cfg->name, - OMAP24XX_L4_BASE + cfg->mux_reg, - orig, reg); - } -#endif - omap_writeb(reg, OMAP24XX_L4_BASE + cfg->mux_reg); - - return 0; - } - - /* Check the mux register in question */ - if (cfg->mux_reg) { - unsigned tmp1, tmp2; - - spin_lock_irqsave(&mux_spin_lock, flags); - reg_orig = omap_readl(cfg->mux_reg); - - /* The mux registers always seem to be 3 bits long */ - mask = (0x7 << cfg->mask_offset); - tmp1 = reg_orig & mask; - reg = reg_orig & ~mask; - - tmp2 = (cfg->mask << cfg->mask_offset); - reg |= tmp2; - - if (tmp1 != tmp2) - warn = 1; - - omap_writel(reg, cfg->mux_reg); - spin_unlock_irqrestore(&mux_spin_lock, flags); - } - - /* Check for pull up or pull down selection on 1610 */ - if (!cpu_is_omap15xx()) { - if (cfg->pu_pd_reg && cfg->pull_val) { - spin_lock_irqsave(&mux_spin_lock, flags); - pu_pd_orig = omap_readl(cfg->pu_pd_reg); - mask = 1 << cfg->pull_bit; + reg = (struct pin_config *)&mux_cfg->pins[index]; - if (cfg->pu_pd_val) { - if (!(pu_pd_orig & mask)) - warn = 1; - /* Use pull up */ - pu_pd = pu_pd_orig | mask; - } else { - if (pu_pd_orig & mask) - warn = 1; - /* Use pull down */ - pu_pd = pu_pd_orig & ~mask; - } - omap_writel(pu_pd, cfg->pu_pd_reg); - spin_unlock_irqrestore(&mux_spin_lock, flags); - } - } - - /* Check for an associated pull down register */ - if (cfg->pull_reg) { - spin_lock_irqsave(&mux_spin_lock, flags); - pull_orig = omap_readl(cfg->pull_reg); - mask = 1 << cfg->pull_bit; - - if (cfg->pull_val) { - if (pull_orig & mask) - warn = 1; - /* Low bit = pull enabled */ - pull = pull_orig & ~mask; - } else { - if (!(pull_orig & mask)) - warn = 1; - /* High bit = pull disabled */ - pull = pull_orig | mask; - } - - omap_writel(pull, cfg->pull_reg); - spin_unlock_irqrestore(&mux_spin_lock, flags); - } - - if (warn) { -#ifdef CONFIG_OMAP_MUX_WARNINGS - printk(KERN_WARNING "MUX: initialized %s\n", cfg->name); -#endif - } - -#ifdef CONFIG_OMAP_MUX_DEBUG - if (cfg->debug || warn) { - printk("MUX: Setting register %s\n", cfg->name); - printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", - cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); - - if (!cpu_is_omap15xx()) { - if (cfg->pu_pd_reg && cfg->pull_val) { - printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", - cfg->pu_pd_name, cfg->pu_pd_reg, - pu_pd_orig, pu_pd); - } - } - - if (cfg->pull_reg) - printk(" %s (0x%08x) = 0x%08x -> 0x%08x\n", - cfg->pull_name, cfg->pull_reg, pull_orig, pull); - } -#endif + if (!mux_cfg->cfg_reg) + return -ENODEV; -#ifdef CONFIG_OMAP_MUX_ERRORS - return warn ? -ETXTBSY : 0; -#else - return 0; -#endif + return mux_cfg->cfg_reg(reg); } EXPORT_SYMBOL(omap_cfg_reg); #else -- 1.5.3.6 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 9/14] ARM: OMAP: Timer32K: Re-organize duplicated 32k-timer code 2008-03-17 9:42 ` [PATCH 8/14] ARM: OMAP: Split omap_cfg_reg() into omap processor specific functions Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 2008-03-17 9:42 ` [PATCH 10/14] ARM: OMAP: Timer32K: Move 32k-based sched_clock() to common code Tony Lindgren 0 siblings, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel; +Cc: linux-omap, Kevin Hilman, Tony Lindgren From: Kevin Hilman <khilman@mvista.com> On OMAP2/3, the gp-timer code can be used for a 32kHz timer simply by setting the source to be the 32k clock instead of sys_clk. This patch uses the mach-omap2/timer-gp.c code for 32kHz timer on OMAP2, moving the logic into mach-omap2/timer-gp.c, and not using plat-omap/timer32k.c which, for OMAP2, is redundant with the timer-gp code. Also, if CONFIG_OMAP_32K_TIMER is enabled, the gptimer-based clocksource is not used. Instead the default 32k sync counter is used as the clocksource (see the clocksource in plat-omap/common.c.) This is important for sleep/suspend so there is a valid counter during sleep. Note that the suspend/sleep code needs fixing to check for overflows of this counter. In addition, the OMAP2/3 details are removed from timer32k.c leaving that with only OMAP1 specifics. A follow-up patch will move it from plat-omap common code to mach-omap1. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/mach-omap2/Makefile | 4 +- arch/arm/mach-omap2/timer-gp.c | 152 ++++++++++++++++++++++++++++++++++++---- arch/arm/plat-omap/Makefile | 2 + arch/arm/plat-omap/timer32k.c | 44 +----------- 4 files changed, 141 insertions(+), 61 deletions(-) diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index b05b738..ac343ec 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -4,9 +4,7 @@ # Common support obj-y := irq.o id.o io.o sram-fn.o memory.o prcm.o clock.o mux.o devices.o \ - serial.o gpmc.o - -obj-$(CONFIG_OMAP_MPU_TIMER) += timer-gp.o + serial.o gpmc.o timer-gp.o # Power Management obj-$(CONFIG_PM) += pm.o pm-domain.o sleep.o diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 3234dee..78d05f2 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c @@ -3,6 +3,11 @@ * * OMAP2 GP timer support. * + * Update to use new clocksource/clockevent layers + * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> + * Copyright (C) 2007 MontaVista Software, Inc. + * + * Original driver: * Copyright (C) 2005 Nokia Corporation * Author: Paul Mundt <paul.mundt@nokia.com> * Juha Yrjölä <juha.yrjola@nokia.com> @@ -25,24 +30,23 @@ #include <linux/clk.h> #include <linux/delay.h> #include <linux/irq.h> +#include <linux/clocksource.h> +#include <linux/clockchips.h> #include <asm/mach/time.h> #include <asm/arch/dmtimer.h> static struct omap_dm_timer *gptimer; - -static inline void omap2_gp_timer_start(unsigned long load_val) -{ - omap_dm_timer_set_load(gptimer, 1, 0xffffffff - load_val); - omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW); - omap_dm_timer_start(gptimer); -} +static struct clock_event_device clockevent_gpt; static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) { - omap_dm_timer_write_status(gptimer, OMAP_TIMER_INT_OVERFLOW); - timer_tick(); + struct omap_dm_timer *gpt = (struct omap_dm_timer *)dev_id; + struct clock_event_device *evt = &clockevent_gpt; + + omap_dm_timer_write_status(gpt, OMAP_TIMER_INT_OVERFLOW); + evt->event_handler(evt); return IRQ_HANDLED; } @@ -52,20 +56,138 @@ static struct irqaction omap2_gp_timer_irq = { .handler = omap2_gp_timer_interrupt, }; -static void __init omap2_gp_timer_init(void) +static int omap2_gp_timer_set_next_event(unsigned long cycles, + struct clock_event_device *evt) { - u32 tick_period; + omap_dm_timer_set_load(gptimer, 0, 0xffffffff - cycles); + omap_dm_timer_start(gptimer); + + return 0; +} + +static void omap2_gp_timer_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ + u32 period; + + omap_dm_timer_stop(gptimer); + + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; + period -= 1; + + omap_dm_timer_set_load(gptimer, 1, 0xffffffff - period); + omap_dm_timer_start(gptimer); + break; + case CLOCK_EVT_MODE_ONESHOT: + break; + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + case CLOCK_EVT_MODE_RESUME: + break; + } +} + +static struct clock_event_device clockevent_gpt = { + .name = "gp timer", + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, + .shift = 32, + .set_next_event = omap2_gp_timer_set_next_event, + .set_mode = omap2_gp_timer_set_mode, +}; + +static void __init omap2_gp_clockevent_init(void) +{ + u32 tick_rate; - omap_dm_timer_init(); gptimer = omap_dm_timer_request_specific(1); BUG_ON(gptimer == NULL); +#if defined(CONFIG_OMAP_32K_TIMER) + omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_32_KHZ); +#else omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK); - tick_period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; - tick_period -= 1; +#endif + tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer)); + omap2_gp_timer_irq.dev_id = (void *)gptimer; setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); - omap2_gp_timer_start(tick_period); + omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW); + + clockevent_gpt.mult = div_sc(tick_rate, NSEC_PER_SEC, + clockevent_gpt.shift); + clockevent_gpt.max_delta_ns = + clockevent_delta2ns(0xffffffff, &clockevent_gpt); + clockevent_gpt.min_delta_ns = + clockevent_delta2ns(1, &clockevent_gpt); + + clockevent_gpt.cpumask = cpumask_of_cpu(0); + clockevents_register_device(&clockevent_gpt); +} + +#ifdef CONFIG_OMAP_32K_TIMER +/* + * When 32k-timer is enabled, don't use GPTimer for clocksource + * instead, just leave default clocksource which uses the 32k + * sync counter. See clocksource setup in see plat-omap/common.c. + */ + +static inline void __init omap2_gp_clocksource_init(void) {} +#else +/* + * clocksource + */ +static struct omap_dm_timer *gpt_clocksource; +static cycle_t clocksource_read_cycles(void) +{ + return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource); +} + +static struct clocksource clocksource_gpt = { + .name = "gp timer", + .rating = 300, + .read = clocksource_read_cycles, + .mask = CLOCKSOURCE_MASK(32), + .shift = 24, + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +/* Setup free-running counter for clocksource */ +static void __init omap2_gp_clocksource_init(void) +{ + static struct omap_dm_timer *gpt; + u32 tick_rate, tick_period; + static char err1[] __initdata = KERN_ERR + "%s: failed to request dm-timer\n"; + static char err2[] __initdata = KERN_ERR + "%s: can't register clocksource!\n"; + + gpt = omap_dm_timer_request(); + if (!gpt) + printk(err1, clocksource_gpt.name); + gpt_clocksource = gpt; + + omap_dm_timer_set_source(gpt, OMAP_TIMER_SRC_SYS_CLK); + tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt)); + tick_period = (tick_rate / HZ) - 1; + + omap_dm_timer_set_load(gpt, 1, 0); + omap_dm_timer_start(gpt); + + clocksource_gpt.mult = + clocksource_khz2mult(tick_rate/1000, clocksource_gpt.shift); + if (clocksource_register(&clocksource_gpt)) + printk(err2, clocksource_gpt.name); +} +#endif + +static void __init omap2_gp_timer_init(void) +{ + omap_dm_timer_init(); + + omap2_gp_clockevent_init(); + omap2_gp_clocksource_init(); } struct sys_timer omap_timer = { diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 8f56c25..d91424e 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -9,7 +9,9 @@ obj-m := obj-n := obj- := +ifeq ($(CONFIG_ARCH_OMAP1),y) obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o +endif # OCPI interconnect support for 1710, 1610 and 5912 obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o diff --git a/arch/arm/plat-omap/timer32k.c b/arch/arm/plat-omap/timer32k.c index ea76f19..ce034dc 100644 --- a/arch/arm/plat-omap/timer32k.c +++ b/arch/arm/plat-omap/timer32k.c @@ -40,6 +40,7 @@ #include <linux/interrupt.h> #include <linux/sched.h> #include <linux/spinlock.h> + #include <linux/err.h> #include <linux/clk.h> #include <linux/clocksource.h> @@ -93,8 +94,6 @@ struct sys_timer omap_timer; #define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate) \ (((nr_jiffies) * (clock_rate)) / HZ) -#if defined(CONFIG_ARCH_OMAP1) - static inline void omap_32k_timer_write(int val, int reg) { omap_writew(val, OMAP1_32K_TIMER_BASE + reg); @@ -120,30 +119,6 @@ static inline void omap_32k_timer_stop(void) #define omap_32k_timer_ack_irq() -#elif defined(CONFIG_ARCH_OMAP2) - -static struct omap_dm_timer *gptimer; - -static inline void omap_32k_timer_start(unsigned long load_val) -{ - omap_dm_timer_set_load(gptimer, 1, 0xffffffff - load_val); - omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW); - omap_dm_timer_start(gptimer); -} - -static inline void omap_32k_timer_stop(void) -{ - omap_dm_timer_stop(gptimer); -} - -static inline void omap_32k_timer_ack_irq(void) -{ - u32 status = omap_dm_timer_read_status(gptimer); - omap_dm_timer_write_status(gptimer, status); -} - -#endif - static void omap_32k_timer_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) { @@ -222,23 +197,6 @@ static struct irqaction omap_32k_timer_irq = { static __init void omap_init_32k_timer(void) { - if (cpu_class_is_omap1()) - setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); - -#ifdef CONFIG_ARCH_OMAP2 - /* REVISIT: Check 24xx TIOCP_CFG settings after idle works */ - if (cpu_is_omap24xx()) { - gptimer = omap_dm_timer_request_specific(1); - BUG_ON(gptimer == NULL); - - omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_32_KHZ); - setup_irq(omap_dm_timer_get_irq(gptimer), &omap_32k_timer_irq); - omap_dm_timer_set_int_enable(gptimer, - OMAP_TIMER_INT_CAPTURE | OMAP_TIMER_INT_OVERFLOW | - OMAP_TIMER_INT_MATCH); - } -#endif - clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC, NSEC_PER_SEC, clockevent_32k_timer.shift); -- 1.5.3.6 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 10/14] ARM: OMAP: Timer32K: Move 32k-based sched_clock() to common code 2008-03-17 9:42 ` [PATCH 9/14] ARM: OMAP: Timer32K: Re-organize duplicated 32k-timer code Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 2008-03-17 9:42 ` [PATCH 11/14] ARM: OMAP: Timer32K: Move timer32k to mach-omap1 Tony Lindgren 0 siblings, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel; +Cc: linux-omap, Kevin Hilman, Tony Lindgren From: Kevin Hilman <khilman@mvista.com> Since 32k timer code is moving to OMAP1 specific dir, move the 32k-based sched_clock() into common code where it is based on the 32k sync counter and can be used even when using MPU timer. While moving, change the ticks-to-nsecs conversion to use the helper functions provided by clocksource.h. Also removed the unused ticks_to_usec, leaving only ticks_to_nsec. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/plat-omap/common.c | 17 +++++++++++++++++ arch/arm/plat-omap/timer32k.c | 26 -------------------------- 2 files changed, 17 insertions(+), 26 deletions(-) diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index 4f0f9c4..7f1cae1 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c @@ -193,6 +193,23 @@ static struct clocksource clocksource_32k = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; +/* + * Rounds down to nearest nsec. + */ +unsigned long long omap_32k_ticks_to_nsecs(unsigned long ticks_32k) +{ + return cyc2ns(&clocksource_32k, ticks_32k); +} + +/* + * Returns current time from boot in nsecs. It's OK for this to wrap + * around for now, as it's just a relative time stamp. + */ +unsigned long long sched_clock(void) +{ + return omap_32k_ticks_to_nsecs(omap_32k_read()); +} + static int __init omap_init_clocksource_32k(void) { static char err[] __initdata = KERN_ERR diff --git a/arch/arm/plat-omap/timer32k.c b/arch/arm/plat-omap/timer32k.c index ce034dc..1f7365f 100644 --- a/arch/arm/plat-omap/timer32k.c +++ b/arch/arm/plat-omap/timer32k.c @@ -153,32 +153,6 @@ static inline unsigned long omap_32k_sync_timer_read(void) return omap_readl(TIMER_32K_SYNCHRONIZED); } -/* - * Rounds down to nearest usec. Note that this will overflow for larger values. - */ -static inline unsigned long omap_32k_ticks_to_usecs(unsigned long ticks_32k) -{ - return (ticks_32k * 5*5*5*5*5*5) >> 9; -} - -/* - * Rounds down to nearest nsec. - */ -static inline unsigned long long -omap_32k_ticks_to_nsecs(unsigned long ticks_32k) -{ - return (unsigned long long) ticks_32k * 1000 * 5*5*5*5*5*5 >> 9; -} - -/* - * Returns current time from boot in nsecs. It's OK for this to wrap - * around for now, as it's just a relative time stamp. - */ -unsigned long long sched_clock(void) -{ - return omap_32k_ticks_to_nsecs(omap_32k_sync_timer_read()); -} - static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id) { struct clock_event_device *evt = &clockevent_32k_timer; -- 1.5.3.6 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 11/14] ARM: OMAP: Timer32K: Move timer32k to mach-omap1 2008-03-17 9:42 ` [PATCH 10/14] ARM: OMAP: Timer32K: Move 32k-based sched_clock() to common code Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 2008-03-17 9:42 ` [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up Tony Lindgren 0 siblings, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel; +Cc: linux-omap, Kevin Hilman, Tony Lindgren From: Kevin Hilman <khilman@mvista.com> Move now OMAP1-specific timer32k code to mach-omap1 since OMAP2/3 32k timers are done in gptimer code. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/mach-omap1/Makefile | 3 +- arch/arm/mach-omap1/timer32k.c | 201 ++++++++++++++++++++++++++++++++++++++++ arch/arm/plat-omap/Makefile | 4 - arch/arm/plat-omap/timer32k.c | 201 ---------------------------------------- 4 files changed, 203 insertions(+), 206 deletions(-) create mode 100644 arch/arm/mach-omap1/timer32k.c delete mode 100644 arch/arm/plat-omap/timer32k.c diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile index 015a66b..c06f525 100644 --- a/arch/arm/mach-omap1/Makefile +++ b/arch/arm/mach-omap1/Makefile @@ -5,7 +5,8 @@ # Common support obj-y := io.o id.o clock.o irq.o mux.o serial.o devices.o -obj-$(CONFIG_OMAP_MPU_TIMER) += time.o +obj-$(CONFIG_OMAP_MPU_TIMER) += time.o +obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o # Power Management obj-$(CONFIG_PM) += pm.o sleep.o diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c new file mode 100644 index 0000000..1f7365f --- /dev/null +++ b/arch/arm/mach-omap1/timer32k.c @@ -0,0 +1,201 @@ +/* + * linux/arch/arm/plat-omap/timer32k.c + * + * OMAP 32K Timer + * + * Copyright (C) 2004 - 2005 Nokia Corporation + * Partial timer rewrite and additional dynamic tick timer support by + * Tony Lindgen <tony@atomide.com> and + * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> + * OMAP Dual-mode timer framework support by Timo Teras + * + * MPU timer code based on the older MPU timer code for OMAP + * Copyright (C) 2000 RidgeRun, Inc. + * Author: Greg Lonnon <glonnon@ridgerun.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/interrupt.h> +#include <linux/sched.h> +#include <linux/spinlock.h> + +#include <linux/err.h> +#include <linux/clk.h> +#include <linux/clocksource.h> +#include <linux/clockchips.h> + +#include <asm/system.h> +#include <asm/hardware.h> +#include <asm/io.h> +#include <asm/leds.h> +#include <asm/irq.h> +#include <asm/mach/irq.h> +#include <asm/mach/time.h> +#include <asm/arch/dmtimer.h> + +struct sys_timer omap_timer; + +/* + * --------------------------------------------------------------------------- + * 32KHz OS timer + * + * This currently works only on 16xx, as 1510 does not have the continuous + * 32KHz synchronous timer. The 32KHz synchronous timer is used to keep track + * of time in addition to the 32KHz OS timer. Using only the 32KHz OS timer + * on 1510 would be possible, but the timer would not be as accurate as + * with the 32KHz synchronized timer. + * --------------------------------------------------------------------------- + */ + +#if defined(CONFIG_ARCH_OMAP16XX) +#define TIMER_32K_SYNCHRONIZED 0xfffbc410 +#elif defined(CONFIG_ARCH_OMAP24XX) +#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10) +#else +#error OMAP 32KHz timer does not currently work on 15XX! +#endif + +/* 16xx specific defines */ +#define OMAP1_32K_TIMER_BASE 0xfffb9000 +#define OMAP1_32K_TIMER_CR 0x08 +#define OMAP1_32K_TIMER_TVR 0x00 +#define OMAP1_32K_TIMER_TCR 0x04 + +#define OMAP_32K_TICKS_PER_SEC (32768) + +/* + * TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1 + * so with HZ = 128, TVR = 255. + */ +#define OMAP_32K_TIMER_TICK_PERIOD ((OMAP_32K_TICKS_PER_SEC / HZ) - 1) + +#define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate) \ + (((nr_jiffies) * (clock_rate)) / HZ) + +static inline void omap_32k_timer_write(int val, int reg) +{ + omap_writew(val, OMAP1_32K_TIMER_BASE + reg); +} + +static inline unsigned long omap_32k_timer_read(int reg) +{ + return omap_readl(OMAP1_32K_TIMER_BASE + reg) & 0xffffff; +} + +static inline void omap_32k_timer_start(unsigned long load_val) +{ + if (!load_val) + load_val = 1; + omap_32k_timer_write(load_val, OMAP1_32K_TIMER_TVR); + omap_32k_timer_write(0x0f, OMAP1_32K_TIMER_CR); +} + +static inline void omap_32k_timer_stop(void) +{ + omap_32k_timer_write(0x0, OMAP1_32K_TIMER_CR); +} + +#define omap_32k_timer_ack_irq() + +static void omap_32k_timer_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ + omap_32k_timer_stop(); + + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); + break; + case CLOCK_EVT_MODE_ONESHOT: + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + break; + case CLOCK_EVT_MODE_RESUME: + break; + } +} + +static struct clock_event_device clockevent_32k_timer = { + .name = "32k-timer", + .features = CLOCK_EVT_FEAT_PERIODIC, + .shift = 32, + .set_mode = omap_32k_timer_set_mode, +}; + +/* + * The 32KHz synchronized timer is an additional timer on 16xx. + * It is always running. + */ +static inline unsigned long omap_32k_sync_timer_read(void) +{ + return omap_readl(TIMER_32K_SYNCHRONIZED); +} + +static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evt = &clockevent_32k_timer; + omap_32k_timer_ack_irq(); + + evt->event_handler(evt); + + return IRQ_HANDLED; +} + +static struct irqaction omap_32k_timer_irq = { + .name = "32KHz timer", + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, + .handler = omap_32k_timer_interrupt, +}; + +static __init void omap_init_32k_timer(void) +{ + clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC, + NSEC_PER_SEC, + clockevent_32k_timer.shift); + clockevent_32k_timer.max_delta_ns = + clockevent_delta2ns(0xfffffffe, &clockevent_32k_timer); + clockevent_32k_timer.min_delta_ns = + clockevent_delta2ns(1, &clockevent_32k_timer); + + clockevent_32k_timer.cpumask = cpumask_of_cpu(0); + clockevents_register_device(&clockevent_32k_timer); +} + +/* + * --------------------------------------------------------------------------- + * Timer initialization + * --------------------------------------------------------------------------- + */ +static void __init omap_timer_init(void) +{ +#ifdef CONFIG_OMAP_DM_TIMER + omap_dm_timer_init(); +#endif + omap_init_32k_timer(); +} + +struct sys_timer omap_timer = { + .init = omap_timer_init, +}; diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index d91424e..bc639a3 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -9,10 +9,6 @@ obj-m := obj-n := obj- := -ifeq ($(CONFIG_ARCH_OMAP1),y) -obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o -endif - # OCPI interconnect support for 1710, 1610 and 5912 obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o diff --git a/arch/arm/plat-omap/timer32k.c b/arch/arm/plat-omap/timer32k.c deleted file mode 100644 index 1f7365f..0000000 --- a/arch/arm/plat-omap/timer32k.c +++ /dev/null @@ -1,201 +0,0 @@ -/* - * linux/arch/arm/plat-omap/timer32k.c - * - * OMAP 32K Timer - * - * Copyright (C) 2004 - 2005 Nokia Corporation - * Partial timer rewrite and additional dynamic tick timer support by - * Tony Lindgen <tony@atomide.com> and - * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> - * OMAP Dual-mode timer framework support by Timo Teras - * - * MPU timer code based on the older MPU timer code for OMAP - * Copyright (C) 2000 RidgeRun, Inc. - * Author: Greg Lonnon <glonnon@ridgerun.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/interrupt.h> -#include <linux/sched.h> -#include <linux/spinlock.h> - -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/clocksource.h> -#include <linux/clockchips.h> - -#include <asm/system.h> -#include <asm/hardware.h> -#include <asm/io.h> -#include <asm/leds.h> -#include <asm/irq.h> -#include <asm/mach/irq.h> -#include <asm/mach/time.h> -#include <asm/arch/dmtimer.h> - -struct sys_timer omap_timer; - -/* - * --------------------------------------------------------------------------- - * 32KHz OS timer - * - * This currently works only on 16xx, as 1510 does not have the continuous - * 32KHz synchronous timer. The 32KHz synchronous timer is used to keep track - * of time in addition to the 32KHz OS timer. Using only the 32KHz OS timer - * on 1510 would be possible, but the timer would not be as accurate as - * with the 32KHz synchronized timer. - * --------------------------------------------------------------------------- - */ - -#if defined(CONFIG_ARCH_OMAP16XX) -#define TIMER_32K_SYNCHRONIZED 0xfffbc410 -#elif defined(CONFIG_ARCH_OMAP24XX) -#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10) -#else -#error OMAP 32KHz timer does not currently work on 15XX! -#endif - -/* 16xx specific defines */ -#define OMAP1_32K_TIMER_BASE 0xfffb9000 -#define OMAP1_32K_TIMER_CR 0x08 -#define OMAP1_32K_TIMER_TVR 0x00 -#define OMAP1_32K_TIMER_TCR 0x04 - -#define OMAP_32K_TICKS_PER_SEC (32768) - -/* - * TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1 - * so with HZ = 128, TVR = 255. - */ -#define OMAP_32K_TIMER_TICK_PERIOD ((OMAP_32K_TICKS_PER_SEC / HZ) - 1) - -#define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate) \ - (((nr_jiffies) * (clock_rate)) / HZ) - -static inline void omap_32k_timer_write(int val, int reg) -{ - omap_writew(val, OMAP1_32K_TIMER_BASE + reg); -} - -static inline unsigned long omap_32k_timer_read(int reg) -{ - return omap_readl(OMAP1_32K_TIMER_BASE + reg) & 0xffffff; -} - -static inline void omap_32k_timer_start(unsigned long load_val) -{ - if (!load_val) - load_val = 1; - omap_32k_timer_write(load_val, OMAP1_32K_TIMER_TVR); - omap_32k_timer_write(0x0f, OMAP1_32K_TIMER_CR); -} - -static inline void omap_32k_timer_stop(void) -{ - omap_32k_timer_write(0x0, OMAP1_32K_TIMER_CR); -} - -#define omap_32k_timer_ack_irq() - -static void omap_32k_timer_set_mode(enum clock_event_mode mode, - struct clock_event_device *evt) -{ - omap_32k_timer_stop(); - - switch (mode) { - case CLOCK_EVT_MODE_PERIODIC: - omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); - break; - case CLOCK_EVT_MODE_ONESHOT: - case CLOCK_EVT_MODE_UNUSED: - case CLOCK_EVT_MODE_SHUTDOWN: - break; - case CLOCK_EVT_MODE_RESUME: - break; - } -} - -static struct clock_event_device clockevent_32k_timer = { - .name = "32k-timer", - .features = CLOCK_EVT_FEAT_PERIODIC, - .shift = 32, - .set_mode = omap_32k_timer_set_mode, -}; - -/* - * The 32KHz synchronized timer is an additional timer on 16xx. - * It is always running. - */ -static inline unsigned long omap_32k_sync_timer_read(void) -{ - return omap_readl(TIMER_32K_SYNCHRONIZED); -} - -static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id) -{ - struct clock_event_device *evt = &clockevent_32k_timer; - omap_32k_timer_ack_irq(); - - evt->event_handler(evt); - - return IRQ_HANDLED; -} - -static struct irqaction omap_32k_timer_irq = { - .name = "32KHz timer", - .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, - .handler = omap_32k_timer_interrupt, -}; - -static __init void omap_init_32k_timer(void) -{ - clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC, - NSEC_PER_SEC, - clockevent_32k_timer.shift); - clockevent_32k_timer.max_delta_ns = - clockevent_delta2ns(0xfffffffe, &clockevent_32k_timer); - clockevent_32k_timer.min_delta_ns = - clockevent_delta2ns(1, &clockevent_32k_timer); - - clockevent_32k_timer.cpumask = cpumask_of_cpu(0); - clockevents_register_device(&clockevent_32k_timer); -} - -/* - * --------------------------------------------------------------------------- - * Timer initialization - * --------------------------------------------------------------------------- - */ -static void __init omap_timer_init(void) -{ -#ifdef CONFIG_OMAP_DM_TIMER - omap_dm_timer_init(); -#endif - omap_init_32k_timer(); -} - -struct sys_timer omap_timer = { - .init = omap_timer_init, -}; -- 1.5.3.6 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up 2008-03-17 9:42 ` [PATCH 11/14] ARM: OMAP: Timer32K: Move timer32k to mach-omap1 Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 2008-03-17 9:42 ` [PATCH 13/14] ARM: OMAP: TimerMPU: Remove unused cycles-to-nsec conversions Tony Lindgren 2008-03-20 16:52 ` [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up Russell King - ARM Linux 0 siblings, 2 replies; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel; +Cc: linux-omap, Tony Lindgren This patch fixes timer32k for clockevents and syncs it with linux-omap tree. Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/mach-omap1/timer32k.c | 20 ++++++++++++++------ 1 files changed, 14 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index 1f7365f..c4af39a 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c @@ -1,5 +1,5 @@ /* - * linux/arch/arm/plat-omap/timer32k.c + * linux/arch/arm/mach-omap1/timer32k.c * * OMAP 32K Timer * @@ -40,7 +40,6 @@ #include <linux/interrupt.h> #include <linux/sched.h> #include <linux/spinlock.h> - #include <linux/err.h> #include <linux/clk.h> #include <linux/clocksource.h> @@ -71,8 +70,6 @@ struct sys_timer omap_timer; #if defined(CONFIG_ARCH_OMAP16XX) #define TIMER_32K_SYNCHRONIZED 0xfffbc410 -#elif defined(CONFIG_ARCH_OMAP24XX) -#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10) #else #error OMAP 32KHz timer does not currently work on 15XX! #endif @@ -119,6 +116,14 @@ static inline void omap_32k_timer_stop(void) #define omap_32k_timer_ack_irq() +static int omap_32k_timer_set_next_event(unsigned long delta, + struct clock_event_device *dev) +{ + omap_32k_timer_start(delta); + + return 0; +} + static void omap_32k_timer_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) { @@ -126,9 +131,9 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode, switch (mode) { case CLOCK_EVT_MODE_PERIODIC: + case CLOCK_EVT_MODE_ONESHOT: omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); break; - case CLOCK_EVT_MODE_ONESHOT: case CLOCK_EVT_MODE_UNUSED: case CLOCK_EVT_MODE_SHUTDOWN: break; @@ -139,8 +144,9 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode, static struct clock_event_device clockevent_32k_timer = { .name = "32k-timer", - .features = CLOCK_EVT_FEAT_PERIODIC, + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, .shift = 32, + .set_next_event = omap_32k_timer_set_next_event, .set_mode = omap_32k_timer_set_mode, }; @@ -171,6 +177,8 @@ static struct irqaction omap_32k_timer_irq = { static __init void omap_init_32k_timer(void) { + setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); + clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC, NSEC_PER_SEC, clockevent_32k_timer.shift); -- 1.5.3.6 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 13/14] ARM: OMAP: TimerMPU: Remove unused cycles-to-nsec conversions 2008-03-17 9:42 ` [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 2008-03-17 9:42 ` [PATCH 14/14] ARM: OMAP: TimerMPU: Remove MPU-timer based sched_clock() Tony Lindgren 2008-03-20 16:52 ` [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up Russell King - ARM Linux 1 sibling, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel; +Cc: linux-omap, Kevin Hilman, Tony Lindgren From: Kevin Hilman <khilman@mvista.com> These are no longer used and similar conversions are provided by the clocksource/clockevent code. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/mach-omap1/time.c | 33 --------------------------------- 1 files changed, 0 insertions(+), 33 deletions(-) diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index a4f8b20..f6cf2b7 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -56,37 +56,6 @@ #define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE #define OMAP_MPU_TIMER_OFFSET 0x100 -/* cycles to nsec conversions taken from arch/i386/kernel/timers/timer_tsc.c, - * converted to use kHz by Kevin Hilman */ -/* convert from cycles(64bits) => nanoseconds (64bits) - * basic equation: - * ns = cycles / (freq / ns_per_sec) - * ns = cycles * (ns_per_sec / freq) - * ns = cycles * (10^9 / (cpu_khz * 10^3)) - * ns = cycles * (10^6 / cpu_khz) - * - * Then we use scaling math (suggested by george at mvista.com) to get: - * ns = cycles * (10^6 * SC / cpu_khz / SC - * ns = cycles * cyc2ns_scale / SC - * - * And since SC is a constant power of two, we can convert the div - * into a shift. - * -johnstul at us.ibm.com "math is hard, lets go shopping!" - */ -static unsigned long cyc2ns_scale; -#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */ - -static inline void set_cyc2ns_scale(unsigned long cpu_khz) -{ - cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz; -} - -static inline unsigned long long cycles_2_ns(unsigned long long cyc) -{ - return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR; -} - - typedef struct { u32 cntl; /* CNTL_TIMER, R/W */ u32 load_tim; /* LOAD_TIM, W */ @@ -194,8 +163,6 @@ static struct irqaction omap_mpu_timer1_irq = { static __init void omap_init_mpu_timer(unsigned long rate) { - set_cyc2ns_scale(rate / 1000); - setup_irq(INT_TIMER1, &omap_mpu_timer1_irq); omap_mpu_timer_start(0, (rate / HZ) - 1, 1); -- 1.5.3.6 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 14/14] ARM: OMAP: TimerMPU: Remove MPU-timer based sched_clock() 2008-03-17 9:42 ` [PATCH 13/14] ARM: OMAP: TimerMPU: Remove unused cycles-to-nsec conversions Tony Lindgren @ 2008-03-17 9:42 ` Tony Lindgren 0 siblings, 0 replies; 22+ messages in thread From: Tony Lindgren @ 2008-03-17 9:42 UTC (permalink / raw) To: linux-arm-kernel; +Cc: linux-omap, Kevin Hilman, Tony Lindgren From: Kevin Hilman <khilman@mvista.com> Remove MPU-timer based sched_clock() in favor of the common one based on 32k sync timer which works across all OMAP1/2/3 platforms. Using 32k based one also gives a valid sched_clock() very early in the boot process. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/mach-omap1/time.c | 16 ---------------- 1 files changed, 0 insertions(+), 16 deletions(-) diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c index f6cf2b7..5d2b270 100644 --- a/arch/arm/mach-omap1/time.c +++ b/arch/arm/mach-omap1/time.c @@ -227,22 +227,6 @@ static void __init omap_init_clocksource(unsigned long rate) printk(err, clocksource_mpu.name); } - -/* - * Scheduler clock - returns current time in nanosec units. - */ -unsigned long long sched_clock(void) -{ - unsigned long ticks = 0 - omap_mpu_timer_read(1); - unsigned long long ticks64; - - ticks64 = omap_mpu_timer2_overflows; - ticks64 <<= 32; - ticks64 |= ticks; - - return cycles_2_ns(ticks64); -} - /* * --------------------------------------------------------------------------- * Timer initialization -- 1.5.3.6 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up 2008-03-17 9:42 ` [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up Tony Lindgren 2008-03-17 9:42 ` [PATCH 13/14] ARM: OMAP: TimerMPU: Remove unused cycles-to-nsec conversions Tony Lindgren @ 2008-03-20 16:52 ` Russell King - ARM Linux 2008-03-20 18:25 ` Kevin Hilman 1 sibling, 1 reply; 22+ messages in thread From: Russell King - ARM Linux @ 2008-03-20 16:52 UTC (permalink / raw) To: Tony Lindgren, Thomas Gleixner; +Cc: linux-arm-kernel, linux-omap On Mon, Mar 17, 2008 at 11:42:36AM +0200, Tony Lindgren wrote: > This patch fixes timer32k for clockevents and syncs it with > linux-omap tree. > > Signed-off-by: Tony Lindgren <tony@atomide.com> > --- > arch/arm/mach-omap1/timer32k.c | 20 ++++++++++++++------ > 1 files changed, 14 insertions(+), 6 deletions(-) > >... > @@ -126,9 +131,9 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode, > > switch (mode) { > case CLOCK_EVT_MODE_PERIODIC: > + case CLOCK_EVT_MODE_ONESHOT: > omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); > break; > - case CLOCK_EVT_MODE_ONESHOT: I didn't think an event was supposed to be programmed to fire when one shot mode is selected - from the other implementations, it appears that the timer should be disabled until set_next_event() has been called. However, this isn't documented anywhere. Thomas? ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up 2008-03-20 16:52 ` [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up Russell King - ARM Linux @ 2008-03-20 18:25 ` Kevin Hilman 2008-03-21 11:38 ` Thomas Gleixner 2008-03-21 12:04 ` Russell King - ARM Linux 0 siblings, 2 replies; 22+ messages in thread From: Kevin Hilman @ 2008-03-20 18:25 UTC (permalink / raw) To: Russell King - ARM Linux Cc: Tony Lindgren, Thomas Gleixner, linux-omap, linux-arm-kernel Russell King - ARM Linux <linux@arm.linux.org.uk> writes: > On Mon, Mar 17, 2008 at 11:42:36AM +0200, Tony Lindgren wrote: >> This patch fixes timer32k for clockevents and syncs it with >> linux-omap tree. >> >> Signed-off-by: Tony Lindgren <tony@atomide.com> >> --- >> arch/arm/mach-omap1/timer32k.c | 20 ++++++++++++++------ >> 1 files changed, 14 insertions(+), 6 deletions(-) >> >>... >> @@ -126,9 +131,9 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode, >> >> switch (mode) { >> case CLOCK_EVT_MODE_PERIODIC: >> + case CLOCK_EVT_MODE_ONESHOT: >> omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); >> break; >> - case CLOCK_EVT_MODE_ONESHOT: > > I didn't think an event was supposed to be programmed to fire when one > shot mode is selected - from the other implementations, it appears that > the timer should be disabled until set_next_event() has been called. That is correct. The 'start' should only be happening for the periodic mode. This following change should be done. Kevin diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index 905e735..0d9b02e 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c @@ -131,9 +131,8 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode, switch (mode) { case CLOCK_EVT_MODE_PERIODIC: - case CLOCK_EVT_MODE_ONESHOT: omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); - break; + case CLOCK_EVT_MODE_ONESHOT: case CLOCK_EVT_MODE_UNUSED: case CLOCK_EVT_MODE_SHUTDOWN: break; ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up 2008-03-20 18:25 ` Kevin Hilman @ 2008-03-21 11:38 ` Thomas Gleixner 2008-03-21 12:04 ` Russell King - ARM Linux 1 sibling, 0 replies; 22+ messages in thread From: Thomas Gleixner @ 2008-03-21 11:38 UTC (permalink / raw) To: Kevin Hilman Cc: Russell King - ARM Linux, Tony Lindgren, linux-omap, linux-arm-kernel On Thu, 20 Mar 2008, Kevin Hilman wrote: > Russell King - ARM Linux <linux@arm.linux.org.uk> writes: > > > On Mon, Mar 17, 2008 at 11:42:36AM +0200, Tony Lindgren wrote: > >> This patch fixes timer32k for clockevents and syncs it with > >> linux-omap tree. > >> > >> Signed-off-by: Tony Lindgren <tony@atomide.com> > >> --- > >> arch/arm/mach-omap1/timer32k.c | 20 ++++++++++++++------ > >> 1 files changed, 14 insertions(+), 6 deletions(-) > >> > >>... > >> @@ -126,9 +131,9 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode, > >> > >> switch (mode) { > >> case CLOCK_EVT_MODE_PERIODIC: > >> + case CLOCK_EVT_MODE_ONESHOT: > >> omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); > >> break; > >> - case CLOCK_EVT_MODE_ONESHOT: > > > > I didn't think an event was supposed to be programmed to fire when one > > shot mode is selected - from the other implementations, it appears that > > the timer should be disabled until set_next_event() has been called. > > That is correct. The 'start' should only be happening for the > periodic mode. This following change should be done. Yup. Oneshot mode is programmed from the clockevents framework. Thanks, tglx > Kevin > > > diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c > index 905e735..0d9b02e 100644 > --- a/arch/arm/mach-omap1/timer32k.c > +++ b/arch/arm/mach-omap1/timer32k.c > @@ -131,9 +131,8 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode, > > switch (mode) { > case CLOCK_EVT_MODE_PERIODIC: > - case CLOCK_EVT_MODE_ONESHOT: > omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); > - break; > + case CLOCK_EVT_MODE_ONESHOT: > case CLOCK_EVT_MODE_UNUSED: > case CLOCK_EVT_MODE_SHUTDOWN: > break; > ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up 2008-03-20 18:25 ` Kevin Hilman 2008-03-21 11:38 ` Thomas Gleixner @ 2008-03-21 12:04 ` Russell King - ARM Linux 2008-03-25 10:09 ` [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up, take #2 Tony Lindgren 1 sibling, 1 reply; 22+ messages in thread From: Russell King - ARM Linux @ 2008-03-21 12:04 UTC (permalink / raw) To: Kevin Hilman; +Cc: Tony Lindgren, linux-omap, linux-arm-kernel On Thu, Mar 20, 2008 at 11:25:52AM -0700, Kevin Hilman wrote: > Russell King - ARM Linux <linux@arm.linux.org.uk> writes: > > > On Mon, Mar 17, 2008 at 11:42:36AM +0200, Tony Lindgren wrote: > >> This patch fixes timer32k for clockevents and syncs it with > >> linux-omap tree. > >> > >> Signed-off-by: Tony Lindgren <tony@atomide.com> > >> --- > >> arch/arm/mach-omap1/timer32k.c | 20 ++++++++++++++------ > >> 1 files changed, 14 insertions(+), 6 deletions(-) > >> > >>... > >> @@ -126,9 +131,9 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode, > >> > >> switch (mode) { > >> case CLOCK_EVT_MODE_PERIODIC: > >> + case CLOCK_EVT_MODE_ONESHOT: > >> omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); > >> break; > >> - case CLOCK_EVT_MODE_ONESHOT: > > > > I didn't think an event was supposed to be programmed to fire when one > > shot mode is selected - from the other implementations, it appears that > > the timer should be disabled until set_next_event() has been called. > > That is correct. The 'start' should only be happening for the > periodic mode. This following change should be done. Or just omit the bogus change from the original patch. ------------------------------------------------------------------- List admin: http://lists.arm.linux.org.uk/mailman/listinfo/linux-arm-kernel FAQ: http://www.arm.linux.org.uk/mailinglists/faq.php Etiquette: http://www.arm.linux.org.uk/mailinglists/etiquette.php ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up, take #2 2008-03-21 12:04 ` Russell King - ARM Linux @ 2008-03-25 10:09 ` Tony Lindgren 2008-03-25 22:16 ` Russell King - ARM Linux 0 siblings, 1 reply; 22+ messages in thread From: Tony Lindgren @ 2008-03-25 10:09 UTC (permalink / raw) To: Russell King - ARM Linux Cc: Kevin Hilman, Thomas Gleixner, linux-omap, linux-arm-kernel [-- Attachment #1: Type: text/plain, Size: 1354 bytes --] * Russell King - ARM Linux <linux@arm.linux.org.uk> [080321 14:05]: > On Thu, Mar 20, 2008 at 11:25:52AM -0700, Kevin Hilman wrote: > > Russell King - ARM Linux <linux@arm.linux.org.uk> writes: > > > > > On Mon, Mar 17, 2008 at 11:42:36AM +0200, Tony Lindgren wrote: > > >> This patch fixes timer32k for clockevents and syncs it with > > >> linux-omap tree. > > >> > > >> Signed-off-by: Tony Lindgren <tony@atomide.com> > > >> --- > > >> arch/arm/mach-omap1/timer32k.c | 20 ++++++++++++++------ > > >> 1 files changed, 14 insertions(+), 6 deletions(-) > > >> > > >>... > > >> @@ -126,9 +131,9 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode, > > >> > > >> switch (mode) { > > >> case CLOCK_EVT_MODE_PERIODIC: > > >> + case CLOCK_EVT_MODE_ONESHOT: > > >> omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD); > > >> break; > > >> - case CLOCK_EVT_MODE_ONESHOT: > > > > > > I didn't think an event was supposed to be programmed to fire when one > > > shot mode is selected - from the other implementations, it appears that > > > the timer should be disabled until set_next_event() has been called. > > > > That is correct. The 'start' should only be happening for the > > periodic mode. This following change should be done. > > Or just omit the bogus change from the original patch. OK, here's the fixed patch. Tony [-- Attachment #2: omap-timer32k-clockevent.patch --] [-- Type: text/x-diff, Size: 2212 bytes --] >From c23b8d7f1a25aea1452a0d94799c62bba154edfc Mon Sep 17 00:00:00 2001 From: Tony Lindgren <tony@atomide.com> Date: Thu, 13 Mar 2008 08:47:21 +0200 Subject: [PATCH] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up This patch fixes timer32k for clockevents and syncs it with linux-omap tree. Signed-off-by: Tony Lindgren <tony@atomide.com> diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index 1f7365f..fbbdb80 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c @@ -1,5 +1,5 @@ /* - * linux/arch/arm/plat-omap/timer32k.c + * linux/arch/arm/mach-omap1/timer32k.c * * OMAP 32K Timer * @@ -40,7 +40,6 @@ #include <linux/interrupt.h> #include <linux/sched.h> #include <linux/spinlock.h> - #include <linux/err.h> #include <linux/clk.h> #include <linux/clocksource.h> @@ -71,8 +70,6 @@ struct sys_timer omap_timer; #if defined(CONFIG_ARCH_OMAP16XX) #define TIMER_32K_SYNCHRONIZED 0xfffbc410 -#elif defined(CONFIG_ARCH_OMAP24XX) -#define TIMER_32K_SYNCHRONIZED (OMAP24XX_32KSYNCT_BASE + 0x10) #else #error OMAP 32KHz timer does not currently work on 15XX! #endif @@ -119,6 +116,14 @@ static inline void omap_32k_timer_stop(void) #define omap_32k_timer_ack_irq() +static int omap_32k_timer_set_next_event(unsigned long delta, + struct clock_event_device *dev) +{ + omap_32k_timer_start(delta); + + return 0; +} + static void omap_32k_timer_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) { @@ -139,8 +144,9 @@ static void omap_32k_timer_set_mode(enum clock_event_mode mode, static struct clock_event_device clockevent_32k_timer = { .name = "32k-timer", - .features = CLOCK_EVT_FEAT_PERIODIC, + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, .shift = 32, + .set_next_event = omap_32k_timer_set_next_event, .set_mode = omap_32k_timer_set_mode, }; @@ -171,6 +177,8 @@ static struct irqaction omap_32k_timer_irq = { static __init void omap_init_32k_timer(void) { + setup_irq(INT_OS_TIMER, &omap_32k_timer_irq); + clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC, NSEC_PER_SEC, clockevent_32k_timer.shift); ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up, take #2 2008-03-25 10:09 ` [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up, take #2 Tony Lindgren @ 2008-03-25 22:16 ` Russell King - ARM Linux 2008-03-28 12:26 ` Tony Lindgren 0 siblings, 1 reply; 22+ messages in thread From: Russell King - ARM Linux @ 2008-03-25 22:16 UTC (permalink / raw) To: Tony Lindgren; +Cc: Kevin Hilman, Thomas Gleixner, linux-omap, linux-arm-kernel On Tue, Mar 25, 2008 at 12:09:41PM +0200, Tony Lindgren wrote: > * Russell King - ARM Linux <linux@arm.linux.org.uk> [080321 14:05]: > > Or just omit the bogus change from the original patch. > > OK, here's the fixed patch. Yup, is ok. ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up, take #2 2008-03-25 22:16 ` Russell King - ARM Linux @ 2008-03-28 12:26 ` Tony Lindgren 0 siblings, 0 replies; 22+ messages in thread From: Tony Lindgren @ 2008-03-28 12:26 UTC (permalink / raw) To: Russell King - ARM Linux Cc: Kevin Hilman, Thomas Gleixner, linux-omap, linux-arm-kernel * Russell King - ARM Linux <linux@arm.linux.org.uk> [080326 00:16]: > On Tue, Mar 25, 2008 at 12:09:41PM +0200, Tony Lindgren wrote: > > * Russell King - ARM Linux <linux@arm.linux.org.uk> [080321 14:05]: > > > Or just omit the bogus change from the original patch. > > > > OK, here's the fixed patch. > > Yup, is ok. I've posted this series as 4879/1 to the patch system. Tony ^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2008-03-28 12:26 UTC | newest] Thread overview: 22+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2008-03-17 9:42 [PATCH 0/14] Omap patches for post 2.6.25 Tony Lindgren 2008-03-17 9:42 ` [PATCH 1/14] ARM: OMAP: Use gpiolib Tony Lindgren 2008-03-17 9:42 ` [PATCH 2/14] ARM: OMAP: 5912 OSK GPIO updates Tony Lindgren 2008-03-17 9:42 ` [PATCH 3/14] ARM: OMAP: I2C: tps65010 driver converts to gpiolib Tony Lindgren 2008-03-17 9:42 ` [PATCH 4/14] ARM: OMAP: Use gpiolib with tps65010 for OSK 5912 Tony Lindgren 2008-03-17 9:42 ` [PATCH 5/14] ARM: OMAP: Clear level-triggered GPIO interrupts in unmask hook Tony Lindgren 2008-03-17 9:42 ` [PATCH 6/14] ARM: OMAP: use edge/level handlers from generic IRQ framework Tony Lindgren 2008-03-17 9:42 ` [PATCH 7/14] ARM: OMAP: Allow registering pin mux function Tony Lindgren 2008-03-17 9:42 ` [PATCH 8/14] ARM: OMAP: Split omap_cfg_reg() into omap processor specific functions Tony Lindgren 2008-03-17 9:42 ` [PATCH 9/14] ARM: OMAP: Timer32K: Re-organize duplicated 32k-timer code Tony Lindgren 2008-03-17 9:42 ` [PATCH 10/14] ARM: OMAP: Timer32K: Move 32k-based sched_clock() to common code Tony Lindgren 2008-03-17 9:42 ` [PATCH 11/14] ARM: OMAP: Timer32K: Move timer32k to mach-omap1 Tony Lindgren 2008-03-17 9:42 ` [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up Tony Lindgren 2008-03-17 9:42 ` [PATCH 13/14] ARM: OMAP: TimerMPU: Remove unused cycles-to-nsec conversions Tony Lindgren 2008-03-17 9:42 ` [PATCH 14/14] ARM: OMAP: TimerMPU: Remove MPU-timer based sched_clock() Tony Lindgren 2008-03-20 16:52 ` [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up Russell King - ARM Linux 2008-03-20 18:25 ` Kevin Hilman 2008-03-21 11:38 ` Thomas Gleixner 2008-03-21 12:04 ` Russell King - ARM Linux 2008-03-25 10:09 ` [PATCH 12/14] ARM: OMAP1: Timer32K: Fix timer32K for clockevents and clean it up, take #2 Tony Lindgren 2008-03-25 22:16 ` Russell King - ARM Linux 2008-03-28 12:26 ` Tony Lindgren
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