[PATCH 0/2] PRM/CM: Add several new PRM/CM mutator functions

[PATCH 0/2] PRM/CM: Add several new PRM/CM mutator functions

[Paul Walmsley]

Hello, 

The following two patches add several new PRM/CM manipulation functions
and convert existing code to use them when appropriate.  

At the moment, there are not very many users, but the (as yet unpublished)
PM patches make more extensive use of these.

Boot-tested on N800.

- Paul


size:

   text    data     bss     dec     hex filename
2812474  128976   86636 3028086  2e3476 vmlinux.orig
2812378  128976   86636 3027990  2e3416 vmlinux

diffstat:

 arch/arm/mach-omap2/clock.c       |    8 +++-----
 arch/arm/mach-omap2/clock24xx.c   |   15 ++++-----------
 arch/arm/mach-omap2/cm.h          |   34 +++++++++++++++++++++++++++++++++-
 arch/arm/mach-omap2/pm.c          |   19 +++++--------------
 arch/arm/mach-omap2/prcm.c        |   14 ++++++++------
 arch/arm/mach-omap2/prm.h         |   37 ++++++++++++++++++++++++++++++++++---
 drivers/dsp/dspgateway/dsp_core.c |   14 +++++---------
 7 files changed, 92 insertions(+), 49 deletions(-)

[PATCH 1/2] PRM/CM: Add new PRM/CM register bit manipulation functions

[Paul Walmsley]

[-- Attachment #1: add_new_prm_cm_mutator_fns.patch --]
[-- Type: TEXT/PLAIN, Size: 5074 bytes --]

This patch implements an idea from Igor Stoppa <igor.stoppa@nokia.com>
from last year.  We use functions to modify PRM/CM register bits,
rather than open-coding those operations.

The patch provides functions that do read + AND + OR + write sequences
on CM and PRM registers: {cm,prm}_rmw_reg_bits(), and
{cm,prm}_rmw_mod_reg_bits().  Several convenience functions are then
implemented on top of those functions for setting and clearing bits:
{cm,prm}_{set,clear}_mod_reg_bits().

These functions don't provide any locking; it is expected that the caller
will handle this.

Thanks to Jouni Högander <jouni.hogander@nokia.com> for catching some 
embarrassing errors in earlier versions of this code.

Signed-off-by: Paul Walmsley <paul@pwsan.com>

---
 arch/arm/mach-omap2/cm.h  |   34 +++++++++++++++++++++++++++++++++-
 arch/arm/mach-omap2/prm.h |   37 ++++++++++++++++++++++++++++++++++---
 2 files changed, 67 insertions(+), 4 deletions(-)

Index: linux-omap/arch/arm/mach-omap2/cm.h
===================================================================
--- linux-omap.orig/arch/arm/mach-omap2/cm.h	2008-03-30 16:15:32.000000000 -0600
+++ linux-omap/arch/arm/mach-omap2/cm.h	2008-03-30 16:27:15.000000000 -0600
@@ -14,6 +14,8 @@
  * published by the Free Software Foundation.
  */
 
+#include <asm/io.h>
+
 #include "prcm-common.h"
 
 #ifndef __ASSEMBLER__
@@ -54,6 +56,20 @@
 {
 	return __raw_readl(addr);
 }
+
+/* Read-modify-write bits in a CM register */
+static u32 __attribute__((unused)) cm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *va)
+{
+	u32 v;
+
+	v = cm_read_reg(va);
+	v &= ~mask;
+	v |= bits;
+	cm_write_reg(v, va);
+
+	return v;
+}
+
 #endif
 
 /*
@@ -83,7 +99,6 @@
 #define CM_CLKSEL2					0x0044
 #define CM_CLKSTCTRL					0x0048
 
-
 /* Architecture-specific registers */
 
 #define OMAP24XX_CM_FCLKEN2				0x0004
@@ -122,6 +137,23 @@
 {
 	return cm_read_reg(OMAP_CM_REGADDR(module, idx));
 }
+
+/* Read-modify-write bits in a CM register (by domain) */
+static inline u32 __attribute__((unused)) cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx)
+{
+	return cm_rmw_reg_bits(mask, bits, OMAP_CM_REGADDR(module, idx));
+}
+
+static inline u32 __attribute__((unused)) cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+	return cm_rmw_mod_reg_bits(bits, bits, module, idx);
+}
+
+static inline u32 __attribute__((unused)) cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+	return cm_rmw_mod_reg_bits(bits, 0x0, module, idx);
+}
+
 #endif
 
 /* CM register bits shared between 24XX and 3430 */
Index: linux-omap/arch/arm/mach-omap2/prm.h
===================================================================
--- linux-omap.orig/arch/arm/mach-omap2/prm.h	2008-03-30 16:15:32.000000000 -0600
+++ linux-omap/arch/arm/mach-omap2/prm.h	2008-03-30 16:27:15.000000000 -0600
@@ -4,8 +4,8 @@
 /*
  * OMAP2/3 Power/Reset Management (PRM) register definitions
  *
- * Copyright (C) 2007 Texas Instruments, Inc.
- * Copyright (C) 2007 Nokia Corporation
+ * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008 Nokia Corporation
  *
  * Written by Paul Walmsley
  *
@@ -14,6 +14,9 @@
  * published by the Free Software Foundation.
  */
 
+#include <asm/io.h>
+#include <asm/bitops.h>
+
 #include "prcm-common.h"
 
 #ifndef __ASSEMBLER__
@@ -61,7 +64,6 @@
 #define OMAP3430_PRM_IRQSTATUS_MPU	OMAP_PRM_REGADDR(OCP_MOD, 0x0018)
 #define OMAP3430_PRM_IRQENABLE_MPU	OMAP_PRM_REGADDR(OCP_MOD, 0x001c)
 
-
 #define OMAP3430_PRM_VC_SMPS_SA		OMAP_PRM_REGADDR(OMAP3430_GR_MOD, 0x0020)
 #define OMAP3430_PRM_VC_SMPS_VOL_RA	OMAP_PRM_REGADDR(OMAP3430_GR_MOD, 0x0024)
 #define OMAP3430_PRM_VC_SMPS_CMD_RA	OMAP_PRM_REGADDR(OMAP3430_GR_MOD, 0x0028)
@@ -113,6 +115,19 @@
 	return __raw_readl(addr);
 }
 
+/* Read-modify-write bits in a PRM register */
+static u32 __attribute__((unused)) prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *va)
+{
+	u32 v;
+
+	v = prm_read_reg(va);
+	v &= ~mask;
+	v |= bits;
+	prm_write_reg(v, va);
+
+	return v;
+}
+
 #endif
 
 /*
@@ -154,6 +169,22 @@
 #define OMAP3430_PRM_IRQSTATUS_IVA2			0x00f8
 #define OMAP3430_PRM_IRQENABLE_IVA2			0x00fc
 
+/* Read-modify-write bits in a PRM register (by domain) */
+static u32 __attribute__((unused)) prm_rmw_mod_reg_bits(u32 mask, u32 bits,
+							s16 module, s16 idx)
+{
+	return prm_rmw_reg_bits(mask, bits, OMAP_PRM_REGADDR(module, idx));
+}
+
+static u32 __attribute__((unused)) prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+	return prm_rmw_mod_reg_bits(bits, bits, module, idx);
+}
+
+static u32 __attribute__((unused)) prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
+{
+	return prm_rmw_mod_reg_bits(bits, 0x0, module, idx);
+}
 
 /* Architecture-specific registers */
 

-- 

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[PATCH 2/2] PRM/CM: Convert existing code to use PRM/CM RMW functions

[Paul Walmsley]

[-- Attachment #1: convert_code_to_use_cm_prm_rmw_funcs.patch --]
[-- Type: text/plain, Size: 6499 bytes --]

Convert existing code that reads, modifies, and writes back CM/PRM
register values to use the rmw functions introduced in the previous
patch.  This code should eventually disappear once clockdomain handling
is integrated into the 24xx clock framework.

Also restructure arch/arm/mach-omap2/prcm.c slightly while we
are here. 

Signed-off-by: Paul Walmsley <paul@pwsan.com>

---
 arch/arm/mach-omap2/clock.c       |    8 +++-----
 arch/arm/mach-omap2/clock24xx.c   |   15 ++++-----------
 arch/arm/mach-omap2/pm.c          |   19 +++++--------------
 arch/arm/mach-omap2/prcm.c        |   14 ++++++++------
 drivers/dsp/dspgateway/dsp_core.c |   14 +++++---------
 5 files changed, 25 insertions(+), 45 deletions(-)

Index: linux-omap/arch/arm/mach-omap2/clock.c
===================================================================
--- linux-omap.orig/arch/arm/mach-omap2/clock.c	2008-04-03 16:10:12.000000000 -0600
+++ linux-omap/arch/arm/mach-omap2/clock.c	2008-04-03 16:21:43.000000000 -0600
@@ -577,7 +577,7 @@
 
 int omap2_clksel_set_rate(struct clk *clk, unsigned long rate)
 {
-	u32 field_mask, field_val, reg_val, validrate, new_div = 0;
+	u32 field_mask, field_val, validrate, new_div = 0;
 	void __iomem *div_addr;
 
 	validrate = omap2_clksel_round_rate_div(clk, rate, &new_div);
@@ -592,10 +592,8 @@
 	if (field_val == ~0)
 		return -EINVAL;
 
-	reg_val = cm_read_reg(div_addr);
-	reg_val &= ~field_mask;
-	reg_val |= (field_val << __ffs(field_mask));
-	cm_write_reg(reg_val, div_addr);
+	cm_rmw_reg_bits(field_mask, field_val << __ffs(field_mask), div_addr);
+
 	wmb();
 
 	clk->rate = clk->parent->rate / new_div;
Index: linux-omap/arch/arm/mach-omap2/clock24xx.c
===================================================================
--- linux-omap.orig/arch/arm/mach-omap2/clock24xx.c	2008-04-03 16:10:12.000000000 -0600
+++ linux-omap/arch/arm/mach-omap2/clock24xx.c	2008-04-03 16:21:43.000000000 -0600
@@ -77,24 +77,17 @@
 
 static int omap2_enable_osc_ck(struct clk *clk)
 {
-	u32 pcc;
 
-	pcc = prm_read_reg(OMAP24XX_PRCM_CLKSRC_CTRL);
-
-	prm_write_reg(pcc & ~OMAP_AUTOEXTCLKMODE_MASK,
-		      OMAP24XX_PRCM_CLKSRC_CTRL);
+	prm_rmw_reg_bits(OMAP_AUTOEXTCLKMODE_MASK, ~OMAP_AUTOEXTCLKMODE_MASK,
+			 OMAP24XX_PRCM_CLKSRC_CTRL);
 
 	return 0;
 }
 
 static void omap2_disable_osc_ck(struct clk *clk)
 {
-	u32 pcc;
-
-	pcc = prm_read_reg(OMAP24XX_PRCM_CLKSRC_CTRL);
-
-	prm_write_reg(pcc | OMAP_AUTOEXTCLKMODE_MASK,
-		      OMAP24XX_PRCM_CLKSRC_CTRL);
+	prm_rmw_reg_bits(OMAP_AUTOEXTCLKMODE_MASK, OMAP_AUTOEXTCLKMODE_MASK,
+			 OMAP24XX_PRCM_CLKSRC_CTRL);
 }
 
 /* Enable an APLL if off */
Index: linux-omap/arch/arm/mach-omap2/pm.c
===================================================================
--- linux-omap.orig/arch/arm/mach-omap2/pm.c	2008-04-03 16:10:12.000000000 -0600
+++ linux-omap/arch/arm/mach-omap2/pm.c	2008-04-03 16:21:43.000000000 -0600
@@ -162,7 +162,6 @@
 {
 	const struct omap_serial_console_config *conf;
 	char name[16];
-	u32 l;
 
 	conf = omap_get_config(OMAP_TAG_SERIAL_CONSOLE,
 			       struct omap_serial_console_config);
@@ -185,19 +184,13 @@
 	}
 	switch (serial_console_uart) {
 	case 1:
-		l = prm_read_mod_reg(CORE_MOD, PM_WKEN1);
-		l |= OMAP24XX_ST_UART1;
-		prm_write_mod_reg(l, CORE_MOD, PM_WKEN1);
+		prm_set_mod_reg_bits(OMAP24XX_ST_UART1, CORE_MOD, PM_WKEN1)
 		break;
 	case 2:
-		l = prm_read_mod_reg(CORE_MOD, PM_WKEN1);
-		l |= OMAP24XX_ST_UART2;
-		prm_write_mod_reg(l, CORE_MOD, PM_WKEN1);
+		prm_set_mod_reg_bits(OMAP24XX_ST_UART2, CORE_MOD, PM_WKEN1)
 		break;
 	case 3:
-		l = prm_read_mod_reg(CORE_MOD, OMAP24XX_PM_WKEN2);
-		l |= OMAP24XX_ST_UART3;
-		prm_write_mod_reg(l, CORE_MOD, OMAP24XX_PM_WKEN2);
+		prm_set_mod_reg_bits(OMAP24XX_ST_UART3, CORE_MOD, PM_WKEN2)
 		break;
 	}
 }
@@ -445,10 +438,8 @@
 	prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
 	prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
 
-	/* wakeup domain events */
-	l = prm_read_mod_reg(WKUP_MOD, PM_WKST);
-	l &= 0x5;  /* bit 1: GPT1, bit5 GPIO */
-	prm_write_mod_reg(l, WKUP_MOD, PM_WKST);
+	/* wakeup domain events - bit 1: GPT1, bit5 GPIO */
+	prm_clear_mod_reg_bits(0x4 | 0x1, WKUP_MOD, PM_WKST);
 
 	/* MPU domain wake events */
 	l = prm_read_reg(OMAP24XX_PRCM_IRQSTATUS_MPU);
Index: linux-omap/arch/arm/mach-omap2/prcm.c
===================================================================
--- linux-omap.orig/arch/arm/mach-omap2/prcm.c	2008-04-03 16:10:12.000000000 -0600
+++ linux-omap/arch/arm/mach-omap2/prcm.c	2008-04-03 16:21:43.000000000 -0600
@@ -25,6 +25,7 @@
 
 u32 omap_prcm_get_reset_sources(void)
 {
+	/* XXX This presumably needs modification for 34XX */
 	return prm_read_mod_reg(WKUP_MOD, RM_RSTST) & 0x7f;
 }
 EXPORT_SYMBOL(omap_prcm_get_reset_sources);
@@ -32,15 +33,16 @@
 /* Resets clock rates and reboots the system. Only called from system.h */
 void omap_prcm_arch_reset(char mode)
 {
-	u32 wkup;
+	s16 prcm_offs;
 	omap2_clk_prepare_for_reboot();
 
 	if (cpu_is_omap24xx()) {
-		wkup = prm_read_mod_reg(WKUP_MOD, RM_RSTCTRL) | OMAP_RST_DPLL3;
-		prm_write_mod_reg(wkup, WKUP_MOD, RM_RSTCTRL);
+		prcm_offs = WKUP_MOD;
 	} else if (cpu_is_omap34xx()) {
-		wkup = prm_read_mod_reg(OMAP3430_GR_MOD, RM_RSTCTRL)
-							| OMAP_RST_DPLL3;
-		prm_write_mod_reg(wkup, OMAP3430_GR_MOD, RM_RSTCTRL);
+		prcm_offs = OMAP3430_GR_MOD;
+	} else {
+		WARN_ON(1);
 	}
+
+	prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs, RM_RSTCTRL);
 }
Index: linux-omap/drivers/dsp/dspgateway/dsp_core.c
===================================================================
--- linux-omap.orig/drivers/dsp/dspgateway/dsp_core.c	2008-04-03 16:10:12.000000000 -0600
+++ linux-omap/drivers/dsp/dspgateway/dsp_core.c	2008-04-03 16:23:08.000000000 -0600
@@ -460,19 +460,15 @@
 #elif defined(CONFIG_ARCH_OMAP2)
 static inline void dsp_clk_enable(void)
 {
-	u32 r;
-
 	/*XXX should be handled in mach-omap[1,2] XXX*/
 	prm_write_mod_reg(OMAP24XX_FORCESTATE | (1 << OMAP_POWERSTATE_SHIFT),
 			  OMAP24XX_DSP_MOD, PM_PWSTCTRL);
 
-	r = cm_read_mod_reg(OMAP24XX_DSP_MOD, CM_AUTOIDLE);
-	r |= OMAP2420_AUTO_DSP_IPI;
-	cm_write_mod_reg(r, OMAP24XX_DSP_MOD, CM_AUTOIDLE);
-
-	r = cm_read_mod_reg(OMAP24XX_DSP_MOD, CM_CLKSTCTRL);
-	r |= OMAP24XX_AUTOSTATE_DSP;
-	cm_write_mod_reg(r, OMAP24XX_DSP_MOD, CM_CLKSTCTRL);
+	cm_set_mod_reg_bits(OMAP2420_AUTO_DSP_IPI, OMAP24XX_DSP_MOD,
+			    CM_AUTOIDLE);
+
+	cm_set_mod_reg_bits(OMAP24XX_AUTOSTATE_DSP, OMAP24XX_DSP_MOD,
+			    CM_CLKSTCTRL);
 
 	clk_enable(dsp_fck_handle);
 	clk_enable(dsp_ick_handle);

-- 

Re: [PATCH 0/2] PRM/CM: Add several new PRM/CM mutator functions

[Tony Lindgren]

* Paul Walmsley <paul@pwsan.com> [080404 01:38]:
> 
> Hello, 
> 
> The following two patches add several new PRM/CM manipulation functions
> and convert existing code to use them when appropriate.  
> 
> At the moment, there are not very many users, but the (as yet unpublished)
> PM patches make more extensive use of these.
> 
> Boot-tested on N800.

Pushing today.

Tony


> - Paul
> 
> 
> size:
> 
>    text    data     bss     dec     hex filename
> 2812474  128976   86636 3028086  2e3476 vmlinux.orig
> 2812378  128976   86636 3027990  2e3416 vmlinux
> 
> diffstat:
> 
>  arch/arm/mach-omap2/clock.c       |    8 +++-----
>  arch/arm/mach-omap2/clock24xx.c   |   15 ++++-----------
>  arch/arm/mach-omap2/cm.h          |   34 +++++++++++++++++++++++++++++++++-
>  arch/arm/mach-omap2/pm.c          |   19 +++++--------------
>  arch/arm/mach-omap2/prcm.c        |   14 ++++++++------
>  arch/arm/mach-omap2/prm.h         |   37 ++++++++++++++++++++++++++++++++++---
>  drivers/dsp/dspgateway/dsp_core.c |   14 +++++---------
>  7 files changed, 92 insertions(+), 49 deletions(-)
> 
> 
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html