From: Paul Walmsley <paul@pwsan.com>
To: linux-omap@vger.kernel.org
Cc: Rajendra Nayak <rnayak@ti.com>
Subject: [PATCH 6/9] OMAP2 SDRC: add timing data for Qimonda HYB18M512160AF-6
Date: Mon, 07 Jul 2008 20:55:08 -0600 [thread overview]
Message-ID: <20080708025459.11646.15076.stgit@localhost.localdomain> (raw)
In-Reply-To: <20080708025225.11646.55912.stgit@localhost.localdomain>
Add timing data for the Qimonda HYB18M512160AF-6 SDRAM chip, used on
the OMAP3430SDP boards.
Thanks to Rajendra Nayak <rnayak@ti.com> for his help identifying
the chip used on 3430SDP.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/board-3430sdp.c | 4 +
.../mach-omap2/sdram-qimonda-hyb18m512160af-6.h | 55 ++++++++++++++++++++
2 files changed, 58 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 137486b..2b30aff 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -44,6 +44,8 @@
#include <asm/io.h>
#include <asm/delay.h>
+#include "sdram-qimonda-hyb18m512160af-6.h"
+
#define SDP3430_SMC91X_CS 3
#define ENABLE_VAUX3_DEDICATED 0x03
@@ -248,7 +250,7 @@ static inline void __init sdp3430_init_smc91x(void)
static void __init omap_3430sdp_init_irq(void)
{
- omap2_init_common_hw(NULL);
+ omap2_init_common_hw(hyb18m512160af6_sdrc_params);
omap_init_irq();
omap_gpio_init();
sdp3430_init_smc91x();
diff --git a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
new file mode 100644
index 0000000..c932a6d
--- /dev/null
+++ b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
@@ -0,0 +1,55 @@
+/*
+ * SDRC register values for the Qimonda HYB18M512160AF-6
+ *
+ * Copyright (C) 2008 Texas Instruments, Inc.
+ * Copyright (C) 2008 Nokia Corporation
+ *
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
+#define ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
+
+#include <asm/arch/sdrc.h>
+
+/* Qimonda HYB18M512160AF-6 */
+/* XXX Using ARE = 0x1 (no autorefresh burst) -- can this be changed? */
+static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = {
+ [0] = {
+ .rate = 165941176,
+ .actim_ctrla = 0x629db4c6,
+ .actim_ctrlb = 0x00012214,
+ .rfr_ctrl = 0x0004dc01,
+ .mr = 0x00000032,
+ },
+ [1] = {
+ .rate = 133333333,
+ .actim_ctrla = 0x5219b485,
+ .actim_ctrlb = 0x00012210,
+ .rfr_ctrl = 0x0003de01,
+ .mr = 0x00000032,
+ },
+ [2] = {
+ .rate = 82970588,
+ .actim_ctrla = 0x31512283,
+ .actim_ctrlb = 0x0001220a,
+ .rfr_ctrl = 0x00025501,
+ .mr = 0x00000022,
+ },
+ [3] = {
+ .rate = 66666666,
+ .actim_ctrla = 0x290d2243,
+ .actim_ctrlb = 0x00012208,
+ .rfr_ctrl = 0x0001d601,
+ .mr = 0x00000022,
+ },
+ [4] = {
+ .rate = 0
+ },
+};
+
+#endif
next prev parent reply other threads:[~2008-07-08 2:56 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-07-08 2:54 [PATCH 0/9] OMAP2/3 SDRC/clock: control CORE M2 divider, clean up SDRC Paul Walmsley
2008-07-08 2:54 ` [PATCH 1/9] OMAP2 SDRC: move mach-omap2/memory.h into include/asm-arm/arch-omap/sdrc.h Paul Walmsley
2008-07-08 2:54 ` [PATCH 2/9] OMAP2 SDRC: rename memory.c to sdrc2xxx.c Paul Walmsley
2008-07-08 2:54 ` [PATCH 3/9] OMAP2 SDRC: separate common OMAP2/3 code from OMAP2xxx code Paul Walmsley
2008-07-08 2:54 ` [PATCH 4/9] OMAP2 SDRC: add SDRAM timing parameter infrastructure Paul Walmsley
2008-07-08 2:54 ` [PATCH 5/9] OMAP2 SDRC: add timing data for Micron MT46H32M32LF-6 Paul Walmsley
2008-08-12 17:07 ` Steve Sakoman
2008-08-12 21:42 ` Paul Walmsley
2008-07-08 2:55 ` Paul Walmsley [this message]
2008-07-08 2:55 ` [PATCH 7/9] OMAP3 SRAM: remove unused functions; rename remainder Paul Walmsley
2008-07-08 2:55 ` [PATCH 8/9] OMAP3 clock/SRAM: fix CORE DPLL M2 divider mask Paul Walmsley
2008-07-08 2:55 ` [PATCH 9/9] OMAP3 clock: add omap3_core_dpll_m2_set_rate() Paul Walmsley
2008-07-08 4:20 ` Paul Walmsley
2008-07-08 4:37 ` [PATCH 0/9] OMAP2/3 SDRC/clock: control CORE M2 divider, clean up SDRC Rajendra Nayak
2008-07-08 22:12 ` Paul Walmsley
2008-07-08 23:12 ` Woodruff, Richard
2008-07-08 23:46 ` Paul Walmsley
2008-07-08 23:55 ` Woodruff, Richard
2008-07-09 1:06 ` Paul Walmsley
2008-07-15 7:58 ` Paul Walmsley
2008-07-09 4:42 ` Rajendra Nayak
2008-08-05 12:13 ` Tony Lindgren
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