[PATCH] OMAP: wait for pwrdm transition after clk_enable()

[PATCH] OMAP: wait for pwrdm transition after clk_enable()

[Tomi Valkeinen]

Enabling clock in a disabled power domain causes the power domain to be
turned on. However, the power transition is not always finished when
clk_enable() returns and this randomly crashes the kernel when an
interrupt happens right after the clk_enable, and the kernel tries to
read the irq status register for that domain.

Why the irq status register is inaccessible, I don't know. Also it
doesn't seem to be related to the module being not powered up, but to
the transition itself.

The same could perhaps happen after clk_disable also, but I have not
witnessed that.

The problem affects at least dss, cam and sgx clocks.

This change waits for the transition to be finished before returning
from omap2_clkdm_clk_enable().

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
---
 arch/arm/mach-omap2/clockdomain.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index fa62f14..f713d0b 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -567,6 +567,8 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
 	else
 		omap2_clkdm_wakeup(clkdm);
 
+	pwrdm_wait_transition(clkdm->pwrdm.ptr);
+
 	return 0;
 }
 
-- 
1.6.0.3

Re: [PATCH] OMAP: wait for pwrdm transition after clk_enable()

[Paul Walmsley]

On Fri, 12 Dec 2008, Tomi Valkeinen wrote:

> Enabling clock in a disabled power domain causes the power domain to be
> turned on. However, the power transition is not always finished when
> clk_enable() returns and this randomly crashes the kernel when an
> interrupt happens right after the clk_enable, and the kernel tries to
> read the irq status register for that domain.
> 
> Why the irq status register is inaccessible, I don't know. Also it
> doesn't seem to be related to the module being not powered up, but to
> the transition itself.
> 
> The same could perhaps happen after clk_disable also, but I have not
> witnessed that.
> 
> The problem affects at least dss, cam and sgx clocks.
> 
> This change waits for the transition to be finished before returning
> from omap2_clkdm_clk_enable().
> 
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>

Acked-by: Paul Walmsley <paul@pwsan.com>

- Paul

Re: [PATCH] OMAP: wait for pwrdm transition after clk_enable()

[Tony Lindgren]

* Paul Walmsley <paul@pwsan.com> [081215 14:37]:
> On Fri, 12 Dec 2008, Tomi Valkeinen wrote:
> 
> > Enabling clock in a disabled power domain causes the power domain to be
> > turned on. However, the power transition is not always finished when
> > clk_enable() returns and this randomly crashes the kernel when an
> > interrupt happens right after the clk_enable, and the kernel tries to
> > read the irq status register for that domain.
> > 
> > Why the irq status register is inaccessible, I don't know. Also it
> > doesn't seem to be related to the module being not powered up, but to
> > the transition itself.
> > 
> > The same could perhaps happen after clk_disable also, but I have not
> > witnessed that.
> > 
> > The problem affects at least dss, cam and sgx clocks.
> > 
> > This change waits for the transition to be finished before returning
> > from omap2_clkdm_clk_enable().
> > 
> > Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
> 
> Acked-by: Paul Walmsley <paul@pwsan.com>

Pushing to l-o tree, and adding to omap-fixes queue for upstream.

Tony