[PATCHv3] OMAP: Fix McBSP spin_lock deadlock

[PATCHv3] OMAP: Fix McBSP spin_lock deadlock

[Stanley.Miao]

A spin_lock deadlock will occur when omap_mcbsp_request() is invoked.

omap_mcbsp_request()         -->
clk_enable(mcbsp->clk)       --> clk_enable get clockfw_lock, then call ->
omap2_clk_enable()           -->
_omap2_clk_enable()          -->
omap_mcbsp_clk_enable()      -->
clk_enable(mcbsp_ick)        --> now clk_enable acquire clockfw_lock again.

mcbsp_clk is not the true clock, so delete it and ask omap_mcbsp_request
enable mcbsp_ick and mcbsp_fck directly.

Signed-off-by: Stanley.Miao <stanley.miao@windriver.com>
---
 arch/arm/mach-omap1/mcbsp.c             |  103 +++-----------------
 arch/arm/mach-omap2/mcbsp.c             |  162 +++++++------------------------
 arch/arm/plat-omap/include/mach/mcbsp.h |    6 +-
 arch/arm/plat-omap/mcbsp.c              |   47 ++++++---
 4 files changed, 85 insertions(+), 233 deletions(-)

diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index 7de7c69..5291e64 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -26,83 +26,6 @@
 #define DPS_RSTCT2_PER_EN	(1 << 0)
 #define DSP_RSTCT2_WD_PER_EN	(1 << 1)
 
-struct mcbsp_internal_clk {
-	struct clk clk;
-	struct clk **childs;
-	int n_childs;
-};
-
-#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
-static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
-{
-	const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
-	int i;
-
-	mclk->n_childs = ARRAY_SIZE(clk_names);
-	mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
-				GFP_KERNEL);
-
-	for (i = 0; i < mclk->n_childs; i++) {
-		/* We fake a platform device to get correct device id */
-		struct platform_device pdev;
-
-		pdev.dev.bus = &platform_bus_type;
-		pdev.id = mclk->clk.id;
-		mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
-		if (IS_ERR(mclk->childs[i]))
-			printk(KERN_ERR "Could not get clock %s (%d).\n",
-				clk_names[i], mclk->clk.id);
-	}
-}
-
-static int omap_mcbsp_clk_enable(struct clk *clk)
-{
-	struct mcbsp_internal_clk *mclk = container_of(clk,
-					struct mcbsp_internal_clk, clk);
-	int i;
-
-	for (i = 0; i < mclk->n_childs; i++)
-		clk_enable(mclk->childs[i]);
-	return 0;
-}
-
-static void omap_mcbsp_clk_disable(struct clk *clk)
-{
-	struct mcbsp_internal_clk *mclk = container_of(clk,
-					struct mcbsp_internal_clk, clk);
-	int i;
-
-	for (i = 0; i < mclk->n_childs; i++)
-		clk_disable(mclk->childs[i]);
-}
-
-static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
-	{
-		.clk = {
-			.name 		= "mcbsp_clk",
-			.id		= 1,
-			.enable		= omap_mcbsp_clk_enable,
-			.disable	= omap_mcbsp_clk_disable,
-		},
-	},
-	{
-		.clk = {
-			.name 		= "mcbsp_clk",
-			.id		= 3,
-			.enable		= omap_mcbsp_clk_enable,
-			.disable	= omap_mcbsp_clk_disable,
-		},
-	},
-};
-
-#define omap_mcbsp_clks_size	ARRAY_SIZE(omap_mcbsp_clks)
-#else
-#define omap_mcbsp_clks_size	0
-static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
-static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
-{ }
-#endif
-
 static void omap1_mcbsp_request(unsigned int id)
 {
 	/*
@@ -165,8 +88,9 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
 		.rx_irq		= INT_McBSP1RX,
 		.tx_irq		= INT_McBSP1TX,
 		.ops		= &omap1_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
-		},
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+	},
 	{
 		.phys_base	= OMAP1510_MCBSP2_BASE,
 		.dma_rx_sync	= OMAP_DMA_MCBSP2_RX,
@@ -182,7 +106,9 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
 		.rx_irq		= INT_McBSP3RX,
 		.tx_irq		= INT_McBSP3TX,
 		.ops		= &omap1_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 };
 #define OMAP15XX_MCBSP_PDATA_SZ		ARRAY_SIZE(omap15xx_mcbsp_pdata)
@@ -200,7 +126,9 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
 		.rx_irq		= INT_McBSP1RX,
 		.tx_irq		= INT_McBSP1TX,
 		.ops		= &omap1_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 	{
 		.phys_base	= OMAP1610_MCBSP2_BASE,
@@ -217,7 +145,9 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
 		.rx_irq		= INT_McBSP3RX,
 		.tx_irq		= INT_McBSP3TX,
 		.ops		= &omap1_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 };
 #define OMAP16XX_MCBSP_PDATA_SZ		ARRAY_SIZE(omap16xx_mcbsp_pdata)
@@ -228,15 +158,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
 
 int __init omap1_mcbsp_init(void)
 {
-	int i;
-
-	for (i = 0; i < omap_mcbsp_clks_size; i++) {
-		if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
-			omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
-			clk_register(&omap_mcbsp_clks[i].clk);
-		}
-	}
-
 	if (cpu_is_omap730())
 		omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ;
 	if (cpu_is_omap15xx())
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c
index b40b29a..3799ed6 100644
--- a/arch/arm/mach-omap2/mcbsp.c
+++ b/arch/arm/mach-omap2/mcbsp.c
@@ -22,112 +22,6 @@
 #include <mach/cpu.h>
 #include <mach/mcbsp.h>
 
-struct mcbsp_internal_clk {
-	struct clk clk;
-	struct clk **childs;
-	int n_childs;
-};
-
-#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
-static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
-{
-	const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" };
-	int i;
-
-	mclk->n_childs = ARRAY_SIZE(clk_names);
-	mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
-				GFP_KERNEL);
-
-	for (i = 0; i < mclk->n_childs; i++) {
-		/* We fake a platform device to get correct device id */
-		struct platform_device pdev;
-
-		pdev.dev.bus = &platform_bus_type;
-		pdev.id = mclk->clk.id;
-		mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
-		if (IS_ERR(mclk->childs[i]))
-			printk(KERN_ERR "Could not get clock %s (%d).\n",
-				clk_names[i], mclk->clk.id);
-	}
-}
-
-static int omap_mcbsp_clk_enable(struct clk *clk)
-{
-	struct mcbsp_internal_clk *mclk = container_of(clk,
-					struct mcbsp_internal_clk, clk);
-	int i;
-
-	for (i = 0; i < mclk->n_childs; i++)
-		clk_enable(mclk->childs[i]);
-	return 0;
-}
-
-static void omap_mcbsp_clk_disable(struct clk *clk)
-{
-	struct mcbsp_internal_clk *mclk = container_of(clk,
-					struct mcbsp_internal_clk, clk);
-	int i;
-
-	for (i = 0; i < mclk->n_childs; i++)
-		clk_disable(mclk->childs[i]);
-}
-
-static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
-	{
-		.clk = {
-			.name 		= "mcbsp_clk",
-			.id		= 1,
-			.clkdm		= { .name = "virt_opp_clkdm" },
-			.enable		= omap_mcbsp_clk_enable,
-			.disable	= omap_mcbsp_clk_disable,
-		},
-	},
-	{
-		.clk = {
-			.name 		= "mcbsp_clk",
-			.id		= 2,
-			.clkdm		= { .name = "virt_opp_clkdm" },
-			.enable		= omap_mcbsp_clk_enable,
-			.disable	= omap_mcbsp_clk_disable,
-		},
-	},
-	{
-		.clk = {
-			.name		= "mcbsp_clk",
-			.id		= 3,
-			.clkdm		= { .name = "virt_opp_clkdm" },
-			.enable		= omap_mcbsp_clk_enable,
-			.disable	= omap_mcbsp_clk_disable,
-		},
-	},
-	{
-		.clk = {
-			.name		= "mcbsp_clk",
-			.id		= 4,
-			.clkdm		= { .name = "virt_opp_clkdm" },
-			.enable		= omap_mcbsp_clk_enable,
-			.disable	= omap_mcbsp_clk_disable,
-		},
-	},
-	{
-		.clk = {
-			.name		= "mcbsp_clk",
-			.id		= 5,
-			.clkdm		= { .name = "virt_opp_clkdm" },
-			.enable		= omap_mcbsp_clk_enable,
-			.disable	= omap_mcbsp_clk_disable,
-		},
-	},
-};
-
-#define omap_mcbsp_clks_size	ARRAY_SIZE(omap_mcbsp_clks)
-#else
-#define omap_mcbsp_clks_size	0
-static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
-static inline void omap_mcbsp_clk_init(struct clk *clk)
-{ }
-#endif
-
 static void omap2_mcbsp2_mux_setup(void)
 {
 	omap_cfg_reg(Y15_24XX_MCBSP2_CLKX);
@@ -159,7 +53,9 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
 		.rx_irq		= INT_24XX_MCBSP1_IRQ_RX,
 		.tx_irq		= INT_24XX_MCBSP1_IRQ_TX,
 		.ops		= &omap2_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 	{
 		.phys_base	= OMAP24XX_MCBSP2_BASE,
@@ -168,7 +64,9 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
 		.rx_irq		= INT_24XX_MCBSP2_IRQ_RX,
 		.tx_irq		= INT_24XX_MCBSP2_IRQ_TX,
 		.ops		= &omap2_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 };
 #define OMAP2420_MCBSP_PDATA_SZ		ARRAY_SIZE(omap2420_mcbsp_pdata)
@@ -186,7 +84,9 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
 		.rx_irq		= INT_24XX_MCBSP1_IRQ_RX,
 		.tx_irq		= INT_24XX_MCBSP1_IRQ_TX,
 		.ops		= &omap2_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 	{
 		.phys_base	= OMAP24XX_MCBSP2_BASE,
@@ -195,7 +95,9 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
 		.rx_irq		= INT_24XX_MCBSP2_IRQ_RX,
 		.tx_irq		= INT_24XX_MCBSP2_IRQ_TX,
 		.ops		= &omap2_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 	{
 		.phys_base	= OMAP2430_MCBSP3_BASE,
@@ -204,7 +106,9 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
 		.rx_irq		= INT_24XX_MCBSP3_IRQ_RX,
 		.tx_irq		= INT_24XX_MCBSP3_IRQ_TX,
 		.ops		= &omap2_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 	{
 		.phys_base	= OMAP2430_MCBSP4_BASE,
@@ -213,7 +117,9 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
 		.rx_irq		= INT_24XX_MCBSP4_IRQ_RX,
 		.tx_irq		= INT_24XX_MCBSP4_IRQ_TX,
 		.ops		= &omap2_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 	{
 		.phys_base	= OMAP2430_MCBSP5_BASE,
@@ -222,7 +128,9 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
 		.rx_irq		= INT_24XX_MCBSP5_IRQ_RX,
 		.tx_irq		= INT_24XX_MCBSP5_IRQ_TX,
 		.ops		= &omap2_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 };
 #define OMAP2430_MCBSP_PDATA_SZ		ARRAY_SIZE(omap2430_mcbsp_pdata)
@@ -240,7 +148,9 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
 		.rx_irq		= INT_24XX_MCBSP1_IRQ_RX,
 		.tx_irq		= INT_24XX_MCBSP1_IRQ_TX,
 		.ops		= &omap2_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 	{
 		.phys_base	= OMAP34XX_MCBSP2_BASE,
@@ -249,7 +159,9 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
 		.rx_irq		= INT_24XX_MCBSP2_IRQ_RX,
 		.tx_irq		= INT_24XX_MCBSP2_IRQ_TX,
 		.ops		= &omap2_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 	{
 		.phys_base	= OMAP34XX_MCBSP3_BASE,
@@ -258,7 +170,9 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
 		.rx_irq		= INT_24XX_MCBSP3_IRQ_RX,
 		.tx_irq		= INT_24XX_MCBSP3_IRQ_TX,
 		.ops		= &omap2_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 	{
 		.phys_base	= OMAP34XX_MCBSP4_BASE,
@@ -267,7 +181,9 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
 		.rx_irq		= INT_24XX_MCBSP4_IRQ_RX,
 		.tx_irq		= INT_24XX_MCBSP4_IRQ_TX,
 		.ops		= &omap2_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 	{
 		.phys_base	= OMAP34XX_MCBSP5_BASE,
@@ -276,7 +192,9 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
 		.rx_irq		= INT_24XX_MCBSP5_IRQ_RX,
 		.tx_irq		= INT_24XX_MCBSP5_IRQ_TX,
 		.ops		= &omap2_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.ick_name       = "mcbsp_ick",
+		.fck_name       = "mcbsp_fck",
+
 	},
 };
 #define OMAP34XX_MCBSP_PDATA_SZ		ARRAY_SIZE(omap34xx_mcbsp_pdata)
@@ -287,14 +205,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = {
 
 static int __init omap2_mcbsp_init(void)
 {
-	int i;
-
-	for (i = 0; i < omap_mcbsp_clks_size; i++) {
-		/* Once we call clk_get inside init, we do not register it */
-		omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
-		clk_register(&omap_mcbsp_clks[i].clk);
-	}
-
 	if (cpu_is_omap2420())
 		omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ;
 	if (cpu_is_omap2430())
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index cc48f2f..4b7a938 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -340,7 +340,8 @@ struct omap_mcbsp_platform_data {
 	u8 dma_rx_sync, dma_tx_sync;
 	u16 rx_irq, tx_irq;
 	struct omap_mcbsp_ops *ops;
-	char const *clk_name;
+	char const *ick_name;
+	char const *fck_name;
 };
 
 struct omap_mcbsp {
@@ -372,7 +373,8 @@ struct omap_mcbsp {
 	/* Protect the field .free, while checking if the mcbsp is in use */
 	spinlock_t lock;
 	struct omap_mcbsp_platform_data *pdata;
-	struct clk *clk;
+	struct clk *ick;
+	struct clk *fck;
 };
 extern struct omap_mcbsp **mcbsp_ptr;
 extern int omap_mcbsp_count;
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index f2401a8..64fee7d 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -225,7 +225,8 @@ int omap_mcbsp_request(unsigned int id)
 	if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
 		mcbsp->pdata->ops->request(id);
 
-	clk_enable(mcbsp->clk);
+	clk_enable(mcbsp->ick);
+	clk_enable(mcbsp->fck);
 
 	spin_lock(&mcbsp->lock);
 	if (!mcbsp->free) {
@@ -286,7 +287,8 @@ void omap_mcbsp_free(unsigned int id)
 	if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
 		mcbsp->pdata->ops->free(id);
 
-	clk_disable(mcbsp->clk);
+	clk_disable(mcbsp->fck);
+	clk_disable(mcbsp->ick);
 
 	spin_lock(&mcbsp->lock);
 	if (mcbsp->free) {
@@ -916,14 +918,26 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
 	mcbsp->dma_rx_sync = pdata->dma_rx_sync;
 	mcbsp->dma_tx_sync = pdata->dma_tx_sync;
 
-	if (pdata->clk_name)
-		mcbsp->clk = clk_get(&pdev->dev, pdata->clk_name);
-	if (IS_ERR(mcbsp->clk)) {
-		dev_err(&pdev->dev,
-			"Invalid clock configuration for McBSP%d.\n",
-			mcbsp->id);
-		ret = PTR_ERR(mcbsp->clk);
-		goto err_clk;
+	if (pdata->ick_name) {
+		mcbsp->ick = clk_get(&pdev->dev, pdata->ick_name);
+		if (IS_ERR(mcbsp->ick)) {
+			dev_err(&pdev->dev,
+				"Invalid ick configuration for McBSP%d.\n",
+				mcbsp->id);
+			ret = PTR_ERR(mcbsp->ick);
+			goto err_clk2;
+		}
+	}
+
+	if (pdata->fck_name) {
+		mcbsp->fck = clk_get(&pdev->dev, pdata->fck_name);
+		if (IS_ERR(mcbsp->fck)) {
+			dev_err(&pdev->dev,
+				"Invalid fck configuration for McBSP%d.\n",
+				mcbsp->id);
+			ret = PTR_ERR(mcbsp->fck);
+			goto err_clk1;
+		}
 	}
 
 	mcbsp->pdata = pdata;
@@ -931,7 +945,9 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, mcbsp);
 	return 0;
 
-err_clk:
+err_clk1:
+	clk_put(mcbsp->ick);
+err_clk2:
 	iounmap(mcbsp->io_base);
 err_ioremap:
 	mcbsp->free = 0;
@@ -950,12 +966,15 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
 				mcbsp->pdata->ops->free)
 			mcbsp->pdata->ops->free(mcbsp->id);
 
-		clk_disable(mcbsp->clk);
-		clk_put(mcbsp->clk);
+		clk_disable(mcbsp->fck);
+		clk_disable(mcbsp->ick);
+		clk_put(mcbsp->fck);
+		clk_put(mcbsp->ick);
 
 		iounmap(mcbsp->io_base);
 
-		mcbsp->clk = NULL;
+		mcbsp->fck = NULL;
+		mcbsp->ick = NULL;
 		mcbsp->free = 0;
 		mcbsp->dev = NULL;
 	}
-- 
1.5.6.3

OMAP3430 clock settings

[Krishna Kishore]

 
Hi,

   How do we find out clock settings on OMAP3430?
 
   We need to find this out during runtime. Which register to read and
how to 
   know the clock settings of DSP, ARM and L3?

Regards,
Kishore.
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Re: OMAP3430 clock settings

[Ramesh Gupta Guntha]

Hi Krishna,

On 1/14/09, Krishna Kishore <krishna.kishore@sasken.com> wrote:

>   We need to find this out during runtime. Which register to read and
> how to
>   know the clock settings of DSP, ARM and L3?

Please refer to PRCM and Interconnect sections of the TRM, you may be
interested in IVA2_CM, MPU_CM etc.

thanks
Ramesh

RE: OMAP3430 clock settings

[Krishna Kishore]

Hi Ramesh Guptha,

   Thanks a lot for your response.

   We can check this PRCM section. 
   After reading IVA2_CM and MPU_CM registers, I want to know how to
calculate the clock speeds.
   Since this procedure/formula will already be known, can you please
let me know?

Regards,
Kishore.
 

-----Original Message-----
From: Ramesh Gupta Guntha [mailto:grgupta77@gmail.com] 
Sent: Wednesday, January 14, 2009 2:31 PM
To: Krishna Kishore
Cc: linux-omap@vger.kernel.org
Subject: Re: OMAP3430 clock settings

Hi Krishna,

On 1/14/09, Krishna Kishore <krishna.kishore@sasken.com> wrote:

>   We need to find this out during runtime. Which register to read and 
> how to
>   know the clock settings of DSP, ARM and L3?

Please refer to PRCM and Interconnect sections of the TRM, you may be
interested in IVA2_CM, MPU_CM etc.

thanks
Ramesh
SASKEN BUSINESS DISCLAIMER
-------------------------
This message may contain confidential, proprietary or legally privileged information. In 
case you are not the original intended Recipient of the message, you must not, directly or 
indirectly, use, Disclose, distribute, print, or copy any part of this message and you are 
requested to delete it and inform the sender. Any views expressed in this message are 
those of the individual sender unless otherwise stated. Nothing contained in this message 
shall be construed as an offer or acceptance of any offer by Sasken Communication 
Technologies Limited ("Sasken") unless sent with that express intent and with due 
authority of Sasken. Sasken has taken enough precautions to prevent the spread of 
viruses. However the company accepts no liability for any damage caused by any virus 
transmitted by this email

Re: OMAP3430 clock settings

[David Brownell]

On Wednesday 14 January 2009, Krishna Kishore wrote:
> 
>    After reading IVA2_CM and MPU_CM registers, I want to know how to
> calculate the clock speeds.

You should be using the clock framework.  If you do that,
then clk_get_rate() does that for you.

- Dave

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RE: OMAP3430 clock settings

[Kanigeri, Hari]

Kishore,

>    We need to find this out during runtime. Which register to read and
> how to
>    know the clock settings of DSP, ARM and L3?

-- You can use this small utility to read/write/dump register values from user space. This is only for debug purpose if you want to peek and poke at some registers from user space.

https://omapzoom.org/gf/download/frsrelease/152/964/debuginfo.out

The usage is

For reading 
./debuginfo.out r  <Hex registerAddress without 0x prefix> <regAccessSize =8, 16, 32>

Eg: to read PM_PWSTCTRL_IVA2 register, it would be
./debuginfo.out r 483060E0 32

For writing
 # ./debuginfo.out  w <Hex registerAddress without 0x prefix> <regAccessSize =8, 16, 32> <value>

Eg: to write to PM_PWSTCTRL_IVA2 register, it would be
./debuginfo.out w 483060E0 32 <value>

For Dump
 # ./debuginfo.out a  <Hex registerAddress without 0x prefix> <numOfWordsToDump>

Eg: To dump first 100 values of IVA2_PRM registers
./debuginfo.out a  48306000 100

Thank you,
Best regards,
Hari

> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> owner@vger.kernel.org] On Behalf Of Krishna Kishore
> Sent: Wednesday, January 14, 2009 1:41 AM
> To: linux-omap@vger.kernel.org
> Subject: OMAP3430 clock settings
> 
> 
> Hi,
> 
>    How do we find out clock settings on OMAP3430?
> 
>    We need to find this out during runtime. Which register to read and
> how to
>    know the clock settings of DSP, ARM and L3?
> 
> Regards,
> Kishore.
> SASKEN BUSINESS DISCLAIMER
> -------------------------
> This message may contain confidential, proprietary or legally privileged
> information. In
> case you are not the original intended Recipient of the message, you must
> not, directly or
> indirectly, use, Disclose, distribute, print, or copy any part of this
> message and you are
> requested to delete it and inform the sender. Any views expressed in this
> message are
> those of the individual sender unless otherwise stated. Nothing contained
> in this message
> shall be construed as an offer or acceptance of any offer by Sasken
> Communication
> Technologies Limited ("Sasken") unless sent with that express intent and
> with due
> authority of Sasken. Sasken has taken enough precautions to prevent the
> spread of
> viruses. However the company accepts no liability for any damage caused by
> any virus
> transmitted by this email
> 
> --
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> the body of a message to majordomo@vger.kernel.org
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RE: OMAP3430 clock settings

[Krishna Kishore]

Hi Hari,

  Thanks for providing this utility.

  This is useful to read the values of registers from user space.

  Can you please help us further by letting us know how to find out 
  clock speeds of DSP, ARM, L3?

  There are some multiplication factors to be used to arrive at
  clock speeds. Can you please let us know the procedure since it is 
  already known?

Regards,
Kishore. 

-----Original Message-----
From: Kanigeri, Hari [mailto:h-kanigeri2@ti.com] 
Sent: Thursday, January 15, 2009 10:25 PM
To: Krishna Kishore; linux-omap@vger.kernel.org
Subject: RE: OMAP3430 clock settings


Kishore,

>    We need to find this out during runtime. Which register to read and

> how to
>    know the clock settings of DSP, ARM and L3?

-- You can use this small utility to read/write/dump register values
from user space. This is only for debug purpose if you want to peek and
poke at some registers from user space.

https://omapzoom.org/gf/download/frsrelease/152/964/debuginfo.out

The usage is

For reading
./debuginfo.out r  <Hex registerAddress without 0x prefix>
<regAccessSize =8, 16, 32>

Eg: to read PM_PWSTCTRL_IVA2 register, it would be ./debuginfo.out r
483060E0 32

For writing
 # ./debuginfo.out  w <Hex registerAddress without 0x prefix>
<regAccessSize =8, 16, 32> <value>

Eg: to write to PM_PWSTCTRL_IVA2 register, it would be ./debuginfo.out w
483060E0 32 <value>

For Dump
 # ./debuginfo.out a  <Hex registerAddress without 0x prefix>
<numOfWordsToDump>

Eg: To dump first 100 values of IVA2_PRM registers ./debuginfo.out a
48306000 100

Thank you,
Best regards,
Hari

> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org [mailto:linux-omap- 
> owner@vger.kernel.org] On Behalf Of Krishna Kishore
> Sent: Wednesday, January 14, 2009 1:41 AM
> To: linux-omap@vger.kernel.org
> Subject: OMAP3430 clock settings
> 
> 
> Hi,
> 
>    How do we find out clock settings on OMAP3430?
> 
>    We need to find this out during runtime. Which register to read and

> how to
>    know the clock settings of DSP, ARM and L3?
> 
> Regards,
> Kishore.
> SASKEN BUSINESS DISCLAIMER
> -------------------------
> This message may contain confidential, proprietary or legally 
> privileged information. In case you are not the original intended 
> Recipient of the message, you must not, directly or indirectly, use, 
> Disclose, distribute, print, or copy any part of this message and you 
> are requested to delete it and inform the sender. Any views expressed 
> in this message are those of the individual sender unless otherwise 
> stated. Nothing contained in this message shall be construed as an 
> offer or acceptance of any offer by Sasken Communication Technologies 
> Limited ("Sasken") unless sent with that express intent and with due 
> authority of Sasken. Sasken has taken enough precautions to prevent 
> the spread of viruses. However the company accepts no liability for 
> any damage caused by any virus transmitted by this email
> 
> --
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> in the body of a message to majordomo@vger.kernel.org More majordomo 
> info at  http://vger.kernel.org/majordomo-info.html

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-------------------------
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indirectly, use, Disclose, distribute, print, or copy any part of this message and you are 
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viruses. However the company accepts no liability for any damage caused by any virus 
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