From: Paul Walmsley <paul@pwsan.com>
To: linux-arm-kernel@lists.arm.linux.org.uk, linux-kernel@vger.kernel.org
Cc: linux-omap@vger.kernel.org, Paul Walmsley <paul@pwsan.com>,
Tony Lindgren <tony@atomide.com>
Subject: [PATCH C 03/13] OMAP3 clock: convert dpll_data.idlest_bit to idlest_mask
Date: Wed, 28 Jan 2009 12:08:17 -0700 [thread overview]
Message-ID: <20090128190814.12092.3911.stgit@localhost.localdomain> (raw)
In-Reply-To: <20090128190724.12092.22239.stgit@localhost.localdomain>
Convert struct dpll_data.idlest_bit field to idlest_mask. Needed since
OMAP2 uses two bits for DPLL IDLEST rather than one.
While here, add the missing idlest_* fields for DPLL3.
linux-omap source commits are 25bab0f176b0a97be18a1b38153f266c3a155784
and b0f7fd17db2aaf8e6e9a2732ae3f4de0874db01c.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/clock34xx.c | 6 ++----
arch/arm/mach-omap2/clock34xx.h | 10 ++++++----
arch/arm/plat-omap/include/mach/clock.h | 4 ++--
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index ff43058..0f493f5 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -78,14 +78,12 @@ static int _omap3_wait_dpll_status(struct clk *clk, u8 state)
const struct dpll_data *dd;
int i = 0;
int ret = -EINVAL;
- u32 idlest_mask;
dd = clk->dpll_data;
- state <<= dd->idlest_bit;
- idlest_mask = 1 << dd->idlest_bit;
+ state <<= __ffs(dd->idlest_mask);
- while (((__raw_readl(dd->idlest_reg) & idlest_mask) != state) &&
+ while (((__raw_readl(dd->idlest_reg) & dd->idlest_mask) != state) &&
i < MAX_DPLL_WAIT_TRIES) {
i++;
udelay(1);
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 9d123c6..277b221 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -303,7 +303,7 @@ static struct dpll_data dpll1_dd = {
.autoidle_reg = _OMAP34XX_CM_REGADDR(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL),
.autoidle_mask = OMAP3430_AUTO_MPU_DPLL_MASK,
.idlest_reg = _OMAP34XX_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL),
- .idlest_bit = OMAP3430_ST_MPU_CLK_SHIFT,
+ .idlest_mask = OMAP3430_ST_MPU_CLK_MASK,
.max_multiplier = OMAP3_MAX_DPLL_MULT,
.max_divider = OMAP3_MAX_DPLL_DIV,
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@@ -375,7 +375,7 @@ static struct dpll_data dpll2_dd = {
.autoidle_reg = _OMAP34XX_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_AUTOIDLE_PLL),
.autoidle_mask = OMAP3430_AUTO_IVA2_DPLL_MASK,
.idlest_reg = _OMAP34XX_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_IDLEST_PLL),
- .idlest_bit = OMAP3430_ST_IVA2_CLK_SHIFT,
+ .idlest_mask = OMAP3430_ST_IVA2_CLK_MASK,
.max_multiplier = OMAP3_MAX_DPLL_MULT,
.max_divider = OMAP3_MAX_DPLL_DIV,
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@@ -434,6 +434,8 @@ static struct dpll_data dpll3_dd = {
.recal_st_bit = OMAP3430_CORE_DPLL_ST_SHIFT,
.autoidle_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_AUTOIDLE),
.autoidle_mask = OMAP3430_AUTO_CORE_DPLL_MASK,
+ .idlest_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST),
+ .idlest_mask = OMAP3430_ST_CORE_CLK_MASK,
.max_multiplier = OMAP3_MAX_DPLL_MULT,
.max_divider = OMAP3_MAX_DPLL_DIV,
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@@ -623,7 +625,7 @@ static struct dpll_data dpll4_dd = {
.autoidle_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_AUTOIDLE),
.autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK,
.idlest_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST),
- .idlest_bit = OMAP3430_ST_PERIPH_CLK_SHIFT,
+ .idlest_mask = OMAP3430_ST_PERIPH_CLK_MASK,
.max_multiplier = OMAP3_MAX_DPLL_MULT,
.max_divider = OMAP3_MAX_DPLL_DIV,
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@@ -965,7 +967,7 @@ static struct dpll_data dpll5_dd = {
.autoidle_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_AUTOIDLE2_PLL),
.autoidle_mask = OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK,
.idlest_reg = _OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST2),
- .idlest_bit = OMAP3430ES2_ST_PERIPH2_CLK_SHIFT,
+ .idlest_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK,
.max_multiplier = OMAP3_MAX_DPLL_MULT,
.max_divider = OMAP3_MAX_DPLL_DIV,
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index c6762e9..666f52b 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -41,6 +41,8 @@ struct dpll_data {
u16 max_multiplier;
u8 max_divider;
u32 max_tolerance;
+ void __iomem *idlest_reg;
+ u32 idlest_mask;
# if defined(CONFIG_ARCH_OMAP3)
u32 freqsel_mask;
u8 modes;
@@ -51,8 +53,6 @@ struct dpll_data {
u8 recal_st_bit;
void __iomem *autoidle_reg;
u32 autoidle_mask;
- void __iomem *idlest_reg;
- u8 idlest_bit;
# endif
};
next prev parent reply other threads:[~2009-01-28 20:25 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-01-28 19:08 [PATCH C 00/13] OMAP clock, C of F: DPLL updates Paul Walmsley
2009-01-28 19:08 ` [PATCH C 01/13] OMAP3 clock: fix DPLL jitter correction and rate programming Paul Walmsley
2009-01-28 19:08 ` [PATCH C 02/13] OMAP3 clock: DPLL{1,2}_FCLK clksel can divide by 4 Paul Walmsley
2009-01-28 19:08 ` Paul Walmsley [this message]
2009-01-28 19:08 ` [PATCH C 04/13] OMAP3 clock: note the bypass source clock for DPLLs Paul Walmsley
2009-01-28 19:08 ` [PATCH C 05/13] OMAP2/3 clock: fix DPLL rate calculation Paul Walmsley
2009-01-29 10:27 ` Russell King
2009-01-28 19:08 ` [PATCH C 06/13] OMAP3 clock: DPLLs should enter bypass if new rate is sys_ck Paul Walmsley
2009-01-29 10:30 ` Russell King - ARM Linux
2009-01-29 12:39 ` Russell King - ARM Linux
2009-01-30 5:47 ` Paul Walmsley
2009-02-09 11:19 ` Russell King - ARM Linux
2009-01-28 19:08 ` [PATCH C 07/13] OMAP3 clock: recalculate DPLL subtree after bypass entry/exit Paul Walmsley
2009-01-29 10:33 ` Russell King - ARM Linux
2009-01-28 19:08 ` [PATCH C 08/13] OMAP3 clock: put DPLL into bypass if bypass rate = clk->rate, not hardware rate Paul Walmsley
2009-01-29 10:35 ` Russell King - ARM Linux
2009-01-28 19:08 ` [PATCH C 09/13] OMAP3 clock: fix non-CORE DPLL rate assignment bugs Paul Walmsley
2009-01-29 10:38 ` Russell King - ARM Linux
2009-01-28 19:08 ` [PATCH C 10/13] OMAP3 clock: remove unnecessary dpll_data dereferences Paul Walmsley
2009-01-28 19:08 ` [PATCH C 11/13] OMAP3 clock: optimize DPLL rate rounding algorithm Paul Walmsley
2009-01-28 19:08 ` [PATCH C 12/13] OMAP3 clock: avoid invalid FREQSEL values during DPLL rate rounding Paul Walmsley
2009-01-28 19:08 ` [PATCH C 13/13] OMAP3 clock: disable DPLL autoidle while waiting for DPLL to lock Paul Walmsley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20090128190814.12092.3911.stgit@localhost.localdomain \
--to=paul@pwsan.com \
--cc=linux-arm-kernel@lists.arm.linux.org.uk \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-omap@vger.kernel.org \
--cc=tony@atomide.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox