From: Paul Walmsley <paul@pwsan.com>
To: linux-arm-kernel@lists.arm.linux.org.uk, linux-kernel@vger.kernel.org
Cc: linux-omap@vger.kernel.org, Paul Walmsley <paul@pwsan.com>,
Tony Lindgren <tony@atomide.com>
Subject: [PATCH C 10/13] OMAP3 clock: remove unnecessary dpll_data dereferences
Date: Wed, 28 Jan 2009 12:08:38 -0700 [thread overview]
Message-ID: <20090128190835.12092.41686.stgit@localhost.localdomain> (raw)
In-Reply-To: <20090128190724.12092.22239.stgit@localhost.localdomain>
Remove some clutter from omap2_dpll_round_rate().
linux-omap source commit is 4625dceb8583c02a6d67ededc9f6a8347b6b8cb7.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/mach-omap2/clock.c | 23 +++++++++++++----------
1 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index b517469..4c3d962 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -925,19 +925,22 @@ long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate)
int m, n, r, e, scaled_max_m;
unsigned long scaled_rt_rp, new_rate;
int min_e = -1, min_e_m = -1, min_e_n = -1;
+ struct dpll_data *dd;
if (!clk || !clk->dpll_data)
return ~0;
+ dd = clk->dpll_data;
+
pr_debug("clock: starting DPLL round_rate for clock %s, target rate "
"%ld\n", clk->name, target_rate);
scaled_rt_rp = target_rate / (clk->parent->rate / DPLL_SCALE_FACTOR);
- scaled_max_m = clk->dpll_data->max_multiplier * DPLL_SCALE_FACTOR;
+ scaled_max_m = dd->max_multiplier * DPLL_SCALE_FACTOR;
- clk->dpll_data->last_rounded_rate = 0;
+ dd->last_rounded_rate = 0;
- for (n = clk->dpll_data->max_divider; n >= DPLL_MIN_DIVIDER; n--) {
+ for (n = dd->max_divider; n >= DPLL_MIN_DIVIDER; n--) {
/* Compute the scaled DPLL multiplier, based on the divider */
m = scaled_rt_rp * n;
@@ -957,7 +960,7 @@ long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate)
"(new_rate = %ld)\n", n, m, e, new_rate);
if (min_e == -1 ||
- min_e >= (int)(abs(e) - clk->dpll_data->rate_tolerance)) {
+ min_e >= (int)(abs(e) - dd->rate_tolerance)) {
min_e = e;
min_e_m = m;
min_e_n = n;
@@ -980,17 +983,17 @@ long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate)
return ~0;
}
- clk->dpll_data->last_rounded_m = min_e_m;
- clk->dpll_data->last_rounded_n = min_e_n;
- clk->dpll_data->last_rounded_rate =
- _dpll_compute_new_rate(clk->parent->rate, min_e_m, min_e_n);
+ dd->last_rounded_m = min_e_m;
+ dd->last_rounded_n = min_e_n;
+ dd->last_rounded_rate = _dpll_compute_new_rate(clk->parent->rate,
+ min_e_m, min_e_n);
pr_debug("clock: final least error: e = %d, m = %d, n = %d\n",
min_e, min_e_m, min_e_n);
pr_debug("clock: final rate: %ld (target rate: %ld)\n",
- clk->dpll_data->last_rounded_rate, target_rate);
+ dd->last_rounded_rate, target_rate);
- return clk->dpll_data->last_rounded_rate;
+ return dd->last_rounded_rate;
}
/*-------------------------------------------------------------------------
next prev parent reply other threads:[~2009-01-28 20:25 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-01-28 19:08 [PATCH C 00/13] OMAP clock, C of F: DPLL updates Paul Walmsley
2009-01-28 19:08 ` [PATCH C 01/13] OMAP3 clock: fix DPLL jitter correction and rate programming Paul Walmsley
2009-01-28 19:08 ` [PATCH C 02/13] OMAP3 clock: DPLL{1,2}_FCLK clksel can divide by 4 Paul Walmsley
2009-01-28 19:08 ` [PATCH C 03/13] OMAP3 clock: convert dpll_data.idlest_bit to idlest_mask Paul Walmsley
2009-01-28 19:08 ` [PATCH C 04/13] OMAP3 clock: note the bypass source clock for DPLLs Paul Walmsley
2009-01-28 19:08 ` [PATCH C 05/13] OMAP2/3 clock: fix DPLL rate calculation Paul Walmsley
2009-01-29 10:27 ` Russell King
2009-01-28 19:08 ` [PATCH C 06/13] OMAP3 clock: DPLLs should enter bypass if new rate is sys_ck Paul Walmsley
2009-01-29 10:30 ` Russell King - ARM Linux
2009-01-29 12:39 ` Russell King - ARM Linux
2009-01-30 5:47 ` Paul Walmsley
2009-02-09 11:19 ` Russell King - ARM Linux
2009-01-28 19:08 ` [PATCH C 07/13] OMAP3 clock: recalculate DPLL subtree after bypass entry/exit Paul Walmsley
2009-01-29 10:33 ` Russell King - ARM Linux
2009-01-28 19:08 ` [PATCH C 08/13] OMAP3 clock: put DPLL into bypass if bypass rate = clk->rate, not hardware rate Paul Walmsley
2009-01-29 10:35 ` Russell King - ARM Linux
2009-01-28 19:08 ` [PATCH C 09/13] OMAP3 clock: fix non-CORE DPLL rate assignment bugs Paul Walmsley
2009-01-29 10:38 ` Russell King - ARM Linux
2009-01-28 19:08 ` Paul Walmsley [this message]
2009-01-28 19:08 ` [PATCH C 11/13] OMAP3 clock: optimize DPLL rate rounding algorithm Paul Walmsley
2009-01-28 19:08 ` [PATCH C 12/13] OMAP3 clock: avoid invalid FREQSEL values during DPLL rate rounding Paul Walmsley
2009-01-28 19:08 ` [PATCH C 13/13] OMAP3 clock: disable DPLL autoidle while waiting for DPLL to lock Paul Walmsley
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