From: Russell King - ARM Linux <linux@arm.linux.org.uk>
To: Paul Walmsley <paul@pwsan.com>
Cc: linux-arm-kernel@lists.arm.linux.org.uk,
linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
Tony Lindgren <tony@atomide.com>
Subject: Re: [PATCH C 06/13] OMAP3 clock: DPLLs should enter bypass if new rate is sys_ck
Date: Thu, 29 Jan 2009 10:30:03 +0000 [thread overview]
Message-ID: <20090129103003.GA12627@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <20090128190823.12092.2638.stgit@localhost.localdomain>
On Wed, Jan 28, 2009 at 12:08:26PM -0700, Paul Walmsley wrote:
> static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
> {
> u16 freqsel;
> struct dpll_data *dd;
> + int ret;
So 'ret' is a new variable...
>
> if (!clk || !rate)
> return -EINVAL;
> @@ -389,18 +393,32 @@ static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
> if (rate == omap2_get_dpll_rate(clk))
> return 0;
>
> - if (dd->last_rounded_rate != rate)
> - omap2_dpll_round_rate(clk, rate);
> + if (dd->bypass_clk->rate == rate &&
> + (clk->dpll_data->modes & (1 << DPLL_LOW_POWER_BYPASS))) {
>
> - if (dd->last_rounded_rate == 0)
> - return -EINVAL;
> + pr_debug("clock: %s: set rate: entering bypass.\n", clk->name);
> +
> + ret = _omap3_noncore_dpll_bypass(clk);
which is assigned to...
> +
Additional noise.
> + } else {
> +
More noise.
> + if (dd->last_rounded_rate != rate)
> + omap2_dpll_round_rate(clk, rate);
>
> - freqsel = _omap3_dpll_compute_freqsel(clk, dd->last_rounded_n);
> - if (!freqsel)
> - WARN_ON(1);
> + if (dd->last_rounded_rate == 0)
> + return -EINVAL;
>
> - omap3_noncore_dpll_program(clk, dd->last_rounded_m, dd->last_rounded_n,
> - freqsel);
> + freqsel = _omap3_dpll_compute_freqsel(clk, dd->last_rounded_n);
> + if (!freqsel)
> + WARN_ON(1);
> +
> + pr_debug("clock: %s: set rate: locking rate to %lu.\n",
> + clk->name, rate);
> +
> + ret = omap3_noncore_dpll_program(clk, dd->last_rounded_m,
> + dd->last_rounded_n, freqsel);
Assigned to again...
> +
More noise.
> + }
>
> omap3_dpll_recalc(clk);
>
But ret is never actually used.
next prev parent reply other threads:[~2009-01-29 10:30 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-01-28 19:08 [PATCH C 00/13] OMAP clock, C of F: DPLL updates Paul Walmsley
2009-01-28 19:08 ` [PATCH C 01/13] OMAP3 clock: fix DPLL jitter correction and rate programming Paul Walmsley
2009-01-28 19:08 ` [PATCH C 02/13] OMAP3 clock: DPLL{1,2}_FCLK clksel can divide by 4 Paul Walmsley
2009-01-28 19:08 ` [PATCH C 03/13] OMAP3 clock: convert dpll_data.idlest_bit to idlest_mask Paul Walmsley
2009-01-28 19:08 ` [PATCH C 04/13] OMAP3 clock: note the bypass source clock for DPLLs Paul Walmsley
2009-01-28 19:08 ` [PATCH C 05/13] OMAP2/3 clock: fix DPLL rate calculation Paul Walmsley
2009-01-29 10:27 ` Russell King
2009-01-28 19:08 ` [PATCH C 06/13] OMAP3 clock: DPLLs should enter bypass if new rate is sys_ck Paul Walmsley
2009-01-29 10:30 ` Russell King - ARM Linux [this message]
2009-01-29 12:39 ` Russell King - ARM Linux
2009-01-30 5:47 ` Paul Walmsley
2009-02-09 11:19 ` Russell King - ARM Linux
2009-01-28 19:08 ` [PATCH C 07/13] OMAP3 clock: recalculate DPLL subtree after bypass entry/exit Paul Walmsley
2009-01-29 10:33 ` Russell King - ARM Linux
2009-01-28 19:08 ` [PATCH C 08/13] OMAP3 clock: put DPLL into bypass if bypass rate = clk->rate, not hardware rate Paul Walmsley
2009-01-29 10:35 ` Russell King - ARM Linux
2009-01-28 19:08 ` [PATCH C 09/13] OMAP3 clock: fix non-CORE DPLL rate assignment bugs Paul Walmsley
2009-01-29 10:38 ` Russell King - ARM Linux
2009-01-28 19:08 ` [PATCH C 10/13] OMAP3 clock: remove unnecessary dpll_data dereferences Paul Walmsley
2009-01-28 19:08 ` [PATCH C 11/13] OMAP3 clock: optimize DPLL rate rounding algorithm Paul Walmsley
2009-01-28 19:08 ` [PATCH C 12/13] OMAP3 clock: avoid invalid FREQSEL values during DPLL rate rounding Paul Walmsley
2009-01-28 19:08 ` [PATCH C 13/13] OMAP3 clock: disable DPLL autoidle while waiting for DPLL to lock Paul Walmsley
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