trouble with alsa, wolfson, and TI OMAP35xx McBSP

twebb
2009-04-22T17:58:02Z

[-- Attachment #1: Type: text/plain, Size: 1319 bytes --]

I'm having difficulties getting a Wolfson codec running on McBSP1 of
an OMAP 35xx. Here are the particulars:

1) Using Linux kernel 2.6.27-omap1, with an ALSA sound driver ported
from a Wolfson supplied source tree labeled 2.6.29 (“dev” branch)
2) Using the TI OMAP3530 SOC married to a Wolfson WM8978 codec via
McBSP1. I2C control, I2S pcm data.
3) We are running the codec digital block at 1.8V and the analog block at 3.3V
4) The WM8978 codec is synthesizing FCLK and BCLK, codec is the
master. McBsp is the slave.
5) FCLK=44.1KHz, BCLK= 32 * FCLK, MCLK = 13Mhz
6) Framing is I2S stereo, 16 bit word

I'm seeing two main problems:

Problem 1:
The WM8978 sample rate PLL does not seem to be stable while DCVDD =
DBVDD = 1.8V. FCLK mean = 44.5KHz and jittering. Increasing DCVDD and
DBVDD voltage above 2V increases PLL stability. We have a workaround
for this for now.

Problem 2:
Test tone is being presented by the user application, providing a 1Khz
tone sampled at 44.1Khz. The data are S16_LE, right channel only. Left
channel is quiet. The data seems to slip back and forth from left to
right channel. This is reproducable and verified with a scope trace.

Anybody have any ideas what might be going wrong here? Traces for
codec reg dump and mcbsp are attached.

Thanks,
twebb

[-- Attachment #2: codec_regs.txt --]
[-- Type: text/plain, Size: 642 bytes --]

omap2_dma_handle_ch: new DMA IRQ for lch 0
WM8978 registers
0: 0
1: 1fd
2: 1bf
3: 1ef
4: 10
5: 0
6: 16d
7: 0
8: 0
9: 0
a: 40
b: ff
c: ff
d: 0
e: 100
f: ff
10: ff
11: 0
12: 12c
13: 2c
14: 2c
15: 2c
16: 2c
17: 0
18: 32
19: 0
1a: 0
1b: 0
1c: 0
1d: 0
1e: 0
1f: 0
20: 38
21: b
22: 32
23: 0
24: a
25: 1a
26: 1e8
27: 1bf
28: 0
29: 0
2a: 0
2b: 0
2c: 33
2d: 10
2e: 10
2f: 100
30: 100
31: 2
32: 1
33: 1
34: 39
35: 39
36: 39
37: 39
38: 1
39: 1

[-- Attachment #3: mcbsp_trace.txt --]
[-- Type: text/plain, Size: 4445 bytes --]

<6>omap_mcbsp_dai_startup: cpu_dai_active: 0 cpu_dai:c0351900 c039a71c mcbsp_data->bus_id = 0 err = 0
omap_mcbsp_dai_startup: cpu_dai_active: 0 cpu_dai:c0351900 c039a71c mcbsp_data->bus_id = 0 err = 0
<6>omap_mcbsp_request: id = 0
omap_mcbsp_request: id = 0
<6>omap2_mcbsp_request: id = 0
omap2_mcbsp_request: id = 0
<6>omap_mcbsp_request: returns 0
omap_mcbsp_request: returns 0
wm8978_write: addr: 0x06 (6) val: 16d
wm8978_write: addr: 0x06 (6) val: 16d
wm8978_write: addr: 0x04 (4) val: 010
wm8978_write: addr: 0x04 (4) val: 010
<6>omap_mcbsp_dai_set_fmt: format: 00000000 dai format: SND_SOC_DAIFMT_I2S
omap_mcbsp_dai_set_fmt: format: 00000000 dai format: SND_SOC_DAIFMT_I2S
<6>snd_soc_set_pll: 11289600
snd_soc_set_pll: 11289600
wm8978_write: addr: 0x24 (36) val: 00a
wm8978_write: addr: 0x24 (36) val: 00a
wm8978_write: addr: 0x25 (37) val: 01a
wm8978_write: addr: 0x25 (37) val: 01a
wm8978_write: addr: 0x26 (38) val: 1e8
wm8978_write: addr: 0x26 (38) val: 1e8
wm8978_write: addr: 0x27 (39) val: 1bf
wm8978_write: addr: 0x27 (39) val: 1bf
<6>wm8978_set_dai_clkdiv: div_id = WM8978_MCLKDIV div = 0060
wm8978_set_dai_clkdiv: div_id = WM8978_MCLKDIV div = 0060
wm8978_write: addr: 0x06 (6) val: 16d
wm8978_write: addr: 0x06 (6) val: 16d
<6>wm8978_set_dai_clkdiv: div_id = WM8978_BCLKDIV div = 000c
wm8978_set_dai_clkdiv: div_id = WM8978_BCLKDIV div = 000c
wm8978_write: addr: 0x06 (6) val: 16d
wm8978_write: addr: 0x06 (6) val: 16d
wm8978_write: addr: 0x01 (1) val: 1fd
wm8978_write: addr: 0x01 (1) val: 1fd
<6>wm8978_set_dai_clkdiv: div_id = WM8978_MCLKSEL div = 0100
wm8978_set_dai_clkdiv: div_id = WM8978_MCLKSEL div = 0100
wm8978_write: addr: 0x06 (6) val: 16d
wm8978_write: addr: 0x06 (6) val: 16d
<6>omap_mcbsp_dai_set_dai_sysclk: clk_id = OMAP_MCBSP_SYSCLK_CLKX_EXT
omap_mcbsp_dai_set_dai_sysclk: clk_id = OMAP_MCBSP_SYSCLK_CLKX_EXT
<6>omap_mcbsp_dai_set_clkdiv:
omap_mcbsp_dai_set_clkdiv:
wm8978_write: addr: 0x04 (4) val: 010
wm8978_write: addr: 0x04 (4) val: 010
wm8978_write: addr: 0x07 (7) val: 000
wm8978_write: addr: 0x07 (7) val: 000
<6>omap_mcbsp_dai_hw_params:
omap_mcbsp_dai_hw_params:
<6>omap_mcbsp_dai_hw_params: channels = 2
omap_mcbsp_dai_hw_params: channels = 2
<6>omap_mcbsp_config: id = 0
omap_mcbsp_config: id = 0
<7>omap-mcbsp omap-mcbsp.1: Configuring McBSP1 phys_base: 0x48074000
<4>omap_pcm_prepare: enable irq for dma_ch 0
omap_pcm_prepare: enable irq for dma_ch 0
wm8978_write: addr: 0x01 (1) val: 1fd
wm8978_write: addr: 0x01 (1) val: 1fd
wm8978_write: addr: 0x02 (2) val: 1bf
wm8978_write: addr: 0x02 (2) val: 1bf
wm8978_write: addr: 0x03 (3) val: 1ef
wm8978_write: addr: 0x03 (3) val: 1ef
wm8978_write: addr: 0x0a (10) val: 000
wm8978_write: addr: 0x0a (10) val: 000
<6>omap_mcbsp_dai_trigger: cmd = SNDRV_PCM_TRIGGER_START
omap_mcbsp_dai_trigger: cmd = SNDRV_PCM_TRIGGER_START
<6>omap_mcbsp_start: id = 0
omap_mcbsp_start: id = 0
<7>omap-mcbsp omap-mcbsp.1: **** McBSP1 regs ****
<7>omap-mcbsp omap-mcbsp.1: DRR2: 0xfff7
<7>omap-mcbsp omap-mcbsp.1: DRR1: 0x0000
<7>omap-mcbsp omap-mcbsp.1: DXR2: 0x0000
<7>omap-mcbsp omap-mcbsp.1: DXR1: 0x0000
<7>omap-mcbsp omap-mcbsp.1: SPCR2: 0x02f5
<7>omap-mcbsp omap-mcbsp.1: SPCR1: 0x0037
<7>omap-mcbsp omap-mcbsp.1: RCR2: 0x8041
<7>omap-mcbsp omap-mcbsp.1: RCR1: 0x0040
<7>omap-mcbsp omap-mcbsp.1: XCR2: 0x8041
<7>omap-mcbsp omap-mcbsp.1: XCR1: 0x0040
<7>omap-mcbsp omap-mcbsp.1: SRGR2: 0x201f
<7>omap-mcbsp omap-mcbsp.1: SRGR1: 0x0f01
<7>omap-mcbsp omap-mcbsp.1: PCR0: 0x008f
<7>omap-mcbsp omap-mcbsp.1: ***********************
<6>omap_mcbsp_dai_trigger: return 0
omap_mcbsp_dai_trigger: return 0
<4>__ratelimit: 20 callbacks suppressed
__ratelimit: 20 callbacks suppressed
<4>omap2_dma_handle_ch: new DMA IRQ for lch 0
omap2_dma_handle_ch: new DMA IRQ for lch 0
<4>omap_pcm_dma_irq: dma_ch 0
omap_pcm_dma_irq: dma_ch cbsp_dai_trigger: cmd = SNDRV_PCM_TRIGGER_STOP
omap_mcbsp_dai_trigger: cmd = SNDRV_PCM_TRIGGER_STOP
<6>omap_mcbsp_stop: id = 0
omap_mcbsp_stop: id = 0
<6>omap_mcbsp_dai_trigger: return 0
omap_mcbsp_dai_trigger: return 0
<4>omap2_dma_handle_ch: new DMA IRQ for lch 0
omap2_dma_handle_ch: new DMA IRQ for lch 0
<4>omap_pcm_dma_irq: dma_ch 0
omap_pcm_dma_irq: dma_ch 0
<4>omap_pcm_prepare: enable irq for dma_ch 0
omap_pcm_prepare: enable irq for dma_ch 0
wm8978_write: addr: 0x0a (10) val: 000
wm8978_write: addr: 0x0a (10) val: 000