Re: Beagleboard rev C memory timings & suspend/resume

[Jean Pihet <jpihet@mvista.com>]

On Thursday 07 May 2009 21:18:41 Paul Walmsley wrote:
> Hello Jean,
>
> one other suggestion.  You mentioned that you had self-refresh working on
> another OMAP3430 board with two SDRAM chip-selects.  You might consider
> dumping the SDRC registers from that board, and dumping the SDRC registers
> on Beagle rev C, and comparing.  It could be that the bootloader on your
> other board is setting some important bit.
The comparison gives the following:
- the timings are slightly different but given that the parts are not the same 
I do not think it is a problem
- the fields FIXEDDELAY and MODEFIXEDDELAYINITLAT are set in SDRC_DLLA_CTRL, 
the register value is 0x2600000A. Does that affect the 166MHz operation?
- the field DEEPPD of SDRC_MCFG_p is set to 0. That setting could affect the 
suspend/resume
- the MUX scheme is different: ADDRMUXLEGACY is set to 0
- the field BANKALLOCATION of SDRC_MCFG_p is set to 0 instead of 2

I tried to change those fields on the Beagleboard but still suspending for 
more than 10sec corrupts the memory.

> - Paul

Regards,
Jean