From: Paul Walmsley <paul@pwsan.com>
To: linux-arm-kernel@lists.arm.linux.org.uk
Cc: linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
Paul Walmsley <paul@pwsan.com>
Subject: [PATCH 05/10] OMAP3 SDRC: initialize SDRC_POWER at boot
Date: Tue, 12 May 2009 18:05:19 -0600 [thread overview]
Message-ID: <20090513000518.10349.64171.stgit@localhost.localdomain> (raw)
In-Reply-To: <20090512235713.10349.49339.stgit@localhost.localdomain>
Initialize SDRC_POWER to a known-good setting when the kernel boots.
Necessary since some bootloaders don't initialize SDRC_POWER properly.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/sdrc.c | 19 ++++++++++++++++++-
1 files changed, 18 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c
index 2a30060..d62e4e1 100644
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@ -37,6 +37,10 @@ static struct omap_sdrc_params *sdrc_init_params;
void __iomem *omap2_sdrc_base;
void __iomem *omap2_sms_base;
+/* SDRC_POWER register bits */
+#define SDRC_POWER_EXTCLKDIS_SHIFT 3
+#define SDRC_POWER_PWDENA_SHIFT 2
+#define SDRC_POWER_PAGEPOLICY_SHIFT 0
/**
* omap2_sdrc_get_params - return SDRC register values for a given clock rate
@@ -74,7 +78,14 @@ void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
omap2_sms_base = omap2_globals->sms;
}
-/* turn on smart idle modes for SDRAM scheduler and controller */
+/**
+ * omap2_sdrc_init - initialize SMS, SDRC devices on boot
+ * @sp: pointer to a null-terminated list of struct omap_sdrc_params
+ *
+ * Turn on smart idle modes for SDRAM scheduler and controller.
+ * Program a known-good configuration for the SDRC to deal with buggy
+ * bootloaders.
+ */
void __init omap2_sdrc_init(struct omap_sdrc_params *sp)
{
u32 l;
@@ -90,4 +101,10 @@ void __init omap2_sdrc_init(struct omap_sdrc_params *sp)
sdrc_write_reg(l, SDRC_SYSCONFIG);
sdrc_init_params = sp;
+
+ /* XXX Enable SRFRONIDLEREQ here also? */
+ l = (1 << SDRC_POWER_EXTCLKDIS_SHIFT) |
+ (1 << SDRC_POWER_PWDENA_SHIFT) |
+ (1 << SDRC_POWER_PAGEPOLICY_SHIFT);
+ sdrc_write_reg(l, SDRC_POWER);
}
next prev parent reply other threads:[~2009-05-13 0:07 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-05-13 0:05 [PATCH 00/10] OMAP clock/SDRC patches on v2.6.30-rc5 Paul Walmsley
2009-05-13 0:05 ` [PATCH 01/10] OMAP3 SRAM: mark OCM RAM as Non-cacheable Normal memory Paul Walmsley
2009-05-13 0:05 ` [PATCH 02/10] OMAP3 SRAM: add ARM barriers to omap3_sram_configure_core_dpll Paul Walmsley
2009-05-13 0:05 ` [PATCH 03/10] OMAP3 clock: add interconnect barriers to CORE DPLL M2 change Paul Walmsley
2009-05-13 0:05 ` [PATCH 04/10] OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency change Paul Walmsley
2009-05-13 0:05 ` Paul Walmsley [this message]
2009-05-13 0:05 ` [PATCH 06/10] OMAP3 SRAM: renumber registers to make space for argument passing Paul Walmsley
2009-05-13 0:05 ` [PATCH 07/10] OMAP3 clock: only unlock SDRC DLL if SDRC clk < 83MHz Paul Walmsley
2009-05-13 0:05 ` [PATCH 08/10] OMAP3 clock: use pr_debug() rather than pr_info() in some clock change code Paul Walmsley
2009-05-13 0:05 ` [PATCH 09/10] OMAP3 clock: lessen amount of noisy messages Paul Walmsley
2009-05-13 0:05 ` [PATCH 10/10] OMAP2xxx clock: rename clk_init_one() to clk_preinit() Paul Walmsley
2009-05-26 16:29 ` [PATCH 00/10] OMAP clock/SDRC patches on v2.6.30-rc5 Paul Walmsley
2009-05-26 16:37 ` Russell King - ARM Linux
2009-05-26 16:51 ` Paul Walmsley
2009-05-26 22:04 ` Tony Lindgren
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