* [PATCH v2 1/2] OMAP3 SDRC: Drop 133.3MHz, 66.6MHz rates from Qimonda SDRAM params file
2009-05-14 19:50 [PATCH v2 0/2] PM: OMAP3 SDRC: fix some SDRAM settings for Qimonda parts Paul Walmsley
@ 2009-05-14 19:50 ` Paul Walmsley
2009-05-14 20:36 ` [APPLIED] [PATCH v2 1/2] OMAP3 SDRC: Drop 133.3MHz, Tony Lindgren
2009-05-14 19:50 ` [PATCH v2 2/2] OMAP3 SDRC: Add rounded rates for devices using the Qimonda SDRAM Paul Walmsley
2009-05-14 20:51 ` [PATCH v2 0/2] PM: OMAP3 SDRC: fix some SDRAM settings for Qimonda parts Tony Lindgren
2 siblings, 1 reply; 7+ messages in thread
From: Paul Walmsley @ 2009-05-14 19:50 UTC (permalink / raw)
To: linux-omap; +Cc: Paul Walmsley, Richard Woodruff
Boards that used 133.3MHz maximum rate SDRAM were never released to the
public and presumably used the OMAPZoom kernel; so, drop these unused
rates. Viz.:
http://marc.info/?l=linux-omap&m=124232922426311&w=2
This patch is a collaboration between Richard Woodruff <r-woodruff2@ti.com>
and Paul Walmsley <paul@pwsan.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
---
.../mach-omap2/sdram-qimonda-hyb18m512160af-6.h | 21 +++-----------------
1 files changed, 3 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
index 74a92c8..8b6f929 100644
--- a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
+++ b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
@@ -1,8 +1,8 @@
/*
* SDRC register values for the Qimonda HYB18M512160AF-6
*
- * Copyright (C) 2008 Texas Instruments, Inc.
- * Copyright (C) 2008 Nokia Corporation
+ * Copyright (C) 2008-2009 Texas Instruments, Inc.
+ * Copyright (C) 2008-2009 Nokia Corporation
*
* Paul Walmsley
*
@@ -17,7 +17,6 @@
#include <mach/sdrc.h>
/* Qimonda HYB18M512160AF-6 */
-/* XXX Using ARE = 0x1 (no autorefresh burst) -- can this be changed? */
static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = {
[0] = {
.rate = 165941176,
@@ -27,27 +26,13 @@ static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = {
.mr = 0x00000032,
},
[1] = {
- .rate = 133333333,
- .actim_ctrla = 0x5219b485,
- .actim_ctrlb = 0x00012210,
- .rfr_ctrl = 0x0003de01,
- .mr = 0x00000032,
- },
- [2] = {
.rate = 82970588,
.actim_ctrla = 0x31512283,
.actim_ctrlb = 0x0001220a,
.rfr_ctrl = 0x00025501,
.mr = 0x00000022,
},
- [3] = {
- .rate = 66666666,
- .actim_ctrla = 0x290d2243,
- .actim_ctrlb = 0x00012208,
- .rfr_ctrl = 0x0001d601,
- .mr = 0x00000022,
- },
- [4] = {
+ [2] = {
.rate = 0
},
};
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH v2 2/2] OMAP3 SDRC: Add rounded rates for devices using the Qimonda SDRAM
2009-05-14 19:50 [PATCH v2 0/2] PM: OMAP3 SDRC: fix some SDRAM settings for Qimonda parts Paul Walmsley
2009-05-14 19:50 ` [PATCH v2 1/2] OMAP3 SDRC: Drop 133.3MHz, 66.6MHz rates from Qimonda SDRAM params file Paul Walmsley
@ 2009-05-14 19:50 ` Paul Walmsley
2009-05-14 20:36 ` [APPLIED] [PATCH v2 2/2] OMAP3 SDRC: Add rounded rates for devices using the Tony Lindgren
2009-05-14 20:51 ` [PATCH v2 0/2] PM: OMAP3 SDRC: fix some SDRAM settings for Qimonda parts Tony Lindgren
2 siblings, 1 reply; 7+ messages in thread
From: Paul Walmsley @ 2009-05-14 19:50 UTC (permalink / raw)
To: linux-omap; +Cc: Paul Walmsley, Kevin Hilman
The 3430SDPs, many of which use Qimonda SDRAM, are finally using
bootloaders that program rounded rates for DPLL3. Since no SDRAM
memory timings are defined for the rounded rates, the initial SDRC
reprogram during init fails. Add in the correct timings here.
Problem reported by Kevin Hilman <khilman@deeprootsystems.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
---
.../mach-omap2/sdram-qimonda-hyb18m512160af-6.h | 18 ++++++++++++++++--
1 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
index 8b6f929..3751d29 100644
--- a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
+++ b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
@@ -19,20 +19,34 @@
/* Qimonda HYB18M512160AF-6 */
static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = {
[0] = {
- .rate = 165941176,
+ .rate = 166000000,
.actim_ctrla = 0x629db4c6,
.actim_ctrlb = 0x00012214,
.rfr_ctrl = 0x0004dc01,
.mr = 0x00000032,
},
[1] = {
+ .rate = 165941176,
+ .actim_ctrla = 0x629db4c6,
+ .actim_ctrlb = 0x00012214,
+ .rfr_ctrl = 0x0004dc01,
+ .mr = 0x00000032,
+ },
+ [2] = {
+ .rate = 83000000,
+ .actim_ctrla = 0x31512283,
+ .actim_ctrlb = 0x0001220a,
+ .rfr_ctrl = 0x00025501,
+ .mr = 0x00000022,
+ },
+ [3] = {
.rate = 82970588,
.actim_ctrla = 0x31512283,
.actim_ctrlb = 0x0001220a,
.rfr_ctrl = 0x00025501,
.mr = 0x00000022,
},
- [2] = {
+ [4] = {
.rate = 0
},
};
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH v2 0/2] PM: OMAP3 SDRC: fix some SDRAM settings for Qimonda parts
2009-05-14 19:50 [PATCH v2 0/2] PM: OMAP3 SDRC: fix some SDRAM settings for Qimonda parts Paul Walmsley
2009-05-14 19:50 ` [PATCH v2 1/2] OMAP3 SDRC: Drop 133.3MHz, 66.6MHz rates from Qimonda SDRAM params file Paul Walmsley
2009-05-14 19:50 ` [PATCH v2 2/2] OMAP3 SDRC: Add rounded rates for devices using the Qimonda SDRAM Paul Walmsley
@ 2009-05-14 20:51 ` Tony Lindgren
2009-05-14 20:54 ` Paul Walmsley
2 siblings, 1 reply; 7+ messages in thread
From: Tony Lindgren @ 2009-05-14 20:51 UTC (permalink / raw)
To: Paul Walmsley; +Cc: linux-omap, r-woodruff2, khilman
* Paul Walmsley <paul@pwsan.com> [090514 12:52]:
> Hi,
>
> This series updates some SDRAM parameter settings for the Qimonda parts
> used on some 3430SDP boards.
>
> Drop the 133.3MHz/66.6MHz rates from the Qimonda SDRAM file - these were only
> used on some early Labrador boards with slower SDRAM parts. Thanks to
> Richard Woodruff <r-woodruff2@ti.com> for help with this patch.
>
> Finally some 3430SDP boards are using bootloaders with rounded DPLL3 rates
> (e.g., 166000000 Hz rather than 165941176 Hz); update the Qimonda SDRAM
> parameters. This resolves -EINVALs during boot-time "Reprogramming SDRC"
> on 3430SDPs with updated bootloaders. Thanks to Kevin Hilman
> <khilman@deeprootsystems.com> for reporting this issue and testing
> the patch.
>
> These patches will be queued up into the omap-clock-testing branch at the
> next opportunity.
I've merged these two patches already into your older sdram patches
in the omap3-upstream queue.
Tony
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2 0/2] PM: OMAP3 SDRC: fix some SDRAM settings for Qimonda parts
2009-05-14 20:51 ` [PATCH v2 0/2] PM: OMAP3 SDRC: fix some SDRAM settings for Qimonda parts Tony Lindgren
@ 2009-05-14 20:54 ` Paul Walmsley
0 siblings, 0 replies; 7+ messages in thread
From: Paul Walmsley @ 2009-05-14 20:54 UTC (permalink / raw)
To: Tony Lindgren; +Cc: linux-omap, r-woodruff2, khilman
On Thu, 14 May 2009, Tony Lindgren wrote:
> * Paul Walmsley <paul@pwsan.com> [090514 12:52]:
> > Hi,
> >
> > This series updates some SDRAM parameter settings for the Qimonda parts
> > used on some 3430SDP boards.
> >
> > Drop the 133.3MHz/66.6MHz rates from the Qimonda SDRAM file - these were only
> > used on some early Labrador boards with slower SDRAM parts. Thanks to
> > Richard Woodruff <r-woodruff2@ti.com> for help with this patch.
> >
> > Finally some 3430SDP boards are using bootloaders with rounded DPLL3 rates
> > (e.g., 166000000 Hz rather than 165941176 Hz); update the Qimonda SDRAM
> > parameters. This resolves -EINVALs during boot-time "Reprogramming SDRC"
> > on 3430SDPs with updated bootloaders. Thanks to Kevin Hilman
> > <khilman@deeprootsystems.com> for reporting this issue and testing
> > the patch.
> >
> > These patches will be queued up into the omap-clock-testing branch at the
> > next opportunity.
>
> I've merged these two patches already into your older sdram patches
> in the omap3-upstream queue.
Sweet! Thanks!
- Paul
^ permalink raw reply [flat|nested] 7+ messages in thread