From: David Brownell <david-b@pacbell.net>
To: vimal singh <vimalsingh@ti.com>
Cc: linux-mtd@lists.infradead.org, Tony Lindgren <tony@atomide.com>,
dwmw2@infradead.org, dedekind@infradead.org,
linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org
Subject: Re: [PATCH 1:2] [MTD][NAND]omap: Adding support for nand prefetch-read and post-write, in MPU mode.
Date: Fri, 10 Jul 2009 11:01:57 -0700 [thread overview]
Message-ID: <200907101101.58029.david-b@pacbell.net> (raw)
In-Reply-To: <61339.192.168.10.89.1247226724.squirrel@dbdmail.itg.ti.com>
On Friday 10 July 2009, vimal singh wrote:
> +static void omap_read_buf8(struct mtd_info *mtd, u_char *buf, int len)
> +{
> + struct nand_chip *nand = mtd->priv;
> + u_char *p = (u_char *)buf;
> +
> + while (len--)
> + *p++ = __raw_readb(nand->IO_ADDR_R);
> +}
Better as __raw_readsb() yes? Or maybe ioread8_rep().
... speaking of which, maybe the MTD layer can finally
default to using the accelerated block PIO calls, now
that ioreadX_rep() is supposed to work on all arches...
Last time I measured, that change alone was worth
something like a 10% speedup. Maybe more.
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prev parent reply other threads:[~2009-07-10 18:01 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-07-10 11:52 [PATCH 1:2] [MTD][NAND]omap: Adding support for nand prefetch-read and post-write, in MPU mode vimal singh
2009-07-10 18:01 ` David Brownell [this message]
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